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-rw-r--r--os/hal/ports/STM32/STM32H7xx/stm32_rcc.h35
1 files changed, 6 insertions, 29 deletions
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
index 8c3d09fa5..d8a2de894 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
@@ -398,50 +398,27 @@
* @{
*/
/**
- * @brief Enables the ADC1 peripheral clock.
+ * @brief Enables the ADC1/ADC2 peripheral clock.
*
* @param[in] lp low power enable flag
*
* @api
*/
-#define rccEnableADC1(lp) rccEnableAPB2(RCC_APB2ENR_ADC1EN, lp)
+#define rccEnableADC12(lp) rccEnableAHB1(RCC_AHB1ENR_ADC12EN, lp)
/**
- * @brief Disables the ADC1 peripheral clock.
+ * @brief Disables the ADC1/ADC2 peripheral clock.
*
* @api
*/
-#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN)
+#define rccDisableADC12() rccDisableAHB1(RCC_AHB1ENR_ADC12EN)
/**
- * @brief Resets the ADC1 peripheral.
+ * @brief Resets the ADC1/ADC2 peripheral.
*
* @api
*/
-#define rccResetADC1() rccResetAPB2(RCC_APB2RSTR_ADC1RST)
-
-/**
- * @brief Enables the ADC2 peripheral clock.
- *
- * @param[in] lp low power enable flag
- *
- * @api
- */
-#define rccEnableADC2(lp) rccEnableAPB2(RCC_APB2ENR_ADC2EN, lp)
-
-/**
- * @brief Disables the ADC2 peripheral clock.
- *
- * @api
- */
-#define rccDisableADC2() rccDisableAPB2(RCC_APB2ENR_ADC2EN)
-
-/**
- * @brief Resets the ADC2 peripheral.
- *
- * @api
- */
-#define rccResetADC2() rccResetAPB2(RCC_APB2RSTR_ADC2RST)
+#define rccResetADC12() rccResetAHB1(RCC_AHB1RSTR_ADC12RST)
/**
* @brief Enables the ADC3 peripheral clock.