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authorgdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01>2018-10-13 19:10:22 +0000
committergdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01>2018-10-13 19:10:22 +0000
commit1ca01403b48e0cadb8712d4e4a8024ea62300cad (patch)
tree9f72fe317f1461a27389d19bd058d034fbf74899 /os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
parent062b4f7d37eab6c2deea02732e19eb641764a31e (diff)
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Added support for TIM21 and TIM22 in STM32 GPT driver. Reinforced checks in TIM-related drivers.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12360 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h')
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h111
1 files changed, 110 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
index df6645c12..add2a4d8a 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
@@ -232,12 +232,78 @@
#if !defined(STM32_GPT_TIM14_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
#endif
+
+/**
+ * @brief GPTD21 interrupt priority level setting.
+ */
+#if !defined(STM32_GPT_TIM21_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_GPT_TIM21_IRQ_PRIORITY 7
+#endif
+
+/**
+ * @brief GPTD22 interrupt priority level setting.
+ */
+#if !defined(STM32_GPT_TIM22_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_GPT_TIM22_IRQ_PRIORITY 7
+#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
+#if !defined(STM32_HAS_TIM1)
+#define STM32_HAS_TIM1 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM2)
+#define STM32_HAS_TIM2 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM3)
+#define STM32_HAS_TIM3 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM4)
+#define STM32_HAS_TIM4 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM5)
+#define STM32_HAS_TIM5 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM6)
+#define STM32_HAS_TIM6 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM7)
+#define STM32_HAS_TIM7 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM8)
+#define STM32_HAS_TIM8 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM11)
+#define STM32_HAS_TIM11 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM12)
+#define STM32_HAS_TIM12 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM14)
+#define STM32_HAS_TIM14 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM21)
+#define STM32_HAS_TIM21 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM22)
+#define STM32_HAS_TIM22 FALSE
+#endif
+
#if STM32_GPT_USE_TIM1 && !STM32_HAS_TIM1
#error "TIM1 not present in the selected device"
#endif
@@ -286,12 +352,21 @@
#error "TIM14 not present in the selected device"
#endif
+#if STM32_GPT_USE_TIM21 && !STM32_HAS_TIM21
+#error "TIM14 not present in the selected device"
+#endif
+
+#if STM32_GPT_USE_TIM22 && !STM32_HAS_TIM22
+#error "TIM14 not present in the selected device"
+#endif
+
#if !STM32_GPT_USE_TIM1 && !STM32_GPT_USE_TIM2 && \
!STM32_GPT_USE_TIM3 && !STM32_GPT_USE_TIM4 && \
!STM32_GPT_USE_TIM5 && !STM32_GPT_USE_TIM6 && \
!STM32_GPT_USE_TIM7 && !STM32_GPT_USE_TIM8 && \
!STM32_GPT_USE_TIM9 && !STM32_GPT_USE_TIM11 && \
- !STM32_GPT_USE_TIM12 && !STM32_GPT_USE_TIM14
+ !STM32_GPT_USE_TIM12 && !STM32_GPT_USE_TIM14 && \
+ !STM32_GPT_USE_TIM21 && !STM32_GPT_USE_TIM22
#error "GPT driver activated but no TIM peripheral assigned"
#endif
@@ -392,6 +467,22 @@
#endif
#endif
+#if STM32_GPT_USE_TIM21
+#if defined(STM32_TIM21_IS_USED)
+#error "GPTD21 requires TIM21 but the timer is already used"
+#else
+#define STM32_TIM21_IS_USED
+#endif
+#endif
+
+#if STM32_GPT_USE_TIM22
+#if defined(STM32_TIM22_IS_USED)
+#error "GPTD22 requires TIM22 but the timer is already used"
+#else
+#define STM32_TIM22_IS_USED
+#endif
+#endif
+
/* IRQ priority checks.*/
#if STM32_GPT_USE_TIM1 && !defined(STM32_TIM1_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM1_IRQ_PRIORITY)
@@ -453,6 +544,16 @@
#error "Invalid IRQ priority assigned to TIM14"
#endif
+#if STM32_GPT_USE_TIM21 && !defined(STM32_TIM21_SUPPRESS_ISR) && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM21_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM21"
+#endif
+
+#if STM32_GPT_USE_TIM22 && !defined(STM32_TIM22_SUPPRESS_ISR) && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM22_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM22"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -620,6 +721,14 @@ extern GPTDriver GPTD12;
extern GPTDriver GPTD14;
#endif
+#if STM32_GPT_USE_TIM21 && !defined(__DOXYGEN__)
+extern GPTDriver GPTD21;
+#endif
+
+#if STM32_GPT_USE_TIM22 && !defined(__DOXYGEN__)
+extern GPTDriver GPTD22;
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif