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-rw-r--r--demos/STM32/RT-STM32L073RZ-NUCLEO64/mcuconf.h4
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c118
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h111
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h28
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h28
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.h24
-rw-r--r--readme.txt3
7 files changed, 314 insertions, 2 deletions
diff --git a/demos/STM32/RT-STM32L073RZ-NUCLEO64/mcuconf.h b/demos/STM32/RT-STM32L073RZ-NUCLEO64/mcuconf.h
index 150b2648f..ac0ee151f 100644
--- a/demos/STM32/RT-STM32L073RZ-NUCLEO64/mcuconf.h
+++ b/demos/STM32/RT-STM32L073RZ-NUCLEO64/mcuconf.h
@@ -108,6 +108,10 @@
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
+#define STM32_GPT_USE_TIM6 FALSE
+#define STM32_GPT_TIM6_IRQ_PRIORITY 2
+#define STM32_GPT_USE_TIM7 FALSE
+#define STM32_GPT_TIM7_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM21 FALSE
#define STM32_GPT_TIM21_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM22 FALSE
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
index 0de6ac49d..f943a567c 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
@@ -130,6 +130,22 @@ GPTDriver GPTD12;
GPTDriver GPTD14;
#endif
+/**
+ * @brief GPTD21 driver identifier.
+ * @note The driver GPTD21 allocates the timer TIM21 when enabled.
+ */
+#if STM32_GPT_USE_TIM21 || defined(__DOXYGEN__)
+GPTDriver GPTD21;
+#endif
+
+/**
+ * @brief GPTD22 driver identifier.
+ * @note The driver GPTD22 allocates the timer TIM22 when enabled.
+ */
+#if STM32_GPT_USE_TIM22 || defined(__DOXYGEN__)
+GPTDriver GPTD22;
+#endif
+
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
@@ -394,6 +410,48 @@ OSAL_IRQ_HANDLER(STM32_TIM14_HANDLER) {
#endif /* !defined(STM32_TIM14_SUPPRESS_ISR) */
#endif /* STM32_GPT_USE_TIM14 */
+#if STM32_GPT_USE_TIM21 || defined(__DOXYGEN__)
+#if !defined(STM32_TIM21_SUPPRESS_ISR)
+#if !defined(STM32_TIM21_HANDLER)
+#error "STM32_TIM21_HANDLER not defined"
+#endif
+/**
+ * @brief TIM21 interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(STM32_TIM21_HANDLER) {
+
+ OSAL_IRQ_PROLOGUE();
+
+ gpt_lld_serve_interrupt(&GPTD21);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif /* !defined(STM32_TIM21_SUPPRESS_ISR) */
+#endif /* STM32_GPT_USE_TIM21 */
+
+#if STM32_GPT_USE_TIM22 || defined(__DOXYGEN__)
+#if !defined(STM32_TIM22_SUPPRESS_ISR)
+#if !defined(STM32_TIM22_HANDLER)
+#error "STM32_TIM22_HANDLER not defined"
+#endif
+/**
+ * @brief TIM22 interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(STM32_TIM22_HANDLER) {
+
+ OSAL_IRQ_PROLOGUE();
+
+ gpt_lld_serve_interrupt(&GPTD22);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif /* !defined(STM32_TIM22_SUPPRESS_ISR) */
+#endif /* STM32_GPT_USE_TIM22 */
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -476,6 +534,18 @@ void gpt_lld_init(void) {
GPTD14.tim = STM32_TIM14;
gptObjectInit(&GPTD14);
#endif
+
+#if STM32_GPT_USE_TIM21
+ /* Driver initialization.*/
+ GPTD21.tim = STM32_TIM21;
+ gptObjectInit(&GPTD21);
+#endif
+
+#if STM32_GPT_USE_TIM22
+ /* Driver initialization.*/
+ GPTD22.tim = STM32_TIM22;
+ gptObjectInit(&GPTD22);
+#endif
}
/**
@@ -669,6 +739,36 @@ void gpt_lld_start(GPTDriver *gptp) {
#endif
}
#endif
+
+#if STM32_GPT_USE_TIM21
+ if (&GPTD21 == gptp) {
+ rccEnableTIM21(true);
+ rccResetTIM21();
+#if !defined(STM32_TIM21_SUPPRESS_ISR)
+ nvicEnableVector(STM32_TIM21_NUMBER, STM32_GPT_TIM21_IRQ_PRIORITY);
+#endif
+#if defined(STM32_TIM21CLK)
+ gptp->clock = STM32_TIM21CLK;
+#else
+ gptp->clock = STM32_TIMCLK1;
+#endif
+ }
+#endif
+
+#if STM32_GPT_USE_TIM22
+ if (&GPTD22 == gptp) {
+ rccEnableTIM22(true);
+ rccResetTIM22();
+#if !defined(STM32_TIM22_SUPPRESS_ISR)
+ nvicEnableVector(STM32_TIM22_NUMBER, STM32_GPT_TIM22_IRQ_PRIORITY);
+#endif
+#if defined(STM32_TIM22CLK)
+ gptp->clock = STM32_TIM22CLK;
+#else
+ gptp->clock = STM32_TIMCLK1;
+#endif
+ }
+#endif
}
/* Prescaler value calculation.*/
@@ -806,6 +906,24 @@ void gpt_lld_stop(GPTDriver *gptp) {
rccDisableTIM14();
}
#endif
+
+#if STM32_GPT_USE_TIM21
+ if (&GPTD21 == gptp) {
+#if !defined(STM32_TIM21_SUPPRESS_ISR)
+ nvicDisableVector(STM32_TIM21_NUMBER);
+#endif
+ rccDisableTIM21();
+ }
+#endif
+
+#if STM32_GPT_USE_TIM22
+ if (&GPTD22 == gptp) {
+#if !defined(STM32_TIM22_SUPPRESS_ISR)
+ nvicDisableVector(STM32_TIM22_NUMBER);
+#endif
+ rccDisableTIM22();
+ }
+#endif
}
}
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
index df6645c12..add2a4d8a 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
@@ -232,12 +232,78 @@
#if !defined(STM32_GPT_TIM14_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
#endif
+
+/**
+ * @brief GPTD21 interrupt priority level setting.
+ */
+#if !defined(STM32_GPT_TIM21_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_GPT_TIM21_IRQ_PRIORITY 7
+#endif
+
+/**
+ * @brief GPTD22 interrupt priority level setting.
+ */
+#if !defined(STM32_GPT_TIM22_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_GPT_TIM22_IRQ_PRIORITY 7
+#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
+#if !defined(STM32_HAS_TIM1)
+#define STM32_HAS_TIM1 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM2)
+#define STM32_HAS_TIM2 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM3)
+#define STM32_HAS_TIM3 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM4)
+#define STM32_HAS_TIM4 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM5)
+#define STM32_HAS_TIM5 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM6)
+#define STM32_HAS_TIM6 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM7)
+#define STM32_HAS_TIM7 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM8)
+#define STM32_HAS_TIM8 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM11)
+#define STM32_HAS_TIM11 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM12)
+#define STM32_HAS_TIM12 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM14)
+#define STM32_HAS_TIM14 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM21)
+#define STM32_HAS_TIM21 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM22)
+#define STM32_HAS_TIM22 FALSE
+#endif
+
#if STM32_GPT_USE_TIM1 && !STM32_HAS_TIM1
#error "TIM1 not present in the selected device"
#endif
@@ -286,12 +352,21 @@
#error "TIM14 not present in the selected device"
#endif
+#if STM32_GPT_USE_TIM21 && !STM32_HAS_TIM21
+#error "TIM14 not present in the selected device"
+#endif
+
+#if STM32_GPT_USE_TIM22 && !STM32_HAS_TIM22
+#error "TIM14 not present in the selected device"
+#endif
+
#if !STM32_GPT_USE_TIM1 && !STM32_GPT_USE_TIM2 && \
!STM32_GPT_USE_TIM3 && !STM32_GPT_USE_TIM4 && \
!STM32_GPT_USE_TIM5 && !STM32_GPT_USE_TIM6 && \
!STM32_GPT_USE_TIM7 && !STM32_GPT_USE_TIM8 && \
!STM32_GPT_USE_TIM9 && !STM32_GPT_USE_TIM11 && \
- !STM32_GPT_USE_TIM12 && !STM32_GPT_USE_TIM14
+ !STM32_GPT_USE_TIM12 && !STM32_GPT_USE_TIM14 && \
+ !STM32_GPT_USE_TIM21 && !STM32_GPT_USE_TIM22
#error "GPT driver activated but no TIM peripheral assigned"
#endif
@@ -392,6 +467,22 @@
#endif
#endif
+#if STM32_GPT_USE_TIM21
+#if defined(STM32_TIM21_IS_USED)
+#error "GPTD21 requires TIM21 but the timer is already used"
+#else
+#define STM32_TIM21_IS_USED
+#endif
+#endif
+
+#if STM32_GPT_USE_TIM22
+#if defined(STM32_TIM22_IS_USED)
+#error "GPTD22 requires TIM22 but the timer is already used"
+#else
+#define STM32_TIM22_IS_USED
+#endif
+#endif
+
/* IRQ priority checks.*/
#if STM32_GPT_USE_TIM1 && !defined(STM32_TIM1_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM1_IRQ_PRIORITY)
@@ -453,6 +544,16 @@
#error "Invalid IRQ priority assigned to TIM14"
#endif
+#if STM32_GPT_USE_TIM21 && !defined(STM32_TIM21_SUPPRESS_ISR) && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM21_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM21"
+#endif
+
+#if STM32_GPT_USE_TIM22 && !defined(STM32_TIM22_SUPPRESS_ISR) && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM22_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM22"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -620,6 +721,14 @@ extern GPTDriver GPTD12;
extern GPTDriver GPTD14;
#endif
+#if STM32_GPT_USE_TIM21 && !defined(__DOXYGEN__)
+extern GPTDriver GPTD21;
+#endif
+
+#if STM32_GPT_USE_TIM22 && !defined(__DOXYGEN__)
+extern GPTDriver GPTD22;
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h
index e516da6b9..90c984fc4 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h
@@ -158,6 +158,34 @@
/* Derived constants and error checks. */
/*===========================================================================*/
+#if !defined(STM32_HAS_TIM1)
+#define STM32_HAS_TIM1 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM2)
+#define STM32_HAS_TIM2 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM3)
+#define STM32_HAS_TIM3 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM4)
+#define STM32_HAS_TIM4 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM5)
+#define STM32_HAS_TIM5 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM8)
+#define STM32_HAS_TIM8 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM9)
+#define STM32_HAS_TIM9 FALSE
+#endif
+
#if STM32_ICU_USE_TIM1 && !STM32_HAS_TIM1
#error "TIM1 not present in the selected device"
#endif
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h
index 24ca5c430..f54aa97c5 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h
@@ -208,6 +208,34 @@
/* Configuration checks. */
/*===========================================================================*/
+#if !defined(STM32_HAS_TIM1)
+#define STM32_HAS_TIM1 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM2)
+#define STM32_HAS_TIM2 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM3)
+#define STM32_HAS_TIM3 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM4)
+#define STM32_HAS_TIM4 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM5)
+#define STM32_HAS_TIM5 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM8)
+#define STM32_HAS_TIM8 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM9)
+#define STM32_HAS_TIM9 FALSE
+#endif
+
#if STM32_PWM_USE_TIM1 && !STM32_HAS_TIM1
#error "TIM1 not present in the selected device"
#endif
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.h
index f4febb6c8..e9e1a83c8 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.h
@@ -65,6 +65,30 @@
/* Derived constants and error checks. */
/*===========================================================================*/
+#if !defined(STM32_HAS_TIM2)
+#define STM32_HAS_TIM2 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM3)
+#define STM32_HAS_TIM3 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM4)
+#define STM32_HAS_TIM4 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM5)
+#define STM32_HAS_TIM5 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM21)
+#define STM32_HAS_TIM21 FALSE
+#endif
+
+#if !defined(STM32_HAS_TIM22)
+#define STM32_HAS_TIM22 FALSE
+#endif
+
#if STM32_ST_USE_TIMER == 2
#if !STM32_HAS_TIM2
#error "TIM2 not present"
diff --git a/readme.txt b/readme.txt
index df4a0a985..827ffe949 100644
--- a/readme.txt
+++ b/readme.txt
@@ -75,7 +75,8 @@
*****************************************************************************
*** Next ***
-- NEW: Added support or STM32L072 and STM32L073.
+- NEW: Added support for TIM21 and TIM22 in STM32 GPT driver.
+- NEW: Added support for STM32L072 and STM32L073.
- NEW: Added chThdResume() function to NIL.
- NEW: Removed QSPI driver model, entirely replaced by WSPI.
- NEW: Added demos regarding WSPI, serial nor driver and MFS.
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-09 15:16:03 +0000