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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-12-02 08:35:46 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-12-02 08:35:46 +0000 |
| commit | 7055e2b5aa1d15c342cd97a0750801fdc13beac6 (patch) | |
| tree | b56515171d4868ee63b65e7238dc6aa7fd84b6ee /os/hal/ports/STM32/LLD/GPIOv2 | |
| parent | 7d22893a937df028e2d702dadc5da8375d6239e3 (diff) | |
| download | ChibiOS-7055e2b5aa1d15c342cd97a0750801fdc13beac6.tar.gz ChibiOS-7055e2b5aa1d15c342cd97a0750801fdc13beac6.tar.bz2 ChibiOS-7055e2b5aa1d15c342cd97a0750801fdc13beac6.zip | |
All STM32 GPIOv2 platforms reworked for the new board files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11099 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/GPIOv2')
| -rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c index a1f7af755..85d16a375 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c @@ -30,22 +30,6 @@ /* Driver local definitions. */
/*===========================================================================*/
-#if defined(STM32L0XX) || defined(STM32L1XX)
-#define AHB_EN_MASK STM32_GPIO_EN_MASK
-#define AHB_LPEN_MASK AHB_EN_MASK
-
-#elif defined(STM32F0XX) || defined(STM32F3XX) || defined(STM32F37X)
-#define AHB_EN_MASK STM32_GPIO_EN_MASK
-#define AHB_LPEN_MASK 0
-
-#elif defined(STM32F2XX) || defined(STM32F4XX) || defined(STM32F7XX)
-#define AHB1_EN_MASK STM32_GPIO_EN_MASK
-#define AHB1_LPEN_MASK AHB1_EN_MASK
-
-#else
-#error "missing or unsupported platform for GPIOv2 PAL driver"
-#endif
-
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@@ -85,26 +69,6 @@ void _pal_lld_init(void) { _pal_init_event(i);
}
#endif
-
-#if 0
- /*
- * Enables the GPIO related clocks.
- */
-#if defined(STM32L0XX)
- RCC->IOPENR |= AHB_EN_MASK;
- RCC->IOPSMENR |= AHB_LPEN_MASK;
-#elif defined(STM32L1XX)
- rccEnableAHB(AHB_EN_MASK, TRUE);
- RCC->AHBLPENR |= AHB_LPEN_MASK;
-#elif defined(STM32F0XX)
- rccEnableAHB(AHB_EN_MASK, TRUE);
-#elif defined(STM32F3XX) || defined(STM32F37X)
- rccEnableAHB(AHB_EN_MASK, TRUE);
-#elif defined(STM32F2XX) || defined(STM32F4XX) || defined(STM32F7XX)
- RCC->AHB1ENR |= AHB1_EN_MASK;
- RCC->AHB1LPENR |= AHB1_LPEN_MASK;
-#endif
-#endif
}
/**
|