diff options
author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-13 09:52:26 +0000 |
---|---|---|
committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-13 09:52:26 +0000 |
commit | 4fb6d9644ed9672096ddf813262f7d869dbfbb93 (patch) | |
tree | 7a095d5a25b269d1f76a69a79b7703a5610ce438 /os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | |
parent | db45dfbe9e27eec80c104270d326f7843810f0dc (diff) | |
download | ChibiOS-4fb6d9644ed9672096ddf813262f7d869dbfbb93.tar.gz ChibiOS-4fb6d9644ed9672096ddf813262f7d869dbfbb93.tar.bz2 ChibiOS-4fb6d9644ed9672096ddf813262f7d869dbfbb93.zip |
Addded pin lock capability to STM32 GPIOv3 driver and board files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8476 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c')
-rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | 42 |
1 files changed, 1 insertions, 41 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c index 9cc91e545..40f9e4dfc 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c @@ -156,7 +156,6 @@ void _pal_lld_init(const PALConfig *config) { *
* @notapi
*/
-#if 1
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
iomode_t mode) {
@@ -167,7 +166,7 @@ void _pal_lld_setgroupmode(ioportid_t port, uint32_t pupdr = (mode & PAL_STM32_PUDR_MASK) >> 5;
uint32_t altr = (mode & PAL_STM32_ALTERNATE_MASK) >> 7;
uint32_t bit = 0;
- while (TRUE) {
+ while (true) {
if ((mask & 1) != 0) {
uint32_t altrmask, m1, m2, m4;
@@ -194,45 +193,6 @@ void _pal_lld_setgroupmode(ioportid_t port, bit++;
}
}
-#else
-void _pal_lld_setgroupmode(ioportid_t port,
- ioportmask_t mask,
- iomode_t mode) {
- uint32_t afrm, moderm, pupdrm, otyperm, ospeedrm;
- uint32_t m1 = (uint32_t)mask;
- uint32_t m2 = 0;
- uint32_t m4l = 0;
- uint32_t m4h = 0;
- uint32_t bit = 0;
- do {
- if ((mask & 1) != 0) {
- m2 |= 3 << bit;
- if (bit < 16)
- m4l |= 15 << ((bit & 14) * 2);
- else
- m4h |= 15 << ((bit & 14) * 2);
- }
- bit += 2;
- mask >>= 1;
- } while (mask);
-
- afrm = ((mode & PAL_STM32_ALTERNATE_MASK) >> 7) * 0x1111;
- port->AFRL = (port->AFRL & ~m4l) | (afrm & m4l);
- port->AFRH = (port->AFRH & ~m4h) | (afrm & m4h);
-
- ospeedrm = ((mode & PAL_STM32_OSPEED_MASK) >> 3) * 0x5555;
- port->OSPEEDR = (port->OSPEEDR & ~m2) | (ospeedrm & m2);
-
- otyperm = ((mode & PAL_STM32_OTYPE_MASK) >> 2) * 0xffff;
- port->OTYPER = (port->OTYPER & ~m1) | (otyperm & m1);
-
- pupdrm = ((mode & PAL_STM32_PUDR_MASK) >> 5) * 0x5555;
- port->PUPDR = (port->PUPDR & ~m2) | (pupdrm & m2);
-
- moderm = ((mode & PAL_STM32_MODE_MASK) >> 0) * 0x5555;
- port->MODER = (port->MODER & ~m2) | (moderm & m2);
-}
-#endif
#endif /* HAL_USE_PAL */
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