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| author | edolomb <none@example.com> | 2018-01-10 16:49:56 +0000 |
|---|---|---|
| committer | edolomb <none@example.com> | 2018-01-10 16:49:56 +0000 |
| commit | 02f181b45c1f060f2641f8938d693d4f26822b04 (patch) | |
| tree | b694a413324ba6975e8a0db0d4ffa78b44959dfd /os/hal/ports/SAMA | |
| parent | b2b85afbf933c23849584b2c391e46986020b189 (diff) | |
| download | ChibiOS-02f181b45c1f060f2641f8938d693d4f26822b04.tar.gz ChibiOS-02f181b45c1f060f2641f8938d693d4f26822b04.tar.bz2 ChibiOS-02f181b45c1f060f2641f8938d693d4f26822b04.zip | |
Clearing pending interrupts in aicInit()
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11253 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/SAMA')
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/aic.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/os/hal/ports/SAMA/SAMA5D2x/aic.c b/os/hal/ports/SAMA/SAMA5D2x/aic.c index 6def5c51a..2b5d95e61 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/aic.c +++ b/os/hal/ports/SAMA/SAMA5D2x/aic.c @@ -98,12 +98,26 @@ void aicInit(void) { Aic *aic = AIC;
#endif
+ aicDisableWP(aic);
unsigned i;
/* Disable all interrupts */
for (i = 1; i < ID_PERIPH_COUNT; i++) {
aic->AIC_SSR = i;
aic->AIC_IDCR = AIC_IDCR_INTD;
+
+ /* Changes type */
+ aic->AIC_SSR = i;
+ aic->AIC_SMR = AIC_SMR_SRCTYPE(EXT_NEGATIVE_EDGE);
+
+ /* Clear pending interrupt */
+ aic->AIC_SSR = i;
+ aic->AIC_ICCR = AIC_ICCR_INTCLR;
+
+ /* Changes type */
+ aic->AIC_SSR = i;
+ aic->AIC_SMR = AIC_SMR_SRCTYPE(INT_LEVEL_SENSITIVE);
}
+ aicEnableWP(aic);
}
/**
@@ -138,6 +152,33 @@ void aicSetSourcePriority(uint32_t source, uint8_t priority) { }
/**
+ * @brief Configures type of interrupt in the AIC.
+ *
+ * @param[in] source interrupt source to configure
+ * @param[in] type type interrupt of the selected source.
+ */
+void aicSetIntSourceType(uint32_t source, uint8_t type) {
+
+#if SAMA_HAL_IS_SECURE
+ Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
+ /* Disable write protection */
+ aicDisableWP(aic);
+ /* Set source id */
+ aic->AIC_SSR = source;
+ /* Disable the interrupt first */
+ aic->AIC_IDCR = AIC_IDCR_INTD;
+ /* Configure priority */
+ aic->AIC_SMR = AIC_SMR_SRCTYPE(type);
+ /* Clear interrupt */
+ aic->AIC_ICCR = AIC_ICCR_INTCLR;
+ /* Enable write protection */
+ aicEnableWP(aic);
+}
+
+/**
* @brief Sets the source handler of an interrupt.
*
* @param[in] source interrupt source to configure
|