From 02f181b45c1f060f2641f8938d693d4f26822b04 Mon Sep 17 00:00:00 2001 From: edolomb Date: Wed, 10 Jan 2018 16:49:56 +0000 Subject: Clearing pending interrupts in aicInit() git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11253 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/SAMA/SAMA5D2x/aic.c | 41 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'os/hal/ports/SAMA') diff --git a/os/hal/ports/SAMA/SAMA5D2x/aic.c b/os/hal/ports/SAMA/SAMA5D2x/aic.c index 6def5c51a..2b5d95e61 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/aic.c +++ b/os/hal/ports/SAMA/SAMA5D2x/aic.c @@ -98,12 +98,26 @@ void aicInit(void) { Aic *aic = AIC; #endif + aicDisableWP(aic); unsigned i; /* Disable all interrupts */ for (i = 1; i < ID_PERIPH_COUNT; i++) { aic->AIC_SSR = i; aic->AIC_IDCR = AIC_IDCR_INTD; + + /* Changes type */ + aic->AIC_SSR = i; + aic->AIC_SMR = AIC_SMR_SRCTYPE(EXT_NEGATIVE_EDGE); + + /* Clear pending interrupt */ + aic->AIC_SSR = i; + aic->AIC_ICCR = AIC_ICCR_INTCLR; + + /* Changes type */ + aic->AIC_SSR = i; + aic->AIC_SMR = AIC_SMR_SRCTYPE(INT_LEVEL_SENSITIVE); } + aicEnableWP(aic); } /** @@ -137,6 +151,33 @@ void aicSetSourcePriority(uint32_t source, uint8_t priority) { aicEnableWP(aic); } +/** + * @brief Configures type of interrupt in the AIC. + * + * @param[in] source interrupt source to configure + * @param[in] type type interrupt of the selected source. + */ +void aicSetIntSourceType(uint32_t source, uint8_t type) { + +#if SAMA_HAL_IS_SECURE + Aic *aic = SAIC; +#else + Aic *aic = AIC; +#endif + /* Disable write protection */ + aicDisableWP(aic); + /* Set source id */ + aic->AIC_SSR = source; + /* Disable the interrupt first */ + aic->AIC_IDCR = AIC_IDCR_INTD; + /* Configure priority */ + aic->AIC_SMR = AIC_SMR_SRCTYPE(type); + /* Clear interrupt */ + aic->AIC_ICCR = AIC_ICCR_INTCLR; + /* Enable write protection */ + aicEnableWP(aic); +} + /** * @brief Sets the source handler of an interrupt. * -- cgit v1.2.3