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author | isiora <none@example.com> | 2017-10-22 21:52:19 +0000 |
---|---|---|
committer | isiora <none@example.com> | 2017-10-22 21:52:19 +0000 |
commit | fd2b5f1738bb568dc8de1ee01e33d2ce39b4eab3 (patch) | |
tree | c0bc60642af5805b15935a1be164034f003a68c4 /os/hal/ports/SAMA/SAMA5D2x/aic.c | |
parent | 211dcdd26d5b6355ac217832746b2c2b27a48522 (diff) | |
download | ChibiOS-fd2b5f1738bb568dc8de1ee01e33d2ce39b4eab3.tar.gz ChibiOS-fd2b5f1738bb568dc8de1ee01e33d2ce39b4eab3.tar.bz2 ChibiOS-fd2b5f1738bb568dc8de1ee01e33d2ce39b4eab3.zip |
Reintegrate sama5d2_dev branch
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10879 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/SAMA/SAMA5D2x/aic.c')
-rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/aic.c | 47 |
1 files changed, 40 insertions, 7 deletions
diff --git a/os/hal/ports/SAMA/SAMA5D2x/aic.c b/os/hal/ports/SAMA/SAMA5D2x/aic.c index 22dc8cbc4..6def5c51a 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/aic.c +++ b/os/hal/ports/SAMA/SAMA5D2x/aic.c @@ -18,7 +18,7 @@ * @file SAMA5D2x/aic.c
* @brief SAMA AIC support code.
*
- * @addtogroup COMMON_SAMA5D2x_AIC
+ * @addtogroup SAMA5D2x_AIC
* @{
*/
@@ -70,6 +70,16 @@ aicp->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD; \
}
+/**
+ * @brief Checks if a IRQ priority is within the valid range.
+ * @param[in] prio IRQ priority
+ *
+ * @retval The check result.
+ * @retval FALSE invalid IRQ priority.
+ * @retval TRUE correct IRQ priority.
+ */
+#define SAMA_IRQ_IS_VALID_PRIORITY(prio) ((prio) <= 7U)
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -94,11 +104,6 @@ void aicInit(void) { aic->AIC_SSR = i;
aic->AIC_IDCR = AIC_IDCR_INTD;
}
- /* Clear All pending interrupts flags */
- for (i = 0; i < ID_PERIPH_COUNT; i++) {
- aic->AIC_SSR = i;
- aic->AIC_ICCR = AIC_ICCR_INTCLR;
- }
}
/**
@@ -110,10 +115,14 @@ void aicInit(void) { */
void aicSetSourcePriority(uint32_t source, uint8_t priority) {
+#if SAMA_HAL_IS_SECURE
Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
osalDbgCheck(source != ID_SAIC_FIQ);
-
+ osalDbgAssert(SAMA_IRQ_IS_VALID_PRIORITY(priority), "invalid irq priority");
/* Disable write protection */
aicDisableWP(aic);
/* Set source id */
@@ -136,7 +145,11 @@ void aicSetSourcePriority(uint32_t source, uint8_t priority) { */
void aicSetSourceHandler(uint32_t source, bool (*handler)(void)) {
+#if SAMA_HAL_IS_SECURE
Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
/* Disable write protection */
aicDisableWP(aic);
@@ -154,7 +167,11 @@ void aicSetSourceHandler(uint32_t source, bool (*handler)(void)) { */
void aicSetSpuriousHandler(bool (*handler)(void)) {
+#if SAMA_HAL_IS_SECURE
Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
/* Disable write protection */
aicDisableWP(aic);
@@ -171,7 +188,11 @@ void aicSetSpuriousHandler(bool (*handler)(void)) { */
void aicEnableInt(uint32_t source) {
+#if SAMA_HAL_IS_SECURE
Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
aic->AIC_SSR = AIC_SSR_INTSEL(source);
aic->AIC_IECR = AIC_IECR_INTEN;
@@ -184,7 +205,11 @@ void aicEnableInt(uint32_t source) { */
void aicDisableInt(uint32_t source) {
+#if SAMA_HAL_IS_SECURE
Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
aic->AIC_SSR = AIC_SSR_INTSEL(source);
aic->AIC_IDCR = AIC_IDCR_INTD;
@@ -197,7 +222,11 @@ void aicDisableInt(uint32_t source) { */
void aicClearInt(uint32_t source) {
+#if SAMA_HAL_IS_SECURE
Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
aic->AIC_SSR = AIC_SSR_INTSEL(source);
aic->AIC_ICCR = AIC_ICCR_INTCLR;
@@ -210,7 +239,11 @@ void aicClearInt(uint32_t source) { */
void aicSetInt(uint32_t source) {
+#if SAMA_HAL_IS_SECURE
Aic *aic = SAIC;
+#else
+ Aic *aic = AIC;
+#endif
aic->AIC_SSR = AIC_SSR_INTSEL(source);
aic->AIC_ISCR = AIC_ISCR_INTSET;
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