Reintegrate sama5d2_dev branch

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10879 35acf78f-673a-0410-8e92-d51de3d6d3f4

14 files changed, 807 insertions, 335 deletions

diff --git a/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.c
index 351d61671..5c32139df 100644
--- a/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.c
+++ b/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.c
@@ -79,43 +79,43 @@ SPIDriver SPID1;
  * @brief   SPI FLEXCOM0 driver identifier.

  */

 #if SAMA_SPI_USE_FLEXCOM0 || defined(__DOXYGEN__)

-SPIDriver SPIFLEXD0;

+SPIDriver FSPID0;

 #endif

 

 /**

  * @brief   SPI FLEXCOM1 driver identifier.

  */

 #if SAMA_SPI_USE_FLEXCOM1 || defined(__DOXYGEN__)

-SPIDriver SPIFLEXD1;

+SPIDriver FSPID1;

 #endif

 

 /**

  * @brief   SPI FLEXCOM2 driver identifier.

  */

 #if SAMA_SPI_USE_FLEXCOM2 || defined(__DOXYGEN__)

-SPIDriver SPIFLEXD2;

+SPIDriver FSPID2;

 #endif

 

 /**

  * @brief   SPI FLEXCOM3 driver identifier.

  */

 #if SAMA_SPI_USE_FLEXCOM3 || defined(__DOXYGEN__)

-SPIDriver SPIFLEXD3;

+SPIDriver FSPID3;

 #endif

 

 /**

  * @brief   SPI FLEXCOM4 driver identifier.

  */

 #if SAMA_SPI_USE_FLEXCOM4 || defined(__DOXYGEN__)

-SPIDriver SPIFLEXD4;

+SPIDriver FSPID4;

 #endif

 

 /*===========================================================================*/

 /* Driver local variables and types.                                         */

 /*===========================================================================*/

 

-static const uint16_t dummytx = 0xFFFFU;

-static uint16_t dummyrx;

+static const uint8_t dummytx = 0xFFU;

+static uint8_t dummyrx;

 

 /*===========================================================================*/

 /* Driver local functions.                                                   */

@@ -244,12 +244,12 @@ void spi_lld_init(void) {
 

 #if SAMA_SPI_USE_FLEXCOM0

   /* Driver initialization.*/

-  spiObjectInit(&SPIFLEXD0);

-  SPIFLEXD0.spi       = FCOMSPI0;

-  SPIFLEXD0.flexcom   = FLEXCOM0;

-  SPIFLEXD0.dmarx     = NULL;

-  SPIFLEXD0.dmatx     = NULL;

-  SPIFLEXD0.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  spiObjectInit(&FSPID0);

+  FSPID0.spi       = FCOMSPI0;

+  FSPID0.flexcom   = FLEXCOM0;

+  FSPID0.dmarx     = NULL;

+  FSPID0.dmatx     = NULL;

+  FSPID0.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_PER2MEM |

                         XDMAC_CC_PROT_SEC |

@@ -260,7 +260,7 @@ void spi_lld_init(void) {
                         XDMAC_CC_SAM_FIXED_AM |

                         XDMAC_CC_DAM_INCREMENTED_AM |

                         XDMAC_CC_PERID(PERID_FLEXCOM0_RX);

-  SPIFLEXD0.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  FSPID0.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_MEM2PER |

                         XDMAC_CC_PROT_SEC |

@@ -275,12 +275,12 @@ void spi_lld_init(void) {
 

 #if SAMA_SPI_USE_FLEXCOM1

   /* Driver initialization.*/

-  spiObjectInit(&SPIFLEXD1);

-  SPIFLEXD1.spi       = FCOMSPI1;

-  SPIFLEXD1.flexcom   = FLEXCOM1;

-  SPIFLEXD1.dmarx     = NULL;

-  SPIFLEXD1.dmatx     = NULL;

-  SPIFLEXD1.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  spiObjectInit(&FSPID1);

+  FSPID1.spi       = FCOMSPI1;

+  FSPID1.flexcom   = FLEXCOM1;

+  FSPID1.dmarx     = NULL;

+  FSPID1.dmatx     = NULL;

+  FSPID1.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_PER2MEM |

                         XDMAC_CC_PROT_SEC |

@@ -291,7 +291,7 @@ void spi_lld_init(void) {
                         XDMAC_CC_SAM_FIXED_AM |

                         XDMAC_CC_DAM_INCREMENTED_AM |

                         XDMAC_CC_PERID(PERID_FLEXCOM1_RX);

-  SPIFLEXD1.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  FSPID1.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_MEM2PER |

                         XDMAC_CC_PROT_SEC |

@@ -306,12 +306,12 @@ void spi_lld_init(void) {
 

 #if SAMA_SPI_USE_FLEXCOM2

   /* Driver initialization.*/

-  spiObjectInit(&SPIFLEXD2);

-  SPIFLEXD2.spi       = FCOMSPI2;

-  SPIFLEXD2.flexcom   = FLEXCOM2;

-  SPIFLEXD2.dmarx     = NULL;

-  SPIFLEXD2.dmatx     = NULL;

-  SPIFLEXD2.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  spiObjectInit(&FSPID2);

+  FSPID2.spi       = FCOMSPI2;

+  FSPID2.flexcom   = FLEXCOM2;

+  FSPID2.dmarx     = NULL;

+  FSPID2.dmatx     = NULL;

+  FSPID2.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_PER2MEM |

                         XDMAC_CC_PROT_SEC |

@@ -322,7 +322,7 @@ void spi_lld_init(void) {
                         XDMAC_CC_SAM_FIXED_AM |

                         XDMAC_CC_DAM_INCREMENTED_AM |

                         XDMAC_CC_PERID(PERID_FLEXCOM2_RX);

-  SPIFLEXD2.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  FSPID2.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_MEM2PER |

                         XDMAC_CC_PROT_SEC |

@@ -337,12 +337,12 @@ void spi_lld_init(void) {
 

 #if SAMA_SPI_USE_FLEXCOM3

   /* Driver initialization.*/

-  spiObjectInit(&SPIFLEXD3);

-  SPIFLEXD3.spi       = FCOMSPI3;

-  SPIFLEXD3.flexcom   = FLEXCOM3;

-  SPIFLEXD3.dmarx     = NULL;

-  SPIFLEXD3.dmatx     = NULL;

-  SPIFLEXD3.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  spiObjectInit(&FSPID3);

+  FSPID3.spi       = FCOMSPI3;

+  FSPID3.flexcom   = FLEXCOM3;

+  FSPID3.dmarx     = NULL;

+  FSPID3.dmatx     = NULL;

+  FSPID3.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_PER2MEM |

                         XDMAC_CC_PROT_SEC |

@@ -353,7 +353,7 @@ void spi_lld_init(void) {
                         XDMAC_CC_SAM_FIXED_AM |

                         XDMAC_CC_DAM_INCREMENTED_AM |

                         XDMAC_CC_PERID(PERID_FLEXCOM3_RX);

-  SPIFLEXD3.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  FSPID3.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_MEM2PER |

                         XDMAC_CC_PROT_SEC |

@@ -368,12 +368,12 @@ void spi_lld_init(void) {
 

 #if SAMA_SPI_USE_FLEXCOM4

   /* Driver initialization.*/

-  spiObjectInit(&SPIFLEXD4);

-  SPIFLEXD4.spi       = FCOMSPI4;

-  SPIFLEXD4.flexcom   = FLEXCOM4;

-  SPIFLEXD4.dmarx     = NULL;

-  SPIFLEXD4.dmatx     = NULL;

-  SPIFLEXD4.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  spiObjectInit(&FSPID4);

+  FSPID4.spi       = FCOMSPI4;

+  FSPID4.flexcom   = FLEXCOM4;

+  FSPID4.dmarx     = NULL;

+  FSPID4.dmatx     = NULL;

+  FSPID4.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_PER2MEM |

                         XDMAC_CC_PROT_SEC |

@@ -384,7 +384,7 @@ void spi_lld_init(void) {
                         XDMAC_CC_SAM_FIXED_AM |

                         XDMAC_CC_DAM_INCREMENTED_AM |

                         XDMAC_CC_PERID(PERID_FLEXCOM4_RX);

-  SPIFLEXD4.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+  FSPID4.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

                         XDMAC_CC_MBSIZE_SINGLE |

                         XDMAC_CC_DSYNC_MEM2PER |

                         XDMAC_CC_PROT_SEC |

@@ -416,11 +416,12 @@ void spi_lld_start(SPIDriver *spip) {
       spip->dmarx = dmaChannelAllocate(SAMA_SPI_SPI0_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_rx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "no channel allocated");

 

       spip->dmatx = dmaChannelAllocate(SAMA_SPI_SPI0_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_tx_interrupt,

                                        (void *)spip);

-

+      osalDbgAssert(spip->dmatx != NULL, "no channel allocated");

     /* Enable SPI0 clock */

       pmcEnableSPI0();

     }

@@ -430,23 +431,27 @@ void spi_lld_start(SPIDriver *spip) {
       spip->dmarx = dmaChannelAllocate(SAMA_SPI_SPI1_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_rx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "no channel allocated");

 

       spip->dmatx = dmaChannelAllocate(SAMA_SPI_SPI1_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_tx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "no channel allocated");

     /* Enable SPI1 clock */

       pmcEnableSPI1();

     }

 #endif /* SAMA_SPI_USE_SPI1 */

 #if SAMA_SPI_USE_FLEXCOM0

-    if (&SPIFLEXD0 == spip) {

+    if (&FSPID0 == spip) {

       spip->dmarx = dmaChannelAllocate(SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_rx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "no channel allocated");

 

       spip->dmatx = dmaChannelAllocate(SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_tx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "no channel allocated");

     /* Enabling USART on FLEXCOM */

       spip->flexcom->FLEX_MR = FLEX_MR_OPMODE_SPI;

     /* Enable FLEXCOM0 clock */

@@ -454,14 +459,16 @@ void spi_lld_start(SPIDriver *spip) {
     }

 #endif /* SAMA_SPI_USE_FLEXCOM0 */

 #if SAMA_SPI_USE_FLEXCOM1

-    if (&SPIFLEXD1 == spip) {

+    if (&FSPID1 == spip) {

       spip->dmarx = dmaChannelAllocate(SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_rx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "no channel allocated");

 

       spip->dmatx = dmaChannelAllocate(SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_tx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "no channel allocated");

     /* Enabling USART on FLEXCOM */

       spip->flexcom->FLEX_MR = FLEX_MR_OPMODE_SPI;

     /* Enable FLEXCOM1 clock */

@@ -469,14 +476,16 @@ void spi_lld_start(SPIDriver *spip) {
     }

 #endif /* SAMA_SPI_USE_FLEXCOM1 */

 #if SAMA_SPI_USE_FLEXCOM2

-    if (&SPIFLEXD2 == spip) {

+    if (&FSPID2 == spip) {

       spip->dmarx = dmaChannelAllocate(SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_rx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "no channel allocated");

 

       spip->dmatx = dmaChannelAllocate(SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_tx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "no channel allocated");

     /* Enabling USART on FLEXCOM */

       spip->flexcom->FLEX_MR = FLEX_MR_OPMODE_SPI;

     /* Enable FLEXCOM2 clock */

@@ -484,14 +493,16 @@ void spi_lld_start(SPIDriver *spip) {
     }

 #endif /* SAMA_SPI_USE_FLEXCOM2 */

 #if SAMA_SPI_USE_FLEXCOM3

-    if (&SPIFLEXD3 == spip) {

+    if (&FSPID3 == spip) {

       spip->dmarx = dmaChannelAllocate(SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_rx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "no channel allocated");

 

       spip->dmatx = dmaChannelAllocate(SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_tx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "no channel allocated");

     /* Enabling USART on FLEXCOM */

       spip->flexcom->FLEX_MR = FLEX_MR_OPMODE_SPI;

     /* Enable FLEXCOM3 clock */

@@ -499,14 +510,16 @@ void spi_lld_start(SPIDriver *spip) {
     }

 #endif /* SAMA_SPI_USE_FLEXCOM3 */

 #if SAMA_SPI_USE_FLEXCOM4

-    if (&SPIFLEXD4 == spip) {

+    if (&FSPID4 == spip) {

       spip->dmarx = dmaChannelAllocate(SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_rx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "no channel allocated");

 

       spip->dmatx = dmaChannelAllocate(SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)spi_lld_serve_tx_interrupt,

                                        (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "no channel allocated");

     /* Enabling USART on FLEXCOM */

       spip->flexcom->FLEX_MR = FLEX_MR_OPMODE_SPI;

     /* Enable FLEXCOM4 clock */

@@ -527,7 +540,7 @@ void spi_lld_start(SPIDriver *spip) {
   spip->spi->SPI_CR = SPI_CR_SWRST;

 

   /* SPI configuration */

-  spip->spi->SPI_MR = spip->config->mr;

+  spip->spi->SPI_MR = SPI_MR_MSTR | spip->config->mr;

   spip->spi->SPI_MR &= ~SPI_MR_PCS_Msk;

   spip->spi->SPI_MR |=  SPI_PCS(spip->config->npcs);

   spip->spi->SPI_CSR[spip->config->npcs] = spip->config->csr;

@@ -578,35 +591,35 @@ void spi_lld_stop(SPIDriver *spip) {
 #endif /* SAMA_SPI_USE_FLEXCOM0 */

 

 #if SAMA_SPI_USE_FLEXCOM0

-    if (&SPIFLEXD0 == spip)

+    if (&FSPID0 == spip)

     /* Disable FLEXCOM0 clock */

       pmcDisableFLEXCOM0();

 

 #endif /* SAMA_SPI_USE_FLEXCOM0 */

 

 #if SAMA_SPI_USE_FLEXCOM1

-    if (&SPIFLEXD1 == spip)

+    if (&FSPID1 == spip)

     /* Disable FLEXCOM1 clock */

       pmcDisableFLEXCOM1();

 

 #endif /* SAMA_SPI_USE_FLEXCOM1 */

 

 #if SAMA_SPI_USE_FLEXCOM2

-    if (&SPIFLEXD2 == spip)

+    if (&FSPID2 == spip)

     /* Disable FLEXCOM2 clock */

       pmcDisableFLEXCOM2();

 

 #endif /* SAMA_SPI_USE_FLEXCOM2 */

 

 #if SAMA_SPI_USE_FLEXCOM3

-    if (&SPIFLEXD3 == spip)

+    if (&FSPID3 == spip)

     /* Disable FLEXCOM3 clock */

       pmcDisableFLEXCOM3();

 

 #endif /* SAMA_SPI_USE_FLEXCOM3 */

 

 #if SAMA_SPI_USE_FLEXCOM4

-    if (&SPIFLEXD4 == spip)

+    if (&FSPID4 == spip)

     /* Disable FLEXCOM4 clock */

       pmcDisableFLEXCOM4();

 

@@ -696,9 +709,15 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
   dmaChannelSetSource(spip->dmarx, &spip->spi->SPI_RDR);

   dmaChannelSetDestination(spip->dmarx, &dummyrx);

   dmaChannelSetTransactionSize(spip->dmarx, n);

+  /* Enable write protection.  */

 

   dmaChannelEnable(spip->dmarx);

   dmaChannelEnable(spip->dmatx);

+

+  /* Waiting TXEMPTY flag */

+  while (!(spip->spi->SPI_SR & SPI_SR_TXEMPTY)) {

+    ;

+  }

 }

 

 /**

diff --git a/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.h
index 5d19b6555..ab2c7f2ad 100644
--- a/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.h
+++ b/os/hal/ports/SAMA/LLD/SPIv1/hal_spi_lld.h
@@ -175,7 +175,7 @@
 /* Checks on allocation of UARTx units.*/

 #if SAMA_SPI_USE_FLEXCOM0

 #if defined(SAMA_FLEXCOM0_IS_USED)

-#error "SPIFLEXD0 requires FLEXCOM0 but the peripheral is already used"

+#error "FSPID0 requires FLEXCOM0 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM0_IS_USED

 #endif

@@ -183,7 +183,7 @@
 

 #if SAMA_SPI_USE_FLEXCOM1

 #if defined(SAMA_FLEXCOM1_IS_USED)

-#error "SPIFLEXD1 requires FLEXCOM1 but the peripheral is already used"

+#error "FSPID1 requires FLEXCOM1 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM1_IS_USED

 #endif

@@ -191,7 +191,7 @@
 

 #if SAMA_SPI_USE_FLEXCOM2

 #if defined(SAMA_FLEXCOM2_IS_USED)

-#error "SPIFLEXD2 requires FLEXCOM2 but the peripheral is already used"

+#error "FSPID2 requires FLEXCOM2 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM2_IS_USED

 #endif

@@ -199,7 +199,7 @@
 

 #if SAMA_SPI_USE_FLEXCOM3

 #if defined(SAMA_FLEXCOM3_IS_USED)

-#error "SPIFLEXD3 requires FLEXCOM3 but the peripheral is already used"

+#error "FSPID3 requires FLEXCOM3 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM3_IS_USED

 #endif

@@ -207,7 +207,7 @@
 

 #if SAMA_SPI_USE_FLEXCOM4

 #if defined(SAMA_FLEXCOM4_IS_USED)

-#error "SPIFLEXD4 requires FLEXCOM4 but the peripheral is already used"

+#error "FSPID4 requires FLEXCOM4 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM4_IS_USED

 #endif

@@ -339,23 +339,23 @@ extern SPIDriver SPID1;
 #endif

 

 #if SAMA_SPI_USE_FLEXCOM0 && !defined(__DOXYGEN__)

-extern SPIDriver SPIFLEXD0;

+extern SPIDriver FSPID0;

 #endif

 

 #if SAMA_SPI_USE_FLEXCOM1 && !defined(__DOXYGEN__)

-extern SPIDriver SPIFLEXD1;

+extern SPIDriver FSPID1;

 #endif

 

 #if SAMA_SPI_USE_FLEXCOM2 && !defined(__DOXYGEN__)

-extern SPIDriver SPIFLEXD2;

+extern SPIDriver FSPID2;

 #endif

 

 #if SAMA_SPI_USE_FLEXCOM3 && !defined(__DOXYGEN__)

-extern SPIDriver SPIFLEXD3;

+extern SPIDriver FSPID3;

 #endif

 

 #if SAMA_SPI_USE_FLEXCOM4 && !defined(__DOXYGEN__)

-extern SPIDriver SPIFLEXD4;

+extern SPIDriver FSPID4;

 #endif

 

 #ifdef __cplusplus

diff --git a/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.c b/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.c
index eb42e0bcf..2fa78dc91 100644
--- a/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.c
+++ b/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.c
@@ -113,27 +113,27 @@ SerialDriver SD4;
 

 /** @brief FLEXCOM0 serial driver identifier.*/

 #if SAMA_SERIAL_USE_FLEXCOM0 || defined(__DOXYGEN__)

-SerialDriver SFLEXD0;

+SerialDriver FSD0;

 #endif

 

 /** @brief FLEXCOM1 serial driver identifier.*/

 #if SAMA_SERIAL_USE_FLEXCOM1 || defined(__DOXYGEN__)

-SerialDriver SFLEXD1;

+SerialDriver FSD1;

 #endif

 

 /** @brief FLEXCOM2 serial driver identifier.*/

 #if SAMA_SERIAL_USE_FLEXCOM2 || defined(__DOXYGEN__)

-SerialDriver SFLEXD2;

+SerialDriver FSD2;

 #endif

 

 /** @brief FLEXCOM3 serial driver identifier.*/

 #if SAMA_SERIAL_USE_FLEXCOM3 || defined(__DOXYGEN__)

-SerialDriver SFLEXD3;

+SerialDriver FSD3;

 #endif

 

 /** @brief FLEXCOM0 serial driver identifier.*/

 #if SAMA_SERIAL_USE_FLEXCOM4 || defined(__DOXYGEN__)

-SerialDriver SFLEXD4;

+SerialDriver FSD4;

 #endif

 

 /*===========================================================================*/

@@ -193,42 +193,42 @@ static uint8_t sd_out_buf4[SAMA_SERIAL_UART4_IN_BUF_SIZE];
 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM0 || defined(__DOXYGEN__)

-/** @brief Input buffer for SFLEXD0.*/

+/** @brief Input buffer for FSD0.*/

 static uint8_t sdFlex_in_buf0[SAMA_SERIAL_FLEXCOM0_IN_BUF_SIZE];

 

-/** @brief Output buffer for SFLEXD0.*/

+/** @brief Output buffer for FSD0.*/

 static uint8_t sdFlex_out_buf0[SAMA_SERIAL_FLEXCOM0_OUT_BUF_SIZE];

 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM1 || defined(__DOXYGEN__)

-/** @brief Input buffer for SFLEXD1.*/

+/** @brief Input buffer for FSD1.*/

 static uint8_t sdFlex_in_buf1[SAMA_SERIAL_FLEXCOM1_IN_BUF_SIZE];

 

-/** @brief Output buffer for SFLEXD1.*/

+/** @brief Output buffer for FSD1.*/

 static uint8_t sdFlex_out_buf1[SAMA_SERIAL_FLEXCOM1_OUT_BUF_SIZE];

 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM2 || defined(__DOXYGEN__)

-/** @brief Input buffer for SFLEXD2.*/

+/** @brief Input buffer for FSD2.*/

 static uint8_t sdFlex_in_buf2[SAMA_SERIAL_FLEXCOM2_IN_BUF_SIZE];

 

-/** @brief Output buffer for SFLEXD2.*/

+/** @brief Output buffer for FSD2.*/

 static uint8_t sdFlex_out_buf2[SAMA_SERIAL_FLEXCOM2_OUT_BUF_SIZE];

 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM3 || defined(__DOXYGEN__)

-/** @brief Input buffer for SFLEXD3.*/

+/** @brief Input buffer for FSD3.*/

 static uint8_t sdFlex_in_buf3[SAMA_SERIAL_FLEXCOM3_IN_BUF_SIZE];

 

-/** @brief Output buffer for SFLEXD3.*/

+/** @brief Output buffer for FSD3.*/

 static uint8_t sdFlex_out_buf3[SAMA_SERIAL_FLEXCOM3_OUT_BUF_SIZE];

 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM4 || defined(__DOXYGEN__)

-/** @brief Input buffer for SFLEXD4.*/

+/** @brief Input buffer for FSD4.*/

 static uint8_t sdFlex_in_buf4[SAMA_SERIAL_FLEXCOM4_IN_BUF_SIZE];

 

-/** @brief Output buffer for SFLEXD4.*/

+/** @brief Output buffer for FSD4.*/

 static uint8_t sdFlex_out_buf4[SAMA_SERIAL_FLEXCOM4_OUT_BUF_SIZE];

 #endif

 

@@ -646,7 +646,7 @@ OSAL_IRQ_HANDLER(SAMA_SERIAL_FLEXCOM0_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_interrupt(&SFLEXD0);

+  serve_uartFlex_interrupt(&FSD0);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -662,7 +662,7 @@ OSAL_IRQ_HANDLER(SAMA_SERIAL_FLEXCOM1_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_interrupt(&SFLEXD1);

+  serve_uartFlex_interrupt(&FSD1);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -678,7 +678,7 @@ OSAL_IRQ_HANDLER(SAMA_SERIAL_FLEXCOM2_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_interrupt(&SFLEXD2);

+  serve_uartFlex_interrupt(&FSD2);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -694,7 +694,7 @@ OSAL_IRQ_HANDLER(SAMA_SERIAL_FLEXCOM3_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_interrupt(&SFLEXD3);

+  serve_uartFlex_interrupt(&FSD3);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -710,7 +710,7 @@ OSAL_IRQ_HANDLER(SAMA_SERIAL_FLEXCOM4_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_interrupt(&SFLEXD4);

+  serve_uartFlex_interrupt(&FSD4);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -788,12 +788,12 @@ void sd_lld_init(void) {
 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM0

-  sdObjectInit(&SFLEXD0);

-  iqObjectInit(&SFLEXD0.iqueue, sdFlex_in_buf0, sizeof sdFlex_in_buf0, NULL, &SFLEXD0);

-  oqObjectInit(&SFLEXD0.oqueue, sdFlex_out_buf0, sizeof sdFlex_out_buf0, notifyFlex0, &SFLEXD0);

-  SFLEXD0.flexcom = FLEXCOM0;

-  SFLEXD0.usart   = USART0;

-  SFLEXD0.clock   = SAMA_FLEXCOM0CLK;

+  sdObjectInit(&FSD0);

+  iqObjectInit(&FSD0.iqueue, sdFlex_in_buf0, sizeof sdFlex_in_buf0, NULL, &FSD0);

+  oqObjectInit(&FSD0.oqueue, sdFlex_out_buf0, sizeof sdFlex_out_buf0, notifyFlex0, &FSD0);

+  FSD0.flexcom = FLEXCOM0;

+  FSD0.usart   = USART0;

+  FSD0.clock   = SAMA_FLEXCOM0CLK;

 

   aicSetSourcePriority(ID_USART0, SAMA_SERIAL_FLEXCOM0_IRQ_PRIORITY);

   aicSetSourceHandler(ID_USART0, SAMA_SERIAL_FLEXCOM0_HANDLER);

@@ -801,12 +801,12 @@ void sd_lld_init(void) {
 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM1

-  sdObjectInit(&SFLEXD1);

-  iqObjectInit(&SFLEXD1.iqueue, sdFlex_in_buf1, sizeof sdFlex_in_buf1, NULL, &SFLEXD1);

-  oqObjectInit(&SFLEXD1.oqueue, sdFlex_out_buf1, sizeof sdFlex_out_buf1, notifyFlex1, &SFLEXD1);

-  SFLEXD1.flexcom = FLEXCOM1;

-  SFLEXD1.usart   = USART1;

-  SFLEXD1.clock   = SAMA_FLEXCOM1CLK;

+  sdObjectInit(&FSD1);

+  iqObjectInit(&FSD1.iqueue, sdFlex_in_buf1, sizeof sdFlex_in_buf1, NULL, &FSD1);

+  oqObjectInit(&FSD1.oqueue, sdFlex_out_buf1, sizeof sdFlex_out_buf1, notifyFlex1, &FSD1);

+  FSD1.flexcom = FLEXCOM1;

+  FSD1.usart   = USART1;

+  FSD1.clock   = SAMA_FLEXCOM1CLK;

 

   aicSetSourcePriority(ID_USART1, SAMA_SERIAL_FLEXCOM1_IRQ_PRIORITY);

   aicSetSourceHandler(ID_USART1, SAMA_SERIAL_FLEXCOM1_HANDLER);

@@ -814,12 +814,12 @@ void sd_lld_init(void) {
 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM2

-  sdObjectInit(&SFLEXD2);

-  iqObjectInit(&SFLEXD2.iqueue, sdFlex_in_buf2, sizeof sdFlex_in_buf2, NULL, &SFLEXD2);

-  oqObjectInit(&SFLEXD2.oqueue, sdFlex_out_buf2, sizeof sdFlex_out_buf2, notifyFlex2, &SFLEXD2);

-  SFLEXD2.flexcom = FLEXCOM2;

-  SFLEXD2.usart   = USART2;

-  SFLEXD2.clock   = SAMA_FLEXCOM2CLK;

+  sdObjectInit(&FSD2);

+  iqObjectInit(&FSD2.iqueue, sdFlex_in_buf2, sizeof sdFlex_in_buf2, NULL, &FSD2);

+  oqObjectInit(&FSD2.oqueue, sdFlex_out_buf2, sizeof sdFlex_out_buf2, notifyFlex2, &FSD2);

+  FSD2.flexcom = FLEXCOM2;

+  FSD2.usart   = USART2;

+  FSD2.clock   = SAMA_FLEXCOM2CLK;

 

   aicSetSourcePriority(ID_USART2, SAMA_SERIAL_FLEXCOM2_IRQ_PRIORITY);

   aicSetSourceHandler(ID_USART2, SAMA_SERIAL_FLEXCOM2_HANDLER);

@@ -827,12 +827,12 @@ void sd_lld_init(void) {
 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM3

-  sdObjectInit(&SFLEXD3);

-  iqObjectInit(&SFLEXD3.iqueue, sdFlex_in_buf3, sizeof sdFlex_in_buf3, NULL, &SFLEXD3);

-  oqObjectInit(&SFLEXD3.oqueue, sdFlex_out_buf3, sizeof sdFlex_out_buf3, notifyFlex3, &SFLEXD3);

-  SFLEXD3.flexcom = FLEXCOM3;

-  SFLEXD3.usart   = USART3;

-  SFLEXD3.clock   = SAMA_FLEXCOM3CLK;

+  sdObjectInit(&FSD3);

+  iqObjectInit(&FSD3.iqueue, sdFlex_in_buf3, sizeof sdFlex_in_buf3, NULL, &FSD3);

+  oqObjectInit(&FSD3.oqueue, sdFlex_out_buf3, sizeof sdFlex_out_buf3, notifyFlex3, &FSD3);

+  FSD3.flexcom = FLEXCOM3;

+  FSD3.usart   = USART3;

+  FSD3.clock   = SAMA_FLEXCOM3CLK;

 

   aicSetSourcePriority(ID_USART3, SAMA_SERIAL_FLEXCOM3_IRQ_PRIORITY);

   aicSetSourceHandler(ID_USART3, SAMA_SERIAL_FLEXCOM3_HANDLER);

@@ -840,12 +840,12 @@ void sd_lld_init(void) {
 #endif

 

 #if SAMA_SERIAL_USE_FLEXCOM4

-  sdObjectInit(&SFLEXD4);

-  iqObjectInit(&SFLEXD4.iqueue, sdFlex_in_buf4, sizeof sdFlex_in_buf4, NULL, &SFLEXD4);

-  oqObjectInit(&SFLEXD4.oqueue, sdFlex_out_buf4, sizeof sdFlex_out_buf4, notifyFlex4, &SFLEXD4);

-  SFLEXD4.flexcom = FLEXCOM4;

-  SFLEXD4.usart   = USART4;

-  SFLEXD4.clock   = SAMA_FLEXCOM4CLK;

+  sdObjectInit(&FSD4);

+  iqObjectInit(&FSD4.iqueue, sdFlex_in_buf4, sizeof sdFlex_in_buf4, NULL, &FSD4);

+  oqObjectInit(&FSD4.oqueue, sdFlex_out_buf4, sizeof sdFlex_out_buf4, notifyFlex4, &FSD4);

+  FSD4.flexcom = FLEXCOM4;

+  FSD4.usart   = USART4;

+  FSD4.clock   = SAMA_FLEXCOM4CLK;

 

   aicSetSourcePriority(ID_USART4, SAMA_SERIAL_FLEXCOM4_IRQ_PRIORITY);

   aicSetSourceHandler(ID_USART4, SAMA_SERIAL_FLEXCOM4_HANDLER);

@@ -896,27 +896,27 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM0

-    if (&SFLEXD0 == sdp) {

+    if (&FSD0 == sdp) {

       pmcEnableFLEXCOM0();

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM1

-    if (&SFLEXD1 == sdp) {

+    if (&FSD1 == sdp) {

       pmcEnableFLEXCOM1();

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM2

-    if (&SFLEXD2 == sdp) {

+    if (&FSD2 == sdp) {

       pmcEnableFLEXCOM2();

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM3

-    if (&SFLEXD3 == sdp) {

+    if (&FSD3 == sdp) {

       pmcEnableFLEXCOM3();

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM4

-    if (&SFLEXD4 == sdp) {

+    if (&FSD4 == sdp) {

       pmcEnableFLEXCOM4();

     }

 #endif

@@ -970,31 +970,31 @@ void sd_lld_stop(SerialDriver *sdp) {
     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM0

-    if (&SFLEXD0 == sdp) {

+    if (&FSD0 == sdp) {

       pmcDisableFLEXCOM0();

       return;

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM1

-    if (&SFLEXD1 == sdp) {

+    if (&FSD1 == sdp) {

       pmcDisableFLEXCOM1();

       return;

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM2

-    if (&SFLEXD2 == sdp) {

+    if (&FSD2 == sdp) {

       pmcDisableFLEXCOM2();

       return;

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM3

-    if (&SFLEXD3 == sdp) {

+    if (&FSD3 == sdp) {

       pmcDisableFLEXCOM3();

       return;

     }

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM4

-    if (&SFLEXD4 == sdp) {

+    if (&FSD4 == sdp) {

       pmcDisableFLEXCOM4();

       return;

     }

diff --git a/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.h b/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.h
index 7bf125d6c..d2849916b 100644
--- a/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.h
+++ b/os/hal/ports/SAMA/LLD/USARTv1/hal_serial_lld.h
@@ -424,7 +424,7 @@
 

 #if SAMA_SERIAL_USE_FLEXCOM0

 #if defined(SAMA_FLEXCOM0_IS_USED)

-#error "SFLEXD0 requires FLEXCOM0 but the peripheral is already used"

+#error "FSD0 requires FLEXCOM0 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM0_IS_USED

 #endif

@@ -432,7 +432,7 @@
 

 #if SAMA_SERIAL_USE_FLEXCOM1

 #if defined(SAMA_FLEXCOM1_IS_USED)

-#error "SFLEXD1 requires FLEXCOM1 but the peripheral is already used"

+#error "FSD1 requires FLEXCOM1 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM1_IS_USED

 #endif

@@ -440,7 +440,7 @@
 

 #if SAMA_SERIAL_USE_FLEXCOM2

 #if defined(SAMA_FLEXCOM2_IS_USED)

-#error "SFLEXD2 requires FLEXCOM2 but the peripheral is already used"

+#error "FSD2 requires FLEXCOM2 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM2_IS_USED

 #endif

@@ -448,7 +448,7 @@
 

 #if SAMA_SERIAL_USE_FLEXCOM3

 #if defined(SAMA_FLEXCOM3_IS_USED)

-#error "SFLEXD3 requires FLEXCOM3 but the peripheral is already used"

+#error "FSD3 requires FLEXCOM3 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM3_IS_USED

 #endif

@@ -456,7 +456,7 @@
 

 #if SAMA_SERIAL_USE_FLEXCOM4

 #if defined(SAMA_FLEXCOM4_IS_USED)

-#error "SFLEXD4 requires FLEXCOM4 but the peripheral is already used"

+#error "FSD4 requires FLEXCOM4 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM4_IS_USED

 #endif

@@ -535,19 +535,19 @@ extern SerialDriver SD3;
 extern SerialDriver SD4;

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM0 && !defined(__DOXYGEN__)

-extern SerialDriver SFLEXD0;

+extern SerialDriver FSD0;

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM1 && !defined(__DOXYGEN__)

-extern SerialDriver SFLEXD1;

+extern SerialDriver FSD1;

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM2 && !defined(__DOXYGEN__)

-extern SerialDriver SFLEXD2;

+extern SerialDriver FSD2;

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM3 && !defined(__DOXYGEN__)

-extern SerialDriver SFLEXD3;

+extern SerialDriver FSD3;

 #endif

 #if SAMA_SERIAL_USE_FLEXCOM4 && !defined(__DOXYGEN__)

-extern SerialDriver SFLEXD4;

+extern SerialDriver FSD4;

 #endif

 

 #ifdef __cplusplus

diff --git a/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.c b/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.c
index 8e0701637..7ae72fd0a 100644
--- a/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.c
+++ b/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.c
@@ -113,27 +113,27 @@ UARTDriver UARTD4;
 

 /** @brief FLEXCOM0 UART driver identifier.*/

 #if SAMA_UART_USE_FLEXCOM0 || defined(__DOXYGEN__)

-UARTDriver UARTFLEXD0;

+UARTDriver FUARTD0;

 #endif

 

 /** @brief FLEXCOM1 UART driver identifier.*/

 #if SAMA_UART_USE_FLEXCOM1 || defined(__DOXYGEN__)

-UARTDriver UARTFLEXD1;

+UARTDriver FUARTD1;

 #endif

 

 /** @brief FLEXCOM2 UART driver identifier.*/

 #if SAMA_UART_USE_FLEXCOM2 || defined(__DOXYGEN__)

-UARTDriver UARTFLEXD2;

+UARTDriver FUARTD2;

 #endif

 

 /** @brief FLEXCOM3 UART driver identifier.*/

 #if SAMA_UART_USE_FLEXCOM3 || defined(__DOXYGEN__)

-UARTDriver UARTFLEXD3;

+UARTDriver FUARTD3;

 #endif

 

 /** @brief FLEXCOM4 UART driver identifier.*/

 #if SAMA_UART_USE_FLEXCOM4 || defined(__DOXYGEN__)

-UARTDriver UARTFLEXD4;

+UARTDriver FUARTD4;

 #endif

 

 /*===========================================================================*/

@@ -553,7 +553,7 @@ OSAL_IRQ_HANDLER(SAMA_UART_FLEXCOM0_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_irq(&UARTFLEXD0);

+  serve_uartFlex_irq(&FUARTD0);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -569,7 +569,7 @@ OSAL_IRQ_HANDLER(SAMA_UART_FLEXCOM1_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_irq(&UARTFLEXD1);

+  serve_uartFlex_irq(&FUARTD1);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -585,7 +585,7 @@ OSAL_IRQ_HANDLER(SAMA_UART_FLEXCOM2_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_irq(&UARTFLEXD2);

+  serve_uartFlex_irq(&FUARTD2);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -601,7 +601,7 @@ OSAL_IRQ_HANDLER(SAMA_UART_FLEXCOM3_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_irq(&UARTFLEXD3);

+  serve_uartFlex_irq(&FUARTD3);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -617,7 +617,7 @@ OSAL_IRQ_HANDLER(SAMA_UART_FLEXCOM4_HANDLER) {
 

   OSAL_IRQ_PROLOGUE();

 

-  serve_uartFlex_irq(&UARTFLEXD4);

+  serve_uartFlex_irq(&FUARTD4);

   aicAckInt();

   OSAL_IRQ_EPILOGUE();

 }

@@ -785,158 +785,158 @@ void uart_lld_init(void) {
 #endif

 

 #if SAMA_UART_USE_FLEXCOM0

-  uartObjectInit(&UARTFLEXD0);

-  UARTFLEXD0.flexcom   = FLEXCOM0;

-  UARTFLEXD0.usart     = USART0;

-  UARTFLEXD0.clock     = SAMA_FLEXCOM0CLK;

-  UARTFLEXD0.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_PER2MEM |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF1 |

-                         XDMAC_CC_DIF_AHB_IF0 |

-                         XDMAC_CC_SAM_FIXED_AM |

-                         XDMAC_CC_DAM_INCREMENTED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM0_RX);

-  UARTFLEXD0.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_MEM2PER |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF0 |

-                         XDMAC_CC_DIF_AHB_IF1 |

-                         XDMAC_CC_SAM_INCREMENTED_AM |

-                         XDMAC_CC_DAM_FIXED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM0_TX);

-  UARTFLEXD0.dmarx     = 0;

-  UARTFLEXD0.dmatx     = 0;

+  uartObjectInit(&FUARTD0);

+  FUARTD0.flexcom   = FLEXCOM0;

+  FUARTD0.usart     = USART0;

+  FUARTD0.clock     = SAMA_FLEXCOM0CLK;

+  FUARTD0.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_PER2MEM |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF1 |

+                      XDMAC_CC_DIF_AHB_IF0 |

+                      XDMAC_CC_SAM_FIXED_AM |

+                      XDMAC_CC_DAM_INCREMENTED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM0_RX);

+  FUARTD0.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_MEM2PER |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF0 |

+                      XDMAC_CC_DIF_AHB_IF1 |

+                      XDMAC_CC_SAM_INCREMENTED_AM |

+                      XDMAC_CC_DAM_FIXED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM0_TX);

+  FUARTD0.dmarx     = 0;

+  FUARTD0.dmatx     = 0;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM1

-  uartObjectInit(&UARTFLEXD1);

-  UARTFLEXD1.flexcom   = FLEXCOM1;

-  UARTFLEXD1.usart     = USART1;

-  UARTFLEXD1.clock     = SAMA_FLEXCOM1CLK;

-  UARTFLEXD1.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_PER2MEM |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF1 |

-                         XDMAC_CC_DIF_AHB_IF0 |

-                         XDMAC_CC_SAM_FIXED_AM |

-                         XDMAC_CC_DAM_INCREMENTED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM1_RX);

-  UARTFLEXD1.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_MEM2PER |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF0 |

-                         XDMAC_CC_DIF_AHB_IF1 |

-                         XDMAC_CC_SAM_INCREMENTED_AM |

-                         XDMAC_CC_DAM_FIXED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM1_TX);

-  UARTFLEXD1.dmarx     = 0;

-  UARTFLEXD1.dmatx     = 0;

+  uartObjectInit(&FUARTD1);

+  FUARTD1.flexcom   = FLEXCOM1;

+  FUARTD1.usart     = USART1;

+  FUARTD1.clock     = SAMA_FLEXCOM1CLK;

+  FUARTD1.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_PER2MEM |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF1 |

+                      XDMAC_CC_DIF_AHB_IF0 |

+                      XDMAC_CC_SAM_FIXED_AM |

+                      XDMAC_CC_DAM_INCREMENTED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM1_RX);

+  FUARTD1.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_MEM2PER |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF0 |

+                      XDMAC_CC_DIF_AHB_IF1 |

+                      XDMAC_CC_SAM_INCREMENTED_AM |

+                      XDMAC_CC_DAM_FIXED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM1_TX);

+  FUARTD1.dmarx     = 0;

+  FUARTD1.dmatx     = 0;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM2

-  uartObjectInit(&UARTFLEXD2);

-  UARTFLEXD2.flexcom   = FLEXCOM2;

-  UARTFLEXD2.usart     = USART2;

-  UARTFLEXD2.clock     = SAMA_FLEXCOM2CLK;

-  UARTFLEXD2.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_PER2MEM |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF1 |

-                         XDMAC_CC_DIF_AHB_IF0 |

-                         XDMAC_CC_SAM_FIXED_AM |

-                         XDMAC_CC_DAM_INCREMENTED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM2_RX);

-  UARTFLEXD2.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_MEM2PER |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF0 |

-                         XDMAC_CC_DIF_AHB_IF1 |

-                         XDMAC_CC_SAM_INCREMENTED_AM |

-                         XDMAC_CC_DAM_FIXED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM2_TX);

-  UARTFLEXD2.dmarx     = 0;

-  UARTFLEXD2.dmatx     = 0;

+  uartObjectInit(&FUARTD2);

+  FUARTD2.flexcom   = FLEXCOM2;

+  FUARTD2.usart     = USART2;

+  FUARTD2.clock     = SAMA_FLEXCOM2CLK;

+  FUARTD2.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_PER2MEM |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF1 |

+                      XDMAC_CC_DIF_AHB_IF0 |

+                      XDMAC_CC_SAM_FIXED_AM |

+                      XDMAC_CC_DAM_INCREMENTED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM2_RX);

+  FUARTD2.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_MEM2PER |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF0 |

+                      XDMAC_CC_DIF_AHB_IF1 |

+                      XDMAC_CC_SAM_INCREMENTED_AM |

+                      XDMAC_CC_DAM_FIXED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM2_TX);

+  FUARTD2.dmarx     = 0;

+  FUARTD2.dmatx     = 0;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM3

-  uartObjectInit(&UARTFLEXD3);

-  UARTFLEXD3.flexcom   = FLEXCOM3;

-  UARTFLEXD3.usart     = USART3;

-  UARTFLEXD3.clock     = SAMA_FLEXCOM3CLK;

-  UARTFLEXD3.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_PER2MEM |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF1 |

-                         XDMAC_CC_DIF_AHB_IF0 |

-                         XDMAC_CC_SAM_FIXED_AM |

-                         XDMAC_CC_DAM_INCREMENTED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM3_RX);

-  UARTFLEXD3.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_MEM2PER |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF0 |

-                         XDMAC_CC_DIF_AHB_IF1 |

-                         XDMAC_CC_SAM_INCREMENTED_AM |

-                         XDMAC_CC_DAM_FIXED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM3_TX);

-  UARTFLEXD3.dmarx     = 0;

-  UARTFLEXD3.dmatx     = 0;

+  uartObjectInit(&FUARTD3);

+  FUARTD3.flexcom   = FLEXCOM3;

+  FUARTD3.usart     = USART3;

+  FUARTD3.clock     = SAMA_FLEXCOM3CLK;

+  FUARTD3.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_PER2MEM |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF1 |

+                      XDMAC_CC_DIF_AHB_IF0 |

+                      XDMAC_CC_SAM_FIXED_AM |

+                      XDMAC_CC_DAM_INCREMENTED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM3_RX);

+  FUARTD3.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_MEM2PER |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF0 |

+                      XDMAC_CC_DIF_AHB_IF1 |

+                      XDMAC_CC_SAM_INCREMENTED_AM |

+                      XDMAC_CC_DAM_FIXED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM3_TX);

+  FUARTD3.dmarx     = 0;

+  FUARTD3.dmatx     = 0;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM4

-  uartObjectInit(&UARTFLEXD4);

-  UARTFLEXD4.flexcom   = FLEXCOM4;

-  UARTFLEXD4.usart     = USART4;

-  UARTFLEXD4.clock     = SAMA_FLEXCOM4CLK;

-  UARTFLEXD4.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_PER2MEM |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF1 |

-                         XDMAC_CC_DIF_AHB_IF0 |

-                         XDMAC_CC_SAM_FIXED_AM |

-                         XDMAC_CC_DAM_INCREMENTED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM4_RX);

-  UARTFLEXD4.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

-                         XDMAC_CC_MBSIZE_SINGLE |

-                         XDMAC_CC_DSYNC_MEM2PER |

-                         XDMAC_CC_PROT_SEC |

-                         XDMAC_CC_CSIZE_CHK_1 |

-                         XDMAC_CC_DWIDTH_BYTE |

-                         XDMAC_CC_SIF_AHB_IF0 |

-                         XDMAC_CC_DIF_AHB_IF1 |

-                         XDMAC_CC_SAM_INCREMENTED_AM |

-                         XDMAC_CC_DAM_FIXED_AM |

-                         XDMAC_CC_PERID(PERID_FLEXCOM4_TX);

-  UARTFLEXD4.dmarx     = 0;

-  UARTFLEXD4.dmatx     = 0;

+  uartObjectInit(&FUARTD4);

+  FUARTD4.flexcom   = FLEXCOM4;

+  FUARTD4.usart     = USART4;

+  FUARTD4.clock     = SAMA_FLEXCOM4CLK;

+  FUARTD4.rxdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_PER2MEM |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF1 |

+                      XDMAC_CC_DIF_AHB_IF0 |

+                      XDMAC_CC_SAM_FIXED_AM |

+                      XDMAC_CC_DAM_INCREMENTED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM4_RX);

+  FUARTD4.txdmamode = XDMAC_CC_TYPE_PER_TRAN |

+                      XDMAC_CC_MBSIZE_SINGLE |

+                      XDMAC_CC_DSYNC_MEM2PER |

+                      XDMAC_CC_PROT_SEC |

+                      XDMAC_CC_CSIZE_CHK_1 |

+                      XDMAC_CC_DWIDTH_BYTE |

+                      XDMAC_CC_SIF_AHB_IF0 |

+                      XDMAC_CC_DIF_AHB_IF1 |

+                      XDMAC_CC_SAM_INCREMENTED_AM |

+                      XDMAC_CC_DAM_FIXED_AM |

+                      XDMAC_CC_PERID(PERID_FLEXCOM4_TX);

+  FUARTD4.dmarx     = 0;

+  FUARTD4.dmatx     = 0;

 #endif

 

 }

@@ -1073,7 +1073,7 @@ void uart_lld_start(UARTDriver *uartp) {
 #endif

 

 #if SAMA_UART_USE_FLEXCOM0

-    if (&UARTFLEXD0 == uartp) {

+    if (&FUARTD0 == uartp) {

       uartp->dmarx = dmaChannelAllocate(SAMA_UART_FLEXCOM0_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)uart_lld_serve_rx_end_irq,

                                        (void *)uartp);

@@ -1099,7 +1099,7 @@ void uart_lld_start(UARTDriver *uartp) {
 #endif

 

 #if SAMA_UART_USE_FLEXCOM1

-    if (&UARTFLEXD1 == uartp) {

+    if (&FUARTD1 == uartp) {

       uartp->dmarx = dmaChannelAllocate(SAMA_UART_FLEXCOM1_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)uart_lld_serve_rx_end_irq,

                                        (void *)uartp);

@@ -1125,7 +1125,7 @@ void uart_lld_start(UARTDriver *uartp) {
 #endif

 

 #if SAMA_UART_USE_FLEXCOM2

-    if (&UARTFLEXD2 == uartp) {

+    if (&FUARTD2 == uartp) {

       uartp->dmarx = dmaChannelAllocate(SAMA_UART_FLEXCOM2_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)uart_lld_serve_rx_end_irq,

                                        (void *)uartp);

@@ -1151,7 +1151,7 @@ void uart_lld_start(UARTDriver *uartp) {
 #endif

 

 #if SAMA_UART_USE_FLEXCOM3

-    if (&UARTFLEXD3 == uartp) {

+    if (&FUARTD3 == uartp) {

       uartp->dmarx = dmaChannelAllocate(SAMA_UART_FLEXCOM3_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)uart_lld_serve_rx_end_irq,

                                        (void *)uartp);

@@ -1177,7 +1177,7 @@ void uart_lld_start(UARTDriver *uartp) {
 #endif

 

 #if SAMA_UART_USE_FLEXCOM4

-    if (&UARTFLEXD4 == uartp) {

+    if (&FUARTD4 == uartp) {

       uartp->dmarx = dmaChannelAllocate(SAMA_UART_FLEXCOM4_DMA_IRQ_PRIORITY,

                                        (sama_dmaisr_t)uart_lld_serve_rx_end_irq,

                                        (void *)uartp);

@@ -1202,10 +1202,9 @@ void uart_lld_start(UARTDriver *uartp) {
     }

 #endif

 

-    /* Static DMA setup, the transfer size depends on the USART settings,

-       it is 16 bits if M=1 and PCE=0 else it is 8 bits.*/

-   // if ((uartp->config->cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M0)

-   //   uartp->dmamode |= STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;

+/*

+ * TODO: Configure DMA for bit > 9

+ */

 

     uartp->rxbuf = 0;

   }

@@ -1265,35 +1264,35 @@ void uart_lld_stop(UARTDriver *uartp) {
 #endif

 

 #if SAMA_UART_USE_FLEXCOM0

-    if (&UARTFLEXD0 == uartp) {

+    if (&FUARTD0 == uartp) {

       pmcDisableFLEXCOM0();

       return;

     }

 #endif

 

 #if SAMA_UART_USE_FLEXCOM1

-    if (&UARTFLEXD1 == uartp) {

+    if (&FUARTD1 == uartp) {

       pmcDisableFLEXCOM1();

       return;

     }

 #endif

 

 #if SAMA_UART_USE_FLEXCOM2

-    if (&UARTFLEXD2 == uartp) {

+    if (&FUARTD2 == uartp) {

       pmcDisableFLEXCOM2();

       return;

     }

 #endif

 

 #if SAMA_UART_USE_FLEXCOM3

-    if (&UARTFLEXD3 == uartp) {

+    if (&FUARTD3 == uartp) {

       pmcDisableFLEXCOM3();

       return;

     }

 #endif

 

 #if SAMA_UART_USE_FLEXCOM4

-    if (&UARTFLEXD4 == uartp) {

+    if (&FUARTD4 == uartp) {

       pmcDisableFLEXCOM4();

       return;

     }

diff --git a/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.h b/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.h
index 0dae1af2d..a6e6bbb82 100644
--- a/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.h
+++ b/os/hal/ports/SAMA/LLD/USARTv1/hal_uart_lld.h
@@ -354,7 +354,7 @@
 

 #if SAMA_UART_USE_FLEXCOM0

 #if defined(SAMA_FLEXCOM0_IS_USED)

-#error "UARTFLEXD0 requires FLEXCOM0 but the peripheral is already used"

+#error "FUARTD0 requires FLEXCOM0 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM0_IS_USED

 #endif

@@ -362,7 +362,7 @@
 

 #if SAMA_UART_USE_FLEXCOM1

 #if defined(SAMA_FLEXCOM1_IS_USED)

-#error "UARTFLEXD1 requires FLEXCOM1 but the peripheral is already used"

+#error "FUARTD1 requires FLEXCOM1 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM1_IS_USED

 #endif

@@ -370,7 +370,7 @@
 

 #if SAMA_UART_USE_FLEXCOM2

 #if defined(SAMA_FLEXCOM2_IS_USED)

-#error "UARTFLEXD2 requires FLEXCOM2 but the peripheral is already used"

+#error "FUARTD2 requires FLEXCOM2 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM2_IS_USED

 #endif

@@ -378,7 +378,7 @@
 

 #if SAMA_UART_USE_FLEXCOM3

 #if defined(SAMA_FLEXCOM3_IS_USED)

-#error "UARTFLEXD3 requires FLEXCOM3 but the peripheral is already used"

+#error "FUARTD3 requires FLEXCOM3 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM3_IS_USED

 #endif

@@ -386,7 +386,7 @@
 

 #if SAMA_UART_USE_FLEXCOM4

 #if defined(SAMA_FLEXCOM4_IS_USED)

-#error "UARTFLEXD4 requires FLEXCOM4 but the peripheral is already used"

+#error "FUARTD4 requires FLEXCOM4 but the peripheral is already used"

 #else

 #define SAMA_FLEXCOM4_IS_USED

 #endif

@@ -596,23 +596,23 @@ extern UARTDriver UARTD4;
 #endif

 

 #if SAMA_UART_USE_FLEXCOM0 && !defined(__DOXYGEN__)

-extern UARTDriver UARTFLEXD0;

+extern UARTDriver FUARTD0;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM1 && !defined(__DOXYGEN__)

-extern UARTDriver UARTFLEXD1;

+extern UARTDriver FUARTD1;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM2 && !defined(__DOXYGEN__)

-extern UARTDriver UARTFLEXD2;

+extern UARTDriver FUARTD2;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM3 && !defined(__DOXYGEN__)

-extern UARTDriver UARTFLEXD3;

+extern UARTDriver FUARTD3;

 #endif

 

 #if SAMA_UART_USE_FLEXCOM4 && !defined(__DOXYGEN__)

-extern UARTDriver UARTFLEXD4;

+extern UARTDriver FUARTD4;

 #endif

 

 #ifdef __cplusplus

diff --git a/os/hal/ports/SAMA/SAMA5D2x/aic.c b/os/hal/ports/SAMA/SAMA5D2x/aic.c
index 22dc8cbc4..6def5c51a 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/aic.c
+++ b/os/hal/ports/SAMA/SAMA5D2x/aic.c
@@ -18,7 +18,7 @@
  * @file    SAMA5D2x/aic.c

  * @brief   SAMA AIC support code.

  *

- * @addtogroup COMMON_SAMA5D2x_AIC

+ * @addtogroup SAMA5D2x_AIC

  * @{

  */

 

@@ -70,6 +70,16 @@
   aicp->AIC_WPMR = AIC_WPMR_WPKEY_PASSWD;                                    \

 }

 

+/**

+ * @brief   Checks if a IRQ priority is within the valid range.

+ * @param[in] prio      IRQ priority

+ *

+ * @retval              The check result.

+ * @retval FALSE        invalid IRQ priority.

+ * @retval TRUE         correct IRQ priority.

+ */

+#define SAMA_IRQ_IS_VALID_PRIORITY(prio) ((prio) <= 7U)

+

 /*===========================================================================*/

 /* Driver exported functions.                                                */

 /*===========================================================================*/

@@ -94,11 +104,6 @@ void aicInit(void) {
     aic->AIC_SSR = i;

     aic->AIC_IDCR = AIC_IDCR_INTD;

   }

-  /* Clear All pending interrupts flags */

-  for (i = 0; i < ID_PERIPH_COUNT; i++) {

-    aic->AIC_SSR = i;

-    aic->AIC_ICCR = AIC_ICCR_INTCLR;

-  }

 }

 

 /**

@@ -110,10 +115,14 @@ void aicInit(void) {
  */

 void aicSetSourcePriority(uint32_t source, uint8_t priority) {

 

+#if SAMA_HAL_IS_SECURE

   Aic *aic = SAIC;

+#else

+  Aic *aic = AIC;

+#endif

 

   osalDbgCheck(source != ID_SAIC_FIQ);

-

+  osalDbgAssert(SAMA_IRQ_IS_VALID_PRIORITY(priority), "invalid irq priority");

   /* Disable write protection */

   aicDisableWP(aic);

   /* Set source id */

@@ -136,7 +145,11 @@ void aicSetSourcePriority(uint32_t source, uint8_t priority) {
  */

 void aicSetSourceHandler(uint32_t source, bool (*handler)(void)) {

 

+#if SAMA_HAL_IS_SECURE

   Aic *aic = SAIC;

+#else

+  Aic *aic = AIC;

+#endif

 

   /* Disable write protection */

   aicDisableWP(aic);

@@ -154,7 +167,11 @@ void aicSetSourceHandler(uint32_t source, bool (*handler)(void)) {
  */

 void aicSetSpuriousHandler(bool (*handler)(void)) {

 

+#if SAMA_HAL_IS_SECURE

   Aic *aic = SAIC;

+#else

+  Aic *aic = AIC;

+#endif

 

   /* Disable write protection */

   aicDisableWP(aic);

@@ -171,7 +188,11 @@ void aicSetSpuriousHandler(bool (*handler)(void)) {
  */

 void aicEnableInt(uint32_t source) {

 

+#if SAMA_HAL_IS_SECURE

   Aic *aic = SAIC;

+#else

+  Aic *aic = AIC;

+#endif

 

   aic->AIC_SSR = AIC_SSR_INTSEL(source);

   aic->AIC_IECR = AIC_IECR_INTEN;

@@ -184,7 +205,11 @@ void aicEnableInt(uint32_t source) {
  */

 void aicDisableInt(uint32_t source) {

 

+#if SAMA_HAL_IS_SECURE

   Aic *aic = SAIC;

+#else

+  Aic *aic = AIC;

+#endif

 

   aic->AIC_SSR = AIC_SSR_INTSEL(source);

   aic->AIC_IDCR = AIC_IDCR_INTD;

@@ -197,7 +222,11 @@ void aicDisableInt(uint32_t source) {
  */

 void aicClearInt(uint32_t source) {

 

+#if SAMA_HAL_IS_SECURE

   Aic *aic = SAIC;

+#else

+  Aic *aic = AIC;

+#endif

 

   aic->AIC_SSR = AIC_SSR_INTSEL(source);

   aic->AIC_ICCR = AIC_ICCR_INTCLR;

@@ -210,7 +239,11 @@ void aicClearInt(uint32_t source) {
  */

 void aicSetInt(uint32_t source) {

 

+#if SAMA_HAL_IS_SECURE

   Aic *aic = SAIC;

+#else

+  Aic *aic = AIC;

+#endif

 

   aic->AIC_SSR = AIC_SSR_INTSEL(source);

   aic->AIC_ISCR = AIC_ISCR_INTSET;

diff --git a/os/hal/ports/SAMA/SAMA5D2x/aic.h b/os/hal/ports/SAMA/SAMA5D2x/aic.h
index defee9d30..47b8ec173 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/aic.h
+++ b/os/hal/ports/SAMA/SAMA5D2x/aic.h
@@ -18,7 +18,7 @@
  * @file    SAMA5D2x/aic.h

  * @brief   SAMA AIC support macros and structures.

  *

- * @addtogroup COMMON_SAMA5D2x_AIC

+ * @addtogroup SAMA5D2x_AIC

  * @{

  */

 

@@ -53,9 +53,15 @@
 /**

  * @brief   Acknowledge the current interrupt.

  */

-#define aicAckInt() {                                                       \

-  SAIC->AIC_EOICR = AIC_EOICR_ENDIT;                                        \

+#if SAMA_HAL_IS_SECURE

+#define aicAckInt() {                                                     \

+  SAIC->AIC_EOICR = AIC_EOICR_ENDIT;                                      \

 }

+#else

+#define aicAckInt() {                                                     \

+  AIC->AIC_EOICR = AIC_EOICR_ENDIT;                                       \

+}

+#endif

 

 /*===========================================================================*/

 /* External declarations.                                                    */

diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h
index f4dc3839f..13235c724 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h
+++ b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.h
@@ -35,20 +35,6 @@
 

 #include "sama_registry.h"

 

-/* If the device type is not externally defined, for example from the Makefile,

-   then a file named board.h is included. This file must contain a device

-   definition compatible with the vendor include file.*/

-#if !defined (SAMA5D21) && !defined (SAMA5D22) &&  !defined (SAMA5D23) &&   \

-    !defined (SAMA5D24) && !defined (SAMA5D25) &&  !defined (SAMA5D26) &&   \

-    !defined (SAMA5D27) && !defined (SAMA5D28)

-#include "board.h"

-#endif

-

-/* Including the device CMSIS header. Note, we are not using the definitions

-   from this header because we need this file to be usable also from

-   assembler source files. We verify that the info matches instead.*/

-#include "sama5d2x.h"

-

 /*===========================================================================*/

 /* Driver constants.                                                         */

 /*===========================================================================*/

@@ -496,7 +482,9 @@
 /* Various helpers.*/

 #include "sama_pmc.h"

 #include "aic.h"

+#include "sama_matrix.h"

 #include "sama_xdmac.h" 

+#include "sama_cache.h"

 

 #ifdef __cplusplus

 extern "C" {

diff --git a/os/hal/ports/SAMA/SAMA5D2x/platform.mk b/os/hal/ports/SAMA/SAMA5D2x/platform.mk
index 8cc24582d..87727c325 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/platform.mk
+++ b/os/hal/ports/SAMA/SAMA5D2x/platform.mk
@@ -1,8 +1,10 @@
 # Required platform files.

 

-PLATFORMSRC := $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c \

-               $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c \

-               $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/aic.c

+PLATFORMSRC := $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c     \

+               $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c  \

+               $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/aic.c         \

+               $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c \

+               $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c

                

 # Required include directories.

 PLATFORMINC := $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x

diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c
new file mode 100644
index 000000000..f20e9e3db
--- /dev/null
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c
@@ -0,0 +1,65 @@
+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    SAMA5D2x/sama_cache.c
+ * @brief   SAMA CACHE support code.
+ *
+ * @addtogroup SAMA5D2x_CACHE
+ * @{
+ */
+
+#include "hal.h"
+
+/**
+ * @brief   Invalidate D-Cache Region
+ * @TODO: Extend to L2C
+ *
+ * @param[in] start      Pointer to beginning of memory region.
+ * @param[in] length     Length of the memory location.
+ */
+void cacheInvalidateRegion(void *start, uint32_t length) {
+
+  uint32_t start_addr = (uint32_t)start;
+  uint32_t end_addr = start_addr + length;
+  uint32_t mva;
+
+  /* Invalidate L1 D-Cache */
+  for (mva = start_addr & ~L1_CACHE_BYTES; mva < end_addr; mva += L1_CACHE_BYTES) {
+    L1C_InvalidateDCacheMVA((uint32_t *)mva);
+  }
+}
+
+/**
+ * @brief   Clean D-Cache Region
+ * @TODO: Extend to L2C
+ *
+ * @param[in] start      Pointer to beginning of memory region.
+ * @param[in] length     Length of the memory location.
+ */
+void cacheCleanRegion(void *start, uint32_t length) {
+
+  uint32_t start_addr = (uint32_t)start;
+  uint32_t end_addr = start_addr + length;
+  uint32_t mva;
+
+  /* Clean L1 D-Cache */
+  for (mva = start_addr & ~L1_CACHE_BYTES; mva < end_addr; mva += L1_CACHE_BYTES) {
+    L1C_CleanDCacheMVA((uint32_t *)mva);
+  }
+}
+
+/** @} */
diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_cache.h b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.h
new file mode 100644
index 000000000..fe8201438
--- /dev/null
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.h
@@ -0,0 +1,43 @@
+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    SAMA5D2x/sama_cache.h
+ * @brief   SAMA CACHE support macros and structures.
+ *
+ * @addtogroup SAMA5D2x_CACHE
+ * @{
+ */
+#ifndef SAMA_CACHE_H_
+#define SAMA_CACHE_H_
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+#define L1_CACHE_BYTES  32u
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  extern void cacheInvalidateRegion(void *start, uint32_t length);
+  extern void cacheCleanRegion(void *start, uint32_t length);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SAMA_CACHE_H_ */
+
+/** @} */
diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
new file mode 100644
index 000000000..c8624ea40
--- /dev/null
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
@@ -0,0 +1,207 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    SAMA5D2x/sama_matrix.c

+ * @brief   SAMA MATRIX support code.

+ *

+ * @addtogroup SAMA5D2x_MATRIX

+ * @{

+ */

+

+#include "hal.h"

+

+/*===========================================================================*/

+/* Driver local definitions.                                                 */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local types.                                                       */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver constant                                                           */

+/*===========================================================================*/

+#define SCFG_OFFSET                         0x40u

+

+/*===========================================================================*/

+/* Driver local macros.                                                      */

+/*===========================================================================*/

+#define MATRIX_SCFG(value)                  (MATRIX_SCFG0 + (value * 4u))

+#define MATRIX_SCFG_FIXED_DEFMSTR(value)    MATRIX_SCFG0_FIXED_DEFMSTR(value)

+#define MATRIX_SCFG_DEFMSTR_TYPE(value)     MATRIX_SCFG0_DEFMSTR_TYPE(value)

+

+/**

+ * @brief   Enable write protection on MATRIX registers block.

+ *

+ * @param[in] mtxp       pointer to a MATRIX register block.

+ *

+ * @notapi

+ */

+#define mtxEnableWP(mtxp) {                                                \

+  mtxp->MATRIX_WPMR = MATRIX_WPMR_WPKEY_PASSWD | MATRIX_WPMR_WPEN;         \

+}

+

+/**

+ * @brief   Disable write protection on MATRIX registers block.

+ *

+ * @param[in] matxp      pointer to a MATRIX register block.

+ *

+ * @notapi

+ */

+#define mtxDisableWP(mtxp) {                                               \

+  mtxp->MATRIX_WPMR = MATRIX_WPMR_WPKEY_PASSWD;                            \

+}

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief    Associates slave with a kind of master

+ * @note masterID is set only if type is fixed default master.

+ *       Specifying the number of a master which is not connected

+ *       to the selected slave is equivalent to clearing DEFMSTR_TYPE.

+ *

+ * @param[in] mtxp      pointer to a MATRIX register block.

+ * @param[in] slaveID   Slave MATRIX ID.

+ * @param[in] type      Select from

+ *                        No default master,

+ *                        Last access master,

+ *                        Fixed default master.

+ * @param[in] masterID  Master MATRIX ID.

+ */

+void mtxConfigDefaultMaster(Matrix *mtxp, uint8_t slaveID,

+        uint8_t type, uint8_t masterID) {

+

+  mtxDisableWP(mtxp);

+

+  volatile uint32_t *scfgAddress = (uint32_t *) ((uint32_t) mtxp + SCFG_OFFSET + (4u * slaveID));

+  *scfgAddress = MATRIX_SCFG_DEFMSTR_TYPE(type);

+

+  if (type == FIXED_DEFAULT_MASTER) {

+    *scfgAddress = MATRIX_SCFG_FIXED_DEFMSTR(masterID);

+  }

+  mtxEnableWP(mtxp);

+}

+

+/**

+ * @brief   Configures slave security region

+ *

+ * @param[in] mtxp      pointer to a MATRIX register block.

+ * @param[in] slaveID   Slave MATRIX ID.

+ * @param[in] selMask   Securable area.

+ * @param[in] readMask  Secure for read.

+ * @param[in] writeMask Secure for write.

+ */

+void mtxConfigSlaveSec(Matrix *mtxp, uint8_t slaveID,

+        uint8_t selMask, uint8_t readMask,

+        uint8_t writeMask) {

+

+  mtxDisableWP(mtxp);

+  mtxp->MATRIX_SSR[slaveID] = selMask | (readMask << 8) |

+                              (writeMask << 16);

+  mtxEnableWP(mtxp);

+}

+

+/**

+ * @brief   Configures split area of region

+ *

+ * @param[in] mtxp      pointer to a MATRIX register block.

+ * @param[in] slaveID   Slave MATRIX ID.

+ * @param[in] areaSize  Split size area.

+ * @param[in] mask      Region securable area.

+ */

+void mtxSetSlaveSplitAddr(Matrix *mtxp, uint8_t slaveID,

+         uint8_t areaSize, uint8_t mask) {

+

+  mtxDisableWP(mtxp);

+  uint8_t i = mask, j = 0;

+  uint32_t value = 0;

+  for (i = 1; (i <= mask) && (j < 32); i <<= 1, j += 4) {

+    if (i & mask)

+      value |= areaSize << j;

+  }

+  mtxp->MATRIX_SASSR[slaveID] = value;

+  mtxEnableWP(mtxp);

+}

+

+/**

+ * @brief   Configures size area of region

+ * @note Not applicable to internal security type

+ *

+ * @param[in] mtxp      pointer to a MATRIX register block.

+ * @param[in] slaveID   Slave MATRIX ID.

+ * @param[in] areaSize  Size of total area.

+ * @param[in] mask      Region securable area.

+ */

+void mtxSetSlaveRegionSize(Matrix *mtxp, uint8_t slaveID,

+          uint8_t areaSize, uint8_t mask) {

+

+  osalDbgCheck(slaveID != 0);

+

+  mtxDisableWP(mtxp);

+  uint8_t i = mask, j = 0;

+  uint32_t value = 0;

+  for (i = 1; (i <= mask) && (j < 32 ); i <<= 1, j += 4) {

+    if (i & mask)

+      value |= areaSize << j;

+  }

+  mtxp->MATRIX_SRTSR[slaveID] = value;

+  mtxEnableWP(mtxp);

+}

+

+/**

+ * @brief   Changes the mapping of the chip so that the remap area

+ *          mirrors the internal ROM or the EBI CS0.

+ */

+void mtxRemapRom(void) {

+

+  AXIMX->AXIMX_REMAP = 0;

+

+  /* Invalidate I-Cache*/

+  L1C_InvalidateICacheAll();

+

+  /* Ivalidate Region */

+  cacheInvalidateRegion((void*)0, IRAM_SIZE);

+}

+

+/**

+ * @brief   Changes the mapping of the chip so that the remap area

+ *          mirrors the internal ROM or the EBI CS0.

+ */

+void mtxRemapRam(void) {

+

+  AXIMX->AXIMX_REMAP = AXIMX_REMAP_REMAP0;

+

+  /* Invalidate I-Cache*/

+  L1C_InvalidateICacheAll();

+

+  /* Ivalidate Region */

+  cacheCleanRegion((void*)IRAM_ADDR, IRAM_SIZE);

+  /* Ivalidate Region */

+  cacheInvalidateRegion((void*)0, IRAM_SIZE);

+}

+

+/** @} */

diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
new file mode 100644
index 000000000..52a3bb3f1
--- /dev/null
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
@@ -0,0 +1,110 @@
+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    SAMA5D2x/sama_matrix.h
+ * @brief   SAMA MATRIX support macros and structures.
+ *
+ * @addtogroup SAMA5D2x_MATRIX
+ * @{
+ */
+
+#ifndef SAMA_MATRIX_H
+#define SAMA_MATRIX_H
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+#define LOWER_AREA_SECURABLE     0x0u
+#define UPPER_AREA_SECURABLE     0x1u
+
+#define SECURE_READ              0x0u
+#define SECURE_WRITE             0x0u
+#define NOT_SECURE_READ          0x1u
+#define NOT_SECURE_WRITE         0x1u
+
+#define NO_DEFAULT_MASTER        0x0u
+#define LAST_DEFAULT_MASTER      0x1u
+#define FIXED_DEFAULT_MASTER     0x2u
+
+#define REGION_0                 (0x1u << 0)
+#define REGION_1                 (0x1u << 1)
+#define REGION_2                 (0x1u << 2)
+#define REGION_3                 (0x1u << 3)
+#define REGION_4                 (0x1u << 4)
+#define REGION_5                 (0x1u << 5)
+#define REGION_6                 (0x1u << 6)
+#define REGION_7                 (0x1u << 7)
+
+#define MATRIX_AREA_SIZE_4K      0x0u
+#define MATRIX_AREA_SIZE_8K      0x1u
+#define MATRIX_AREA_SIZE_16K     0x2u
+#define MATRIX_AREA_SIZE_32K     0x3u
+#define MATRIX_AREA_SIZE_64K     0x4u
+#define MATRIX_AREA_SIZE_128K    0x5u
+#define MATRIX_AREA_SIZE_256K    0x6u
+#define MATRIX_AREA_SIZE_512K    0x7u
+#define MATRIX_AREA_SIZE_1M      0x8u
+#define MATRIX_AREA_SIZE_2M      0x9u
+#define MATRIX_AREA_SIZE_4M      0xAu
+#define MATRIX_AREA_SIZE_8M      0xBu
+#define MATRIX_AREA_SIZE_16M     0xCu
+#define MATRIX_AREA_SIZE_32M     0xDu
+#define MATRIX_AREA_SIZE_64M     0xEu
+#define MATRIX_AREA_SIZE_128M    0xFu
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void mtxConfigDefaultMaster(Matrix *mtxp, uint8_t slaveID,
+                             uint8_t type, uint8_t masterID);
+ void mtxConfigSlaveSec(Matrix *mtxp, uint8_t slaveID,
+                        uint8_t selMask, uint8_t readMask,
+                        uint8_t writeMask);
+ void mtxSetSlaveSplitAddr(Matrix *mtxp, uint8_t slaveID,
+                           uint8_t area, uint8_t mask);
+ void mtxSetSlaveRegionSize(Matrix *mtxp, uint8_t slaveID,
+                            uint8_t areaSize, uint8_t mask);
+ void mtxRemapRom(void);
+ void mtxRemapRam(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SAMA_MATRIX_H */
+
+/** @} */