diff options
author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-14 13:29:09 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-14 13:29:09 +0000 |
commit | 7ab0cff418bf49fcf1671dd72667b81a85c1ac37 (patch) | |
tree | 9527dc092b8fc59f733b2a0353d579ceec8a72ff /os/hal/platforms | |
parent | bf8592688860a61181b3f5a4c9b6d4d8856b8abb (diff) | |
download | ChibiOS-7ab0cff418bf49fcf1671dd72667b81a85c1ac37.tar.gz ChibiOS-7ab0cff418bf49fcf1671dd72667b81a85c1ac37.tar.bz2 ChibiOS-7ab0cff418bf49fcf1671dd72667b81a85c1ac37.zip |
Improved STM32 HAL support.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2363 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r-- | os/hal/platforms/STM32/adc_lld.h | 4 | ||||
-rw-r--r-- | os/hal/platforms/STM32/can_lld.h | 8 | ||||
-rw-r--r-- | os/hal/platforms/STM32/hal_lld.c | 8 | ||||
-rw-r--r-- | os/hal/platforms/STM32/hal_lld.h | 404 | ||||
-rw-r--r-- | os/hal/platforms/STM32/pal_lld.c | 87 | ||||
-rw-r--r-- | os/hal/platforms/STM32/pal_lld.h | 22 | ||||
-rw-r--r-- | os/hal/platforms/STM32/pwm_lld.h | 21 | ||||
-rw-r--r-- | os/hal/platforms/STM32/serial_lld.h | 22 | ||||
-rw-r--r-- | os/hal/platforms/STM32/spi_lld.h | 13 | ||||
-rw-r--r-- | os/hal/platforms/STM32/stm32_dma.c | 8 | ||||
-rw-r--r-- | os/hal/platforms/STM32/stm32_dma.h | 4 | ||||
-rw-r--r-- | os/hal/platforms/STM32/uart_lld.h | 17 | ||||
-rw-r--r-- | os/hal/platforms/STM8L/serial_lld.h | 6 |
13 files changed, 516 insertions, 108 deletions
diff --git a/os/hal/platforms/STM32/adc_lld.h b/os/hal/platforms/STM32/adc_lld.h index ba353c76e..aa62ca514 100644 --- a/os/hal/platforms/STM32/adc_lld.h +++ b/os/hal/platforms/STM32/adc_lld.h @@ -96,6 +96,10 @@ /* Derived constants and error checks. */
/*===========================================================================*/
+#if STM32_ADC_USE_ADC1 && !STM32_HAS_ADC1
+#error "ADC1 not present in the selected device"
+#endif
+
#if !STM32_ADC_USE_ADC1
#error "ADC driver activated but no ADC peripheral assigned"
#endif
diff --git a/os/hal/platforms/STM32/can_lld.h b/os/hal/platforms/STM32/can_lld.h index 871ab7adf..0d4c9b615 100644 --- a/os/hal/platforms/STM32/can_lld.h +++ b/os/hal/platforms/STM32/can_lld.h @@ -93,14 +93,18 @@ /* Derived constants and error checks. */
/*===========================================================================*/
-#if CAN_USE_SLEEP_MODE && !CAN_SUPPORTS_SLEEP
-#error "CAN sleep mode not supported in this architecture"
+#if STM32_CAN_USE_CAN1 && !STM32_HAS_CAN1
+#error "CAN1 not present in the selected device"
#endif
#if !STM32_CAN_USE_CAN1
#error "CAN driver activated but no CAN peripheral assigned"
#endif
+#if CAN_USE_SLEEP_MODE && !CAN_SUPPORTS_SLEEP
+#error "CAN sleep mode not supported in this architecture"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c index a46a5c65f..8cd9c289f 100644 --- a/os/hal/platforms/STM32/hal_lld.c +++ b/os/hal/platforms/STM32/hal_lld.c @@ -48,13 +48,15 @@ const PALConfig pal_default_config = {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
-#if !defined(STM32F10X_LD)
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
-#endif
-#if defined(STM32F10X_HD)
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
#endif
+#endif
+#endif
};
/*===========================================================================*/
diff --git a/os/hal/platforms/STM32/hal_lld.h b/os/hal/platforms/STM32/hal_lld.h index 678af363b..1125f0294 100644 --- a/os/hal/platforms/STM32/hal_lld.h +++ b/os/hal/platforms/STM32/hal_lld.h @@ -20,6 +20,21 @@ /**
* @file STM32/hal_lld.h
* @brief STM32 HAL subsystem low level driver header.
+ * @pre This module requires the following macros to be defined in the
+ * @p board.h file:
+ * - STM32_LSECLK.
+ * - STM32_HSECLK.
+ * .
+ * One of the following macros must also be defined:
+ * - STM32F103x4, STM32F103x6 for Performance Low Density devices.
+ * - STM32F103x8, STM32F103xB for Performance Medium Density devices.
+ * - STM32F103xC, STM32F103xD, STM32F103xE, STM32F103xG for
+ * Performance High Density devices.
+ * - STM32F105x8, STM32F105xB, STM32F105xC for Connectivity Line
+ * devices.
+ * - STM32F107xB, STM32F107xC for Connectivity Line devices with
+ * Ethernet.
+ * .
*
* @addtogroup HAL
* @{
@@ -28,47 +43,367 @@ #ifndef _HAL_LLD_H_
#define _HAL_LLD_H_
-/* Tricks required to make the TRUE/FALSE declaration inside the library
- compatible.*/
-#undef FALSE
-#undef TRUE
-#include "stm32f10x.h"
-#define FALSE 0
-#define TRUE (!FALSE)
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
-#include "nvic.h"
-#include "stm32_dma.h"
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
/**
* @brief Platform name.
*/
-#if defined(STM32F10X_MD) || defined(__DOXYGEN__)
-#define PLATFORM_NAME "STM32 MD"
+#if defined(__DOXYGEN__)
+#define PLATFORM_NAME "STM32"
+#elif defined(STM32F103x4) || defined(STM32F103x6)
+/*
+ * Capability flags for Low Density devices.
+ */
+#define STM32F10X_LD
+#define PLATFORM_NAME "STM32 Performance Line Low Density"
#include "hal_lld_f103.h"
-#elif defined(STM32F10X_LD)
-#define PLATFORM_NAME "STM32 LD"
+
+#define STM32_HAS_ADC1 TRUE
+#define STM32_HAS_ADC2 TRUE
+#define STM32_HAS_ADC3 FALSE
+
+#define STM32_HAS_CAN1 TRUE
+#define STM32_HAS_CAN2 FALSE
+
+#define STM32_HAS_DAC FALSE
+
+#define STM32_HAS_DMA1 TRUE
+#define STM32_HAS_DMA2 FALSE
+
+#define STM32_HAS_ETH FALSE
+
+#define STM32_HAS_GPIOA TRUE
+#define STM32_HAS_GPIOB TRUE
+#define STM32_HAS_GPIOC TRUE
+#define STM32_HAS_GPIOD TRUE
+#define STM32_HAS_GPIOE FALSE
+#define STM32_HAS_GPIOF FALSE
+#define STM32_HAS_GPIOG FALSE
+
+#define STM32_HAS_I2C1 TRUE
+#define STM32_HAS_I2C2 FALSE
+
+#define STM32_HAS_RTC TRUE
+
+#define STM32_HAS_SDIO FALSE
+
+#define STM32_HAS_SPI1 TRUE
+#define STM32_HAS_SPI2 FALSE
+#define STM32_HAS_SPI3 FALSE
+
+#define STM32_HAS_TIM1 TRUE
+#define STM32_HAS_TIM2 TRUE
+#define STM32_HAS_TIM3 TRUE
+#define STM32_HAS_TIM4 FALSE
+#define STM32_HAS_TIM5 FALSE
+#define STM32_HAS_TIM6 FALSE
+#define STM32_HAS_TIM7 FALSE
+#define STM32_HAS_TIM8 FALSE
+#define STM32_HAS_TIM9 FALSE
+#define STM32_HAS_TIM10 FALSE
+#define STM32_HAS_TIM11 FALSE
+#define STM32_HAS_TIM12 FALSE
+#define STM32_HAS_TIM13 FALSE
+#define STM32_HAS_TIM14 FALSE
+#define STM32_HAS_TIM15 FALSE
+#define STM32_HAS_TIM16 FALSE
+#define STM32_HAS_TIM17 FALSE
+
+#define STM32_HAS_USART1 TRUE
+#define STM32_HAS_USART2 TRUE
+#define STM32_HAS_USART3 FALSE
+#define STM32_HAS_UART3 FALSE
+#define STM32_HAS_UART4 FALSE
+
+#define STM32_HAS_USB FALSE
+#define STM32_HAS_USBOTG FALSE
+
+#elif defined(STM32F103x8) || defined(STM32F103xB)
+/*
+ * Capability flags for Medium Density devices.
+ */
+#define STM32F10X_MD
+#define PLATFORM_NAME "STM32 Performance Line Medium Density"
#include "hal_lld_f103.h"
-#elif defined(STM32F10X_HD)
-#define PLATFORM_NAME "STM32 HD"
+
+#define STM32_HAS_ADC1 TRUE
+#define STM32_HAS_ADC2 TRUE
+#define STM32_HAS_ADC3 FALSE
+
+#define STM32_HAS_CAN1 TRUE
+#define STM32_HAS_CAN2 FALSE
+
+#define STM32_HAS_DAC FALSE
+
+#define STM32_HAS_DMA1 TRUE
+#define STM32_HAS_DMA2 FALSE
+
+#define STM32_HAS_ETH FALSE
+
+#define STM32_HAS_GPIOA TRUE
+#define STM32_HAS_GPIOB TRUE
+#define STM32_HAS_GPIOC TRUE
+#define STM32_HAS_GPIOD TRUE
+#define STM32_HAS_GPIOE TRUE
+#define STM32_HAS_GPIOF FALSE
+#define STM32_HAS_GPIOG FALSE
+
+#define STM32_HAS_I2C1 TRUE
+#define STM32_HAS_I2C2 TRUE
+
+#define STM32_HAS_RTC TRUE
+
+#define STM32_HAS_SDIO FALSE
+
+#define STM32_HAS_SPI1 TRUE
+#define STM32_HAS_SPI2 TRUE
+#define STM32_HAS_SPI3 FALSE
+
+#define STM32_HAS_TIM1 TRUE
+#define STM32_HAS_TIM2 TRUE
+#define STM32_HAS_TIM3 TRUE
+#define STM32_HAS_TIM4 TRUE
+#define STM32_HAS_TIM5 FALSE
+#define STM32_HAS_TIM6 FALSE
+#define STM32_HAS_TIM7 FALSE
+#define STM32_HAS_TIM8 FALSE
+#define STM32_HAS_TIM9 FALSE
+#define STM32_HAS_TIM10 FALSE
+#define STM32_HAS_TIM11 FALSE
+#define STM32_HAS_TIM12 FALSE
+#define STM32_HAS_TIM13 FALSE
+#define STM32_HAS_TIM14 FALSE
+#define STM32_HAS_TIM15 FALSE
+#define STM32_HAS_TIM16 FALSE
+#define STM32_HAS_TIM17 FALSE
+
+#define STM32_HAS_USART1 TRUE
+#define STM32_HAS_USART2 TRUE
+#define STM32_HAS_USART3 TRUE
+#define STM32_HAS_UART3 FALSE
+#define STM32_HAS_UART4 FALSE
+
+#define STM32_HAS_USB TRUE
+#define STM32_HAS_USBOTG FALSE
+
+#elif defined(STM32F103xC) || defined(STM32F103xD) || \
+ defined(STM32F103xE) || defined(STM32F103xG)
+/*
+ * Capability flags for High Density devices.
+ */
+#define STM32F10X_HD
+#define PLATFORM_NAME "STM32 Performance Line High Density"
#include "hal_lld_f103.h"
-#elif defined(STM32F10X_CL)
-#define PLATFORM_NAME "STM32 CL"
+
+#define STM32_HAS_ADC1 TRUE
+#define STM32_HAS_ADC2 TRUE
+#define STM32_HAS_ADC3 TRUE
+
+#define STM32_HAS_CAN1 TRUE
+#define STM32_HAS_CAN2 FALSE
+
+#define STM32_HAS_DAC FALSE
+
+#define STM32_HAS_DMA1 TRUE
+#define STM32_HAS_DMA2 TRUE
+
+#define STM32_HAS_ETH FALSE
+
+#define STM32_HAS_GPIOA TRUE
+#define STM32_HAS_GPIOB TRUE
+#define STM32_HAS_GPIOC TRUE
+#define STM32_HAS_GPIOD TRUE
+#define STM32_HAS_GPIOE TRUE
+#define STM32_HAS_GPIOF TRUE
+#define STM32_HAS_GPIOG TRUE
+
+#define STM32_HAS_I2C1 TRUE
+#define STM32_HAS_I2C2 TRUE
+
+#define STM32_HAS_RTC TRUE
+
+#define STM32_HAS_SDIO TRUE
+
+#define STM32_HAS_SPI1 TRUE
+#define STM32_HAS_SPI2 TRUE
+#define STM32_HAS_SPI3 TRUE
+
+#define STM32_HAS_TIM1 TRUE
+#define STM32_HAS_TIM2 TRUE
+#define STM32_HAS_TIM3 TRUE
+#define STM32_HAS_TIM4 TRUE
+#define STM32_HAS_TIM5 TRUE
+#define STM32_HAS_TIM6 TRUE
+#define STM32_HAS_TIM7 TRUE
+#define STM32_HAS_TIM8 TRUE
+#define STM32_HAS_TIM9 FALSE
+#define STM32_HAS_TIM10 FALSE
+#define STM32_HAS_TIM11 FALSE
+#define STM32_HAS_TIM12 FALSE
+#define STM32_HAS_TIM13 FALSE
+#define STM32_HAS_TIM14 FALSE
+#define STM32_HAS_TIM15 FALSE
+#define STM32_HAS_TIM16 FALSE
+#define STM32_HAS_TIM17 FALSE
+
+#define STM32_HAS_USART1 TRUE
+#define STM32_HAS_USART2 TRUE
+#define STM32_HAS_USART3 TRUE
+#define STM32_HAS_UART3 TRUE
+#define STM32_HAS_UART4 TRUE
+
+#define STM32_HAS_USB TRUE
+#define STM32_HAS_USBOTG FALSE
+
+#elif defined(STM32F105x8) || defined(STM32F105xB) || defined(STM32F105xC)
+/*
+ * Capability flags for Connectivity Line devices.
+ */
+#define STM32F10X_CL
+#define PLATFORM_NAME "STM32 Connectivity Line"
#include "hal_lld_f105_f107.h"
-#else
-#error "STM32 platform unknown or not specified"
-#endif
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
+#define STM32_HAS_ADC1 TRUE
+#define STM32_HAS_ADC2 TRUE
+#define STM32_HAS_ADC3 FALSE
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
+#define STM32_HAS_CAN1 TRUE
+#define STM32_HAS_CAN2 TRUE
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
+#define STM32_HAS_DAC TRUE
+
+#define STM32_HAS_DMA1 TRUE
+#define STM32_HAS_DMA2 TRUE
+
+#define STM32_HAS_ETH FALSE
+
+#define STM32_HAS_GPIOA TRUE
+#define STM32_HAS_GPIOB TRUE
+#define STM32_HAS_GPIOC TRUE
+#define STM32_HAS_GPIOD TRUE
+#define STM32_HAS_GPIOE TRUE
+#define STM32_HAS_GPIOF FALSE
+#define STM32_HAS_GPIOG FALSE
+
+#define STM32_HAS_I2C1 TRUE
+#define STM32_HAS_I2C2 TRUE
+
+#define STM32_HAS_RTC TRUE
+
+#define STM32_HAS_SDIO FALSE
+
+#define STM32_HAS_SPI1 TRUE
+#define STM32_HAS_SPI2 TRUE
+#define STM32_HAS_SPI3 TRUE
+
+#define STM32_HAS_TIM1 TRUE
+#define STM32_HAS_TIM2 TRUE
+#define STM32_HAS_TIM3 TRUE
+#define STM32_HAS_TIM4 TRUE
+#define STM32_HAS_TIM5 TRUE
+#define STM32_HAS_TIM6 TRUE
+#define STM32_HAS_TIM7 TRUE
+#define STM32_HAS_TIM8 FALSE
+#define STM32_HAS_TIM9 FALSE
+#define STM32_HAS_TIM10 FALSE
+#define STM32_HAS_TIM11 FALSE
+#define STM32_HAS_TIM12 FALSE
+#define STM32_HAS_TIM13 FALSE
+#define STM32_HAS_TIM14 FALSE
+#define STM32_HAS_TIM15 FALSE
+#define STM32_HAS_TIM16 FALSE
+#define STM32_HAS_TIM17 FALSE
+
+#define STM32_HAS_USART1 TRUE
+#define STM32_HAS_USART2 TRUE
+#define STM32_HAS_USART3 TRUE
+#define STM32_HAS_UART3 TRUE
+#define STM32_HAS_UART4 TRUE
+
+#define STM32_HAS_USB FALSE
+#define STM32_HAS_USBOTG TRUE
+
+#elif defined(STM32F107xB) || defined(STM32F107xC)
+/*
+ * Capability flags for Connectivity Line devices with Ethernet.
+ */
+#define STM32F10X_CL
+#define PLATFORM_NAME "STM32 Connectivity Line"
+#include "hal_lld_f105_f107.h"
+
+#define STM32_HAS_ADC1 TRUE
+#define STM32_HAS_ADC2 TRUE
+#define STM32_HAS_ADC3 FALSE
+
+#define STM32_HAS_CAN1 TRUE
+#define STM32_HAS_CAN2 TRUE
+
+#define STM32_HAS_DAC TRUE
+
+#define STM32_HAS_DMA1 TRUE
+#define STM32_HAS_DMA2 TRUE
+
+#define STM32_HAS_ETH TRUE
+
+#define STM32_HAS_GPIOA TRUE
+#define STM32_HAS_GPIOB TRUE
+#define STM32_HAS_GPIOC TRUE
+#define STM32_HAS_GPIOD TRUE
+#define STM32_HAS_GPIOE TRUE
+#define STM32_HAS_GPIOF FALSE
+#define STM32_HAS_GPIOG FALSE
+
+#define STM32_HAS_I2C1 TRUE
+#define STM32_HAS_I2C2 TRUE
+
+#define STM32_HAS_RTC TRUE
+
+#define STM32_HAS_SDIO FALSE
+
+#define STM32_HAS_SPI1 TRUE
+#define STM32_HAS_SPI2 TRUE
+#define STM32_HAS_SPI3 TRUE
+
+#define STM32_HAS_TIM1 TRUE
+#define STM32_HAS_TIM2 TRUE
+#define STM32_HAS_TIM3 TRUE
+#define STM32_HAS_TIM4 TRUE
+#define STM32_HAS_TIM5 TRUE
+#define STM32_HAS_TIM6 TRUE
+#define STM32_HAS_TIM7 TRUE
+#define STM32_HAS_TIM8 FALSE
+#define STM32_HAS_TIM9 FALSE
+#define STM32_HAS_TIM10 FALSE
+#define STM32_HAS_TIM11 FALSE
+#define STM32_HAS_TIM12 FALSE
+#define STM32_HAS_TIM13 FALSE
+#define STM32_HAS_TIM14 FALSE
+#define STM32_HAS_TIM15 FALSE
+#define STM32_HAS_TIM16 FALSE
+#define STM32_HAS_TIM17 FALSE
+
+#define STM32_HAS_USART1 TRUE
+#define STM32_HAS_USART2 TRUE
+#define STM32_HAS_USART3 TRUE
+#define STM32_HAS_UART3 TRUE
+#define STM32_HAS_UART4 TRUE
+
+#define STM32_HAS_USB FALSE
+#define STM32_HAS_USBOTG TRUE
+
+#else
+#error "unspecified, unsupported or invalid STM32 platform"
+#endif
/*===========================================================================*/
/* Driver data structures and types. */
@@ -82,6 +417,17 @@ /* External declarations. */
/*===========================================================================*/
+/* Tricks required to make the TRUE/FALSE declaration inside the library
+ compatible.*/
+#undef FALSE
+#undef TRUE
+#include "stm32f10x.h"
+#define FALSE 0
+#define TRUE (!FALSE)
+
+/* STM32 DMA support code.*/
+#include "stm32_dma.h"
+
#ifdef __cplusplus
extern "C" {
#endif
diff --git a/os/hal/platforms/STM32/pal_lld.c b/os/hal/platforms/STM32/pal_lld.c index 6e2346000..ac90883f7 100644 --- a/os/hal/platforms/STM32/pal_lld.c +++ b/os/hal/platforms/STM32/pal_lld.c @@ -30,30 +30,29 @@ #if HAL_USE_PAL || defined(__DOXYGEN__)
-#if defined(STM32F10X_LD)
-#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
- RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
- RCC_APB2RSTR_AFIORST)
-#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
- RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
- RCC_APB2ENR_AFIOEN)
-#elif defined(STM32F10X_HD)
-#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
- RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
- RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST | \
+#if STM32_HAS_GPIOG
+#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
+ RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
+ RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST | \
RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST);
-#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
- RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
- RCC_APB2ENR_IOPEEN | RCC_APB2ENR_IOPFEN | \
+#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
+ RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
+ RCC_APB2ENR_IOPEEN | RCC_APB2ENR_IOPFEN | \
RCC_APB2ENR_IOPGEN | RCC_APB2ENR_AFIOEN)
-#else
- /* Defaults on Medium Density and Connection Line devices.*/
-#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
- RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
+#elif STM32_HAS_GPIOE
+#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
+ RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_AFIORST);
-#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
- RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
+#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
+ RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
RCC_APB2ENR_IOPEEN | RCC_APB2ENR_AFIOEN)
+#else
+#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
+ RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
+ RCC_APB2RSTR_AFIORST)
+#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
+ RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
+ RCC_APB2ENR_AFIOEN)
#endif
/*===========================================================================*/
@@ -97,30 +96,32 @@ void _pal_lld_init(const PALConfig *config) { RCC->APB2RSTR = APB2_RST_MASK;
RCC->APB2RSTR = 0;
- IOPORT1->ODR = config->PAData.odr;
- IOPORT1->CRH = config->PAData.crh;
- IOPORT1->CRL = config->PAData.crl;
- IOPORT2->ODR = config->PBData.odr;
- IOPORT2->CRH = config->PBData.crh;
- IOPORT2->CRL = config->PBData.crl;
- IOPORT3->ODR = config->PCData.odr;
- IOPORT3->CRH = config->PCData.crh;
- IOPORT3->CRL = config->PCData.crl;
- IOPORT4->ODR = config->PDData.odr;
- IOPORT4->CRH = config->PDData.crh;
- IOPORT4->CRL = config->PDData.crl;
-#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
- IOPORT5->ODR = config->PEData.odr;
- IOPORT5->CRH = config->PEData.crh;
- IOPORT5->CRL = config->PEData.crl;
+ GPIOA->ODR = config->PAData.odr;
+ GPIOA->CRH = config->PAData.crh;
+ GPIOA->CRL = config->PAData.crl;
+ GPIOB->ODR = config->PBData.odr;
+ GPIOB->CRH = config->PBData.crh;
+ GPIOB->CRL = config->PBData.crl;
+ GPIOC->ODR = config->PCData.odr;
+ GPIOC->CRH = config->PCData.crh;
+ GPIOC->CRL = config->PCData.crl;
+ GPIOD->ODR = config->PDData.odr;
+ GPIOD->CRH = config->PDData.crh;
+ GPIOD->CRL = config->PDData.crl;
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
+ GPIOE->ODR = config->PEData.odr;
+ GPIOE->CRH = config->PEData.crh;
+ GPIOE->CRL = config->PEData.crl;
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
+ GPIOF->ODR = config->PFData.odr;
+ GPIOF->CRH = config->PFData.crh;
+ GPIOF->CRL = config->PFData.crl;
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
+ GPIOG->ODR = config->PGData.odr;
+ GPIOG->CRH = config->PGData.crh;
+ GPIOG->CRL = config->PGData.crl;
+#endif
#endif
-#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
- IOPORT6->ODR = config->PFData.odr;
- IOPORT6->CRH = config->PFData.crh;
- IOPORT6->CRL = config->PFData.crl;
- IOPORT7->ODR = config->PGData.odr;
- IOPORT7->CRH = config->PGData.crh;
- IOPORT7->CRL = config->PGData.crl;
#endif
}
diff --git a/os/hal/platforms/STM32/pal_lld.h b/os/hal/platforms/STM32/pal_lld.h index 017f140da..a6d1236ae 100644 --- a/os/hal/platforms/STM32/pal_lld.h +++ b/os/hal/platforms/STM32/pal_lld.h @@ -76,16 +76,18 @@ typedef struct { stm32_gpio_setup_t PCData;
/** @brief Port D setup data.*/
stm32_gpio_setup_t PDData;
-#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
/** @brief Port E setup data.*/
stm32_gpio_setup_t PEData;
-#endif
-#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
/** @brief Port F setup data.*/
stm32_gpio_setup_t PFData;
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
/** @brief Port G setup data.*/
stm32_gpio_setup_t PGData;
#endif
+#endif
+#endif
} PALConfig;
/**
@@ -121,39 +123,49 @@ typedef GPIO_TypeDef * ioportid_t; /**
* @brief GPIO port A identifier.
*/
+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
#define IOPORT1 GPIOA
+#endif
/**
* @brief GPIO port B identifier.
*/
+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
#define IOPORT2 GPIOB
+#endif
/**
* @brief GPIO port C identifier.
*/
+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
#define IOPORT3 GPIOC
+#endif
/**
* @brief GPIO port D identifier.
*/
+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
#define IOPORT4 GPIOD
+#endif
/**
* @brief GPIO port E identifier.
*/
-#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
#define IOPORT5 GPIOE
#endif
/**
* @brief GPIO port F identifier.
*/
-#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
#define IOPORT6 GPIOF
+#endif
/**
* @brief GPIO port G identifier.
*/
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
#define IOPORT7 GPIOG
#endif
diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index d8440e361..fcd66bbda 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -111,13 +111,24 @@ /* Configuration checks. */
/*===========================================================================*/
-#if STM32_PWM_USE_TIM4 && defined(STM32F10X_LD)
-#error "TIM4 not present in low density STM32 devices"
+#if STM32_PWM_USE_TIM1 && !STM32_HAS_TIM1
+#error "TIM1 not present in the selected device"
#endif
-#if !STM32_SERIAL_USE_USART1 && !STM32_SERIAL_USE_USART2 && \
- !STM32_SERIAL_USE_USART3 && !STM32_SERIAL_USE_UART4 && \
- !STM32_SERIAL_USE_UART5
+#if STM32_PWM_USE_TIM2 && !STM32_HAS_TIM2
+#error "TIM2 not present in the selected device"
+#endif
+
+#if STM32_PWM_USE_TIM3 && !STM32_HAS_TIM3
+#error "TIM3 not present in the selected device"
+#endif
+
+#if STM32_PWM_USE_TIM4 && !STM32_HAS_TIM4
+#error "TIM4 not present in the selected device"
+#endif
+
+#if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM2 && \
+ !STM32_PWM_USE_TIM3 && !STM32_PWM_USE_TIM4
#error "PWM driver activated but no TIM peripheral assigned"
#endif
diff --git a/os/hal/platforms/STM32/serial_lld.h b/os/hal/platforms/STM32/serial_lld.h index 00617a98a..5d7d80c11 100644 --- a/os/hal/platforms/STM32/serial_lld.h +++ b/os/hal/platforms/STM32/serial_lld.h @@ -122,14 +122,24 @@ /* Derived constants and error checks. */
/*===========================================================================*/
-#if STM32_SERIAL_USE_UART4 && \
- !(defined(STM32F10X_HD) || defined(STM32F10X_CL))
-#error "UART4 only present in HD and CL devices"
+#if STM32_SERIAL_USE_USART1 && !STM32_HAS_USART1
+#error "USART1 not present in the selected device"
#endif
-#if STM32_SERIAL_USE_UART5 && \
- !(defined(STM32F10X_HD) || defined(STM32F10X_CL))
-#error "UART5 only present in HD and CL devices"
+#if STM32_SERIAL_USE_USART2 && !STM32_HAS_USART2
+#error "USART2 not present in the selected device"
+#endif
+
+#if STM32_SERIAL_USE_USART3 && !STM32_HAS_USART3
+#error "USART3 not present in the selected device"
+#endif
+
+#if STM32_SERIAL_USE_UART4 && !STM32_HAS_UART4
+#error "UART4 not present in the selected device"
+#endif
+
+#if STM32_SERIAL_USE_UART5 && !STM32_HAS_UART5
+#error "UART5 not present in the selected device"
#endif
#if !STM32_SERIAL_USE_USART1 && !STM32_SERIAL_USE_USART2 && \
diff --git a/os/hal/platforms/STM32/spi_lld.h b/os/hal/platforms/STM32/spi_lld.h index 592a904f0..d46035ec0 100644 --- a/os/hal/platforms/STM32/spi_lld.h +++ b/os/hal/platforms/STM32/spi_lld.h @@ -147,9 +147,16 @@ /* Derived constants and error checks. */
/*===========================================================================*/
-#if STM32_SPI_USE_SPI3 && \
- !(defined(STM32F10X_HD) || defined(STM32F10X_CL))
-#error "SPI only present in HD and CL devices"
+#if STM32_SPI_USE_SPI1 && !STM32_HAS_SPI1
+#error "SPI1 not present in the selected device"
+#endif
+
+#if STM32_SPI_USE_SPI2 && !STM32_HAS_SPI2
+#error "SPI2 not present in the selected device"
+#endif
+
+#if STM32_SPI_USE_SPI3 && !STM32_HAS_SPI3
+#error "SPI3 not present in the selected device"
#endif
#if !STM32_SPI_USE_SPI1 && !STM32_SPI_USE_SPI2 && !STM32_SPI_USE_SPI3
diff --git a/os/hal/platforms/STM32/stm32_dma.c b/os/hal/platforms/STM32/stm32_dma.c index bcdcf0fb7..0dc88e814 100644 --- a/os/hal/platforms/STM32/stm32_dma.c +++ b/os/hal/platforms/STM32/stm32_dma.c @@ -37,7 +37,7 @@ /*===========================================================================*/
static cnt_t dmacnt1;
-#if defined(STM32F10X_HD) || defined (STM32F10X_CL)
+#if defined(STM32_HAS_DMA2)
static cnt_t dmacnt2;
#endif
@@ -65,7 +65,7 @@ void dmaInit(void) { for (i = STM32_DMA_CHANNEL_7; i >= STM32_DMA_CHANNEL_1; i--)
dmaDisableChannel(STM32_DMA1, i);
STM32_DMA1->IFCR = 0xFFFFFFFF;
-#if defined(STM32F10X_HD) || defined (STM32F10X_CL)
+#if defined(STM32_HAS_DMA2)
dmacnt2 = 0;
for (i = STM32_DMA_CHANNEL_5; i >= STM32_DMA_CHANNEL_1; i--)
dmaDisableChannel(STM32_DMA2, i);
@@ -89,7 +89,7 @@ void dmaEnable(uint32_t dma) { DMA1->IFCR = 0x0FFFFFFF;
}
break;
-#if defined(STM32F10X_HD) || defined (STM32F10X_CL)
+#if defined(STM32_HAS_DMA2)
case DMA2_ID:
if (dmacnt2++ == 0) {
RCC->AHBENR |= RCC_AHBENR_DMA2EN;
@@ -114,7 +114,7 @@ void dmaDisable(uint32_t dma) { if (--dmacnt1 == 0)
RCC->AHBENR &= ~RCC_AHBENR_DMA1EN;
break;
-#if defined(STM32F10X_HD) || defined (STM32F10X_CL)
+#if defined(STM32_HAS_DMA2)
case DMA2_ID:
if (--dmacnt2 == 0)
RCC->AHBENR &= ~RCC_AHBENR_DMA2EN;
diff --git a/os/hal/platforms/STM32/stm32_dma.h b/os/hal/platforms/STM32/stm32_dma.h index 20873116e..078149167 100644 --- a/os/hal/platforms/STM32/stm32_dma.h +++ b/os/hal/platforms/STM32/stm32_dma.h @@ -38,7 +38,7 @@ #define DMA1_ID 0
/** @brief DMA2 identifier.*/
-#if defined(STM32F10X_HD) || defined (STM32F10X_CL) || defined(__DOXYGEN__)
+#if defined(STM32_HAS_DMA2) || defined(__DOXYGEN__)
#define DMA2_ID 1
#endif
@@ -100,7 +100,7 @@ typedef struct { /** Pointer to the DMA1 channel 7 registers block.*/
#define STM32_DMA1_CH7 (&STM32_DMA1->channels[6])
-#if defined(STM32F10X_HD) || defined (STM32F10X_CL) || defined(__DOXYGEN__)
+#if defined(STM32_HAS_DMA2) || defined(__DOXYGEN__)
/** DMA2 registers block numeric address.*/
#define STM32_DMA2_BASE (AHBPERIPH_BASE + 0x0400)
/** Pointer to the DMA2 registers block.*/
diff --git a/os/hal/platforms/STM32/uart_lld.h b/os/hal/platforms/STM32/uart_lld.h index a1c6235ee..589a274fa 100644 --- a/os/hal/platforms/STM32/uart_lld.h +++ b/os/hal/platforms/STM32/uart_lld.h @@ -146,9 +146,20 @@ /* Derived constants and error checks. */
/*===========================================================================*/
-#if STM32_UART_USE_UART4 && \
- !(defined(STM32F10X_HD) || defined(STM32F10X_CL))
-#error "UART4 only present in HD and CL devices"
+#if STM32_UART_USE_USART1 && !STM32_HAS_USART1
+#error "USART1 not present in the selected device"
+#endif
+
+#if STM32_UART_USE_USART2 && !STM32_HAS_USART2
+#error "USART2 not present in the selected device"
+#endif
+
+#if STM32_UART_USE_USART3 && !STM32_HAS_USART3
+#error "USART3 not present in the selected device"
+#endif
+
+#if STM32_UART_USE_UART4 && !STM32_HAS_UART4
+#error "UART4 not present in the selected device"
#endif
#if !STM32_UART_USE_USART1 && !STM32_UART_USE_USART2 && \
diff --git a/os/hal/platforms/STM8L/serial_lld.h b/os/hal/platforms/STM8L/serial_lld.h index 0447c91aa..d9fd75bf1 100644 --- a/os/hal/platforms/STM8L/serial_lld.h +++ b/os/hal/platforms/STM8L/serial_lld.h @@ -80,15 +80,15 @@ /*===========================================================================*/
#if STM8L_SERIAL_USE_USART1 && !STM8L_HAS_USART1
-#error "USART1 enabled but not present"
+#error "USART1 not present in the selected device"
#endif
#if STM8L_SERIAL_USE_USART2 && !STM8L_HAS_USART2
-#error "USART2 enabled but not present"
+#error "USART2 not present in the selected device"
#endif
#if STM8L_SERIAL_USE_USART3 && !STM8L_HAS_USART3
-#error "USART3 enabled but not present"
+#error "USART3 not present in the selected device"
#endif
/*===========================================================================*/
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