git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3645 35acf78f-673a-0410-8e92-d51de3d6d3f4

30 files changed, 174 insertions, 182 deletions

diff --git a/os/hal/platforms/LPC11xx/gpt_lld.c b/os/hal/platforms/LPC11xx/gpt_lld.c
index df90ac630..4a09743c1 100644
--- a/os/hal/platforms/LPC11xx/gpt_lld.c
+++ b/os/hal/platforms/LPC11xx/gpt_lld.c
@@ -209,25 +209,25 @@ void gpt_lld_start(GPTDriver *gptp) {
 #if LPC11xx_GPT_USE_CT16B0

     if (&GPTD1 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 7);

-      NVICEnableVector(TIMER_16_0_IRQn, CORTEX_PRIORITY_MASK(2));

+      nvicEnableVector(TIMER_16_0_IRQn, CORTEX_PRIORITY_MASK(2));

     }

 #endif

 #if LPC11xx_GPT_USE_CT16B1

     if (&GPTD2 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);

-      NVICEnableVector(TIMER_16_1_IRQn, CORTEX_PRIORITY_MASK(3));

+      nvicEnableVector(TIMER_16_1_IRQn, CORTEX_PRIORITY_MASK(3));

     }

 #endif

 #if LPC11xx_GPT_USE_CT32B0

     if (&GPTD3 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 9);

-      NVICEnableVector(TIMER_32_0_IRQn, CORTEX_PRIORITY_MASK(2));

+      nvicEnableVector(TIMER_32_0_IRQn, CORTEX_PRIORITY_MASK(2));

     }

 #endif

 #if LPC11xx_GPT_USE_CT32B1

     if (&GPTD4 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);

-      NVICEnableVector(TIMER_32_1_IRQn, CORTEX_PRIORITY_MASK(2));

+      nvicEnableVector(TIMER_32_1_IRQn, CORTEX_PRIORITY_MASK(2));

     }

 #endif

   }

@@ -259,25 +259,25 @@ void gpt_lld_stop(GPTDriver *gptp) {
 

 #if LPC11xx_GPT_USE_CT16B0

     if (&GPTD1 == gptp) {

-      NVICDisableVector(TIMER_16_0_IRQn);

+      nvicDisableVector(TIMER_16_0_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 7);

     }

 #endif

 #if LPC11xx_GPT_USE_CT16B1

     if (&GPTD2 == gptp) {

-      NVICDisableVector(TIMER_16_1_IRQn);

+      nvicDisableVector(TIMER_16_1_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 8);

     }

 #endif

 #if LPC11xx_GPT_USE_CT32B0

     if (&GPTD3 == gptp) {

-      NVICDisableVector(TIMER_32_0_IRQn);

+      nvicDisableVector(TIMER_32_0_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 9);

     }

 #endif

 #if LPC11xx_GPT_USE_CT32B1

     if (&GPTD4 == gptp) {

-      NVICDisableVector(TIMER_32_1_IRQn);

+      nvicDisableVector(TIMER_32_1_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 10);

     }

 #endif

diff --git a/os/hal/platforms/LPC11xx/hal_lld.c b/os/hal/platforms/LPC11xx/hal_lld.c
index 89db29491..4e141e021 100644
--- a/os/hal/platforms/LPC11xx/hal_lld.c
+++ b/os/hal/platforms/LPC11xx/hal_lld.c
@@ -62,7 +62,7 @@
 void hal_lld_init(void) {

 

   /* SysTick initialization using the system clock.*/

-  NVICSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);

+  nvicSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);

   SysTick->LOAD = LPC11xx_SYSCLK / CH_FREQUENCY - 1;

   SysTick->VAL = 0;

   SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |

diff --git a/os/hal/platforms/LPC11xx/serial_lld.c b/os/hal/platforms/LPC11xx/serial_lld.c
index 269a5a8e5..89dfab92d 100644
--- a/os/hal/platforms/LPC11xx/serial_lld.c
+++ b/os/hal/platforms/LPC11xx/serial_lld.c
@@ -265,7 +265,7 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
     if (&SD1 == sdp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12);

       LPC_SYSCON->UARTCLKDIV = LPC11xx_SERIAL_UART0CLKDIV;

-      NVICEnableVector(UART_IRQn,

+      nvicEnableVector(UART_IRQn,

                        CORTEX_PRIORITY_MASK(LPC11xx_SERIAL_UART0_IRQ_PRIORITY));

     }

 #endif

@@ -290,7 +290,7 @@ void sd_lld_stop(SerialDriver *sdp) {
     if (&SD1 == sdp) {

       LPC_SYSCON->UARTCLKDIV = 0;

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 12);

-      NVICDisableVector(UART_IRQn);

+      nvicDisableVector(UART_IRQn);

       return;

     }

 #endif

diff --git a/os/hal/platforms/LPC11xx/spi_lld.c b/os/hal/platforms/LPC11xx/spi_lld.c
index 5704b17f3..b65ad1ef2 100644
--- a/os/hal/platforms/LPC11xx/spi_lld.c
+++ b/os/hal/platforms/LPC11xx/spi_lld.c
@@ -215,7 +215,7 @@ void spi_lld_start(SPIDriver *spip) {
       LPC_SYSCON->SSP0CLKDIV = LPC11xx_SPI_SSP0CLKDIV;

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 11);

       LPC_SYSCON->PRESETCTRL |= 1;

-      NVICEnableVector(SSP0_IRQn,

+      nvicEnableVector(SSP0_IRQn,

                        CORTEX_PRIORITY_MASK(LPC11xx_SPI_SSP0_IRQ_PRIORITY));

     }

 #endif

@@ -224,7 +224,7 @@ void spi_lld_start(SPIDriver *spip) {
       LPC_SYSCON->SSP1CLKDIV = LPC11xx_SPI_SSP1CLKDIV;

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 18);

       LPC_SYSCON->PRESETCTRL |= 4;

-      NVICEnableVector(SSP1_IRQn,

+      nvicEnableVector(SSP1_IRQn,

                        CORTEX_PRIORITY_MASK(LPC11xx_SPI_SSP1_IRQ_PRIORITY));

     }

 #endif

@@ -255,7 +255,7 @@ void spi_lld_stop(SPIDriver *spip) {
       LPC_SYSCON->PRESETCTRL &= ~1;

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 11);

       LPC_SYSCON->SSP0CLKDIV = 0;

-      NVICDisableVector(SSP0_IRQn);

+      nvicDisableVector(SSP0_IRQn);

     }

 #endif

 #if LPC11xx_SPI_USE_SSP1

@@ -263,7 +263,7 @@ void spi_lld_stop(SPIDriver *spip) {
       LPC_SYSCON->PRESETCTRL &= ~4;

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 18);

       LPC_SYSCON->SSP1CLKDIV = 0;

-      NVICDisableVector(SSP1_IRQn);

+      nvicDisableVector(SSP1_IRQn);

     }

 #endif

   }

diff --git a/os/hal/platforms/LPC13xx/gpt_lld.c b/os/hal/platforms/LPC13xx/gpt_lld.c
index 7d6961889..d1df035f6 100644
--- a/os/hal/platforms/LPC13xx/gpt_lld.c
+++ b/os/hal/platforms/LPC13xx/gpt_lld.c
@@ -209,25 +209,25 @@ void gpt_lld_start(GPTDriver *gptp) {
 #if LPC13xx_GPT_USE_CT16B0

     if (&GPTD1 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 7);

-      NVICEnableVector(TIMER_16_0_IRQn, CORTEX_PRIORITY_MASK(2));

+      nvicEnableVector(TIMER_16_0_IRQn, CORTEX_PRIORITY_MASK(2));

     }

 #endif

 #if LPC13xx_GPT_USE_CT16B1

     if (&GPTD2 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);

-      NVICEnableVector(TIMER_16_1_IRQn, CORTEX_PRIORITY_MASK(3));

+      nvicEnableVector(TIMER_16_1_IRQn, CORTEX_PRIORITY_MASK(3));

     }

 #endif

 #if LPC13xx_GPT_USE_CT32B0

     if (&GPTD3 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 9);

-      NVICEnableVector(TIMER_32_0_IRQn, CORTEX_PRIORITY_MASK(2));

+      nvicEnableVector(TIMER_32_0_IRQn, CORTEX_PRIORITY_MASK(2));

     }

 #endif

 #if LPC13xx_GPT_USE_CT32B1

     if (&GPTD4 == gptp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);

-      NVICEnableVector(TIMER_32_1_IRQn, CORTEX_PRIORITY_MASK(2));

+      nvicEnableVector(TIMER_32_1_IRQn, CORTEX_PRIORITY_MASK(2));

     }

 #endif

   }

@@ -259,25 +259,25 @@ void gpt_lld_stop(GPTDriver *gptp) {
 

 #if LPC13xx_GPT_USE_CT16B0

     if (&GPTD1 == gptp) {

-      NVICDisableVector(TIMER_16_0_IRQn);

+      nvicDisableVector(TIMER_16_0_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 7);

     }

 #endif

 #if LPC13xx_GPT_USE_CT16B1

     if (&GPTD2 == gptp) {

-      NVICDisableVector(TIMER_16_1_IRQn);

+      nvicDisableVector(TIMER_16_1_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 8);

     }

 #endif

 #if LPC13xx_GPT_USE_CT32B0

     if (&GPTD3 == gptp) {

-      NVICDisableVector(TIMER_32_0_IRQn);

+      nvicDisableVector(TIMER_32_0_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 9);

     }

 #endif

 #if LPC13xx_GPT_USE_CT32B1

     if (&GPTD4 == gptp) {

-      NVICDisableVector(TIMER_32_1_IRQn);

+      nvicDisableVector(TIMER_32_1_IRQn);

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 10);

     }

 #endif

diff --git a/os/hal/platforms/LPC13xx/hal_lld.c b/os/hal/platforms/LPC13xx/hal_lld.c
index da09ebf43..942a37d31 100644
--- a/os/hal/platforms/LPC13xx/hal_lld.c
+++ b/os/hal/platforms/LPC13xx/hal_lld.c
@@ -62,7 +62,7 @@
 void hal_lld_init(void) {

 

   /* SysTick initialization using the system clock.*/

-  NVICSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);

+  nvicSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);

   SysTick->LOAD = LPC13xx_SYSCLK / CH_FREQUENCY - 1;

   SysTick->VAL = 0;

   SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |

diff --git a/os/hal/platforms/LPC13xx/serial_lld.c b/os/hal/platforms/LPC13xx/serial_lld.c
index b4f7844c4..d6a00271d 100644
--- a/os/hal/platforms/LPC13xx/serial_lld.c
+++ b/os/hal/platforms/LPC13xx/serial_lld.c
@@ -265,7 +265,7 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
     if (&SD1 == sdp) {

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12);

       LPC_SYSCON->UARTCLKDIV = LPC13xx_SERIAL_UART0CLKDIV;

-      NVICEnableVector(UART_IRQn,

+      nvicEnableVector(UART_IRQn,

                        CORTEX_PRIORITY_MASK(LPC13xx_SERIAL_UART0_IRQ_PRIORITY));

     }

 #endif

@@ -290,7 +290,7 @@ void sd_lld_stop(SerialDriver *sdp) {
     if (&SD1 == sdp) {

       LPC_SYSCON->UARTCLKDIV = 0;

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 12);

-      NVICDisableVector(UART_IRQn);

+      nvicDisableVector(UART_IRQn);

       return;

     }

 #endif

diff --git a/os/hal/platforms/LPC13xx/spi_lld.c b/os/hal/platforms/LPC13xx/spi_lld.c
index ec207f19e..5e6aab93b 100644
--- a/os/hal/platforms/LPC13xx/spi_lld.c
+++ b/os/hal/platforms/LPC13xx/spi_lld.c
@@ -186,7 +186,7 @@ void spi_lld_start(SPIDriver *spip) {
       LPC_SYSCON->SSPCLKDIV = LPC13xx_SPI_SSP0CLKDIV;

       LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 11);

       LPC_SYSCON->PRESETCTRL |= 1;

-      NVICEnableVector(SSP_IRQn,

+      nvicEnableVector(SSP_IRQn,

                        CORTEX_PRIORITY_MASK(LPC13xx_SPI_SSP0_IRQ_PRIORITY));

     }

 #endif

@@ -217,7 +217,7 @@ void spi_lld_stop(SPIDriver *spip) {
       LPC_SYSCON->PRESETCTRL &= ~1;

       LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 11);

       LPC_SYSCON->SSPCLKDIV = 0;

-      NVICDisableVector(SSP_IRQn);

+      nvicDisableVector(SSP_IRQn);

     }

 #endif

   }

diff --git a/os/hal/platforms/STM32/I2Cv1/i2c_lld.c b/os/hal/platforms/STM32/I2Cv1/i2c_lld.c
index 93b4c4061..39872edd1 100644
--- a/os/hal/platforms/STM32/I2Cv1/i2c_lld.c
+++ b/os/hal/platforms/STM32/I2Cv1/i2c_lld.c
@@ -534,10 +534,10 @@ void i2c_lld_start(I2CDriver *i2cp) {
 #if STM32_I2C_USE_I2C1
     if (&I2CD1 == i2cp) {
 #if I2C_SUPPORTS_CALLBACKS
-      NVICEnableVector(I2C1_EV_IRQn,
+      nvicEnableVector(I2C1_EV_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
 #endif /* I2C_SUPPORTS_CALLBACKS */
-      NVICEnableVector(I2C1_ER_IRQn,
+      nvicEnableVector(I2C1_ER_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
       rccEnableI2C1(FALSE);
     }
@@ -545,10 +545,10 @@ void i2c_lld_start(I2CDriver *i2cp) {
 #if STM32_I2C_USE_I2C2
     if (&I2CD2 == i2cp) {
 #if I2C_SUPPORTS_CALLBACKS
-      NVICEnableVector(I2C2_EV_IRQn,
+      nvicEnableVector(I2C2_EV_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
 #endif /* I2C_SUPPORTS_CALLBACKS */
-      NVICEnableVector(I2C2_ER_IRQn,
+      nvicEnableVector(I2C2_ER_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
       rccEnableI2C2(FALSE);
     }
@@ -698,15 +698,15 @@ void i2c_lld_stop(I2CDriver *i2cp) {
   if (i2cp->id_state == I2C_READY) {  /* If in ready state then disables the I2C clock.*/
 #if STM32_I2C_USE_I2C1
     if (&I2CD1 == i2cp) {
-      NVICDisableVector(I2C1_EV_IRQn);
-      NVICDisableVector(I2C1_ER_IRQn);
+      nvicDisableVector(I2C1_EV_IRQn);
+      nvicDisableVector(I2C1_ER_IRQn);
       rccDisableI2C1(FALSE);
     }
 #endif
 #if STM32_I2C_USE_I2C2
     if (&I2CD2 == i2cp) {
-      NVICDisableVector(I2C2_EV_IRQn);
-      NVICDisableVector(I2C2_ER_IRQn);
+      nvicDisableVector(I2C2_EV_IRQn);
+      nvicDisableVector(I2C2_ER_IRQn);
       rccDisableI2C2(FALSE);
     }
 #endif
diff --git a/os/hal/platforms/STM32/RTCv1/rtc_lld.c b/os/hal/platforms/STM32/RTCv1/rtc_lld.c
index 1097e1e9b..b1555219c 100644
--- a/os/hal/platforms/STM32/RTCv1/rtc_lld.c
+++ b/os/hal/platforms/STM32/RTCv1/rtc_lld.c
@@ -316,11 +316,11 @@ void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback) {
     rtc_lld_wait_write();

     RTC->CRL &= ~(RTC_CRL_OWF | RTC_CRL_ALRF | RTC_CRL_SECF);

     rtc_lld_wait_write();

-    NVICEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY));

+    nvicEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY));

     RTC->CRH |= RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE;

   }

   else {

-    NVICDisableVector(RTC_IRQn);

+    nvicDisableVector(RTC_IRQn);

     rtc_lld_wait_write();

     RTC->CRL = 0;

     RTC->CRH = 0;

diff --git a/os/hal/platforms/STM32/USBv1/usb_lld.c b/os/hal/platforms/STM32/USBv1/usb_lld.c
index e61fcadae..4685294a0 100644
--- a/os/hal/platforms/STM32/USBv1/usb_lld.c
+++ b/os/hal/platforms/STM32/USBv1/usb_lld.c
@@ -287,9 +287,9 @@ void usb_lld_start(USBDriver *usbp) {
       STM32_USB->CNTR = CNTR_FRES;

       /* Enabling the USB IRQ vectors, this also gives enough time to allow

          the transceiver power up (1uS).*/

-      NVICEnableVector(19,

+      nvicEnableVector(19,

                        CORTEX_PRIORITY_MASK(STM32_USB_USB1_HP_IRQ_PRIORITY));

-      NVICEnableVector(20,

+      nvicEnableVector(20,

                        CORTEX_PRIORITY_MASK(STM32_USB_USB1_LP_IRQ_PRIORITY));

       /* Releases the USB reset.*/

       STM32_USB->CNTR = 0;

@@ -314,8 +314,8 @@ void usb_lld_stop(USBDriver *usbp) {
   if (usbp->state == USB_STOP) {

 #if STM32_USB_USE_USB1

     if (&USBD1 == usbp) {

-      NVICDisableVector(19);

-      NVICDisableVector(20);

+      nvicDisableVector(19);

+      nvicDisableVector(20);

       STM32_USB->CNTR = CNTR_PDWN | CNTR_FRES;

       rccDisableUSB(FALSE);

     }

diff --git a/os/hal/platforms/STM32/can_lld.c b/os/hal/platforms/STM32/can_lld.c
index 64ccb3af3..1cba89d64 100644
--- a/os/hal/platforms/STM32/can_lld.c
+++ b/os/hal/platforms/STM32/can_lld.c
@@ -184,13 +184,13 @@ void can_lld_start(CANDriver *canp) {
   /* Clock activation.*/

 #if STM32_CAN_USE_CAN1

   if (&CAND1 == canp) {

-    NVICEnableVector(USB_HP_CAN1_TX_IRQn,

+    nvicEnableVector(USB_HP_CAN1_TX_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));

-    NVICEnableVector(USB_LP_CAN1_RX0_IRQn,

+    nvicEnableVector(USB_LP_CAN1_RX0_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));

-    NVICEnableVector(CAN1_RX1_IRQn,

+    nvicEnableVector(CAN1_RX1_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));

-    NVICEnableVector(CAN1_SCE_IRQn,

+    nvicEnableVector(CAN1_SCE_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));

     rccEnableCAN1(FALSE);

   }

@@ -272,10 +272,10 @@ void can_lld_stop(CANDriver *canp) {
     if (&CAND1 == canp) {

       CAN1->MCR = 0x00010002;                   /* Register reset value.    */

       CAN1->IER = 0x00000000;                   /* All sources disabled.    */

-      NVICDisableVector(USB_HP_CAN1_TX_IRQn);

-      NVICDisableVector(USB_LP_CAN1_RX0_IRQn);

-      NVICDisableVector(CAN1_RX1_IRQn);

-      NVICDisableVector(CAN1_SCE_IRQn);

+      nvicDisableVector(USB_HP_CAN1_TX_IRQn);

+      nvicDisableVector(USB_LP_CAN1_RX0_IRQn);

+      nvicDisableVector(CAN1_RX1_IRQn);

+      nvicDisableVector(CAN1_SCE_IRQn);

       rccDisableCAN1(FALSE);

     }

 #endif

diff --git a/os/hal/platforms/STM32/ext_lld.c b/os/hal/platforms/STM32/ext_lld.c
index c9b4b75c2..2d32e345c 100644
--- a/os/hal/platforms/STM32/ext_lld.c
+++ b/os/hal/platforms/STM32/ext_lld.c
@@ -434,55 +434,55 @@ void ext_lld_start(EXTDriver *extp) {
 

   if (extp->state == EXT_STOP) {

     /* Clock activation.*/

-    NVICEnableVector(EXTI0_IRQn,

+    nvicEnableVector(EXTI0_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI0_IRQ_PRIORITY));

-    NVICEnableVector(EXTI1_IRQn,

+    nvicEnableVector(EXTI1_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI1_IRQ_PRIORITY));

-    NVICEnableVector(EXTI2_IRQn,

+    nvicEnableVector(EXTI2_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI2_IRQ_PRIORITY));

-    NVICEnableVector(EXTI3_IRQn,

+    nvicEnableVector(EXTI3_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI3_IRQ_PRIORITY));

-    NVICEnableVector(EXTI4_IRQn,

+    nvicEnableVector(EXTI4_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_IRQ_PRIORITY));

-    NVICEnableVector(EXTI9_5_IRQn,

+    nvicEnableVector(EXTI9_5_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI5_9_IRQ_PRIORITY));

-    NVICEnableVector(EXTI15_10_IRQn,

+    nvicEnableVector(EXTI15_10_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI10_15_IRQ_PRIORITY));

-    NVICEnableVector(PVD_IRQn,

+    nvicEnableVector(PVD_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI16_IRQ_PRIORITY));

-    NVICEnableVector(RTC_Alarm_IRQn,

+    nvicEnableVector(RTC_Alarm_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI17_IRQ_PRIORITY));

 #if defined(STM32L1XX_MD)

     /* EXTI vectors specific to STM32L1xx.*/

-    NVICEnableVector(USB_FS_WKUP_IRQn,

+    nvicEnableVector(USB_FS_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));

-    NVICEnableVector(TAMPER_STAMP_IRQn,

+    nvicEnableVector(TAMPER_STAMP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI19_IRQ_PRIORITY));

-    NVICEnableVector(RTC_WKUP_IRQn,

+    nvicEnableVector(RTC_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI20_IRQ_PRIORITY));

-    NVICEnableVector(COMP_IRQn,

+    nvicEnableVector(COMP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI21_IRQ_PRIORITY));

 #elif defined(STM32F2XX) || defined(STM32F4XX)

     /* EXTI vectors specific to STM32F2xx/STM32F4xx.*/

-    NVICEnableVector(OTG_FS_WKUP_IRQn,

+    nvicEnableVector(OTG_FS_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));

-    NVICEnableVector(ETH_WKUP_IRQn,

+    nvicEnableVector(ETH_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI19_IRQ_PRIORITY));

-    NVICEnableVector(OTG_HS_WKUP_IRQn,

+    nvicEnableVector(OTG_HS_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI20_IRQ_PRIORITY));

-    NVICEnableVector(TAMP_STAMP_IRQn,

+    nvicEnableVector(TAMP_STAMP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI21_IRQ_PRIORITY));

-    NVICEnableVector(RTC_WKUP_IRQn,

+    nvicEnableVector(RTC_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI22_IRQ_PRIORITY));

 #elif defined(STM32F10X_CL)

     /* EXTI vectors specific to STM32F1xx Connectivity Line.*/

-    NVICEnableVector(OTG_FS_WKUP_IRQn,

+    nvicEnableVector(OTG_FS_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));

-    NVICEnableVector(ETH_WKUP_IRQn,

+    nvicEnableVector(ETH_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI19_IRQ_PRIORITY));

 #else

     /* EXTI vectors specific to STM32F1xx except Connectivity Line.*/

-    NVICEnableVector(USB_FS_WKUP_IRQn,

+    nvicEnableVector(USB_FS_WKUP_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));

 #endif

   }

@@ -529,35 +529,35 @@ void ext_lld_start(EXTDriver *extp) {
 void ext_lld_stop(EXTDriver *extp) {

 

   if (extp->state == EXT_ACTIVE) {

-    NVICDisableVector(EXTI0_IRQn);

-    NVICDisableVector(EXTI1_IRQn);

-    NVICDisableVector(EXTI2_IRQn);

-    NVICDisableVector(EXTI3_IRQn);

-    NVICDisableVector(EXTI4_IRQn);

-    NVICDisableVector(EXTI9_5_IRQn);

-    NVICDisableVector(EXTI15_10_IRQn);

-    NVICDisableVector(PVD_IRQn);

-    NVICDisableVector(RTC_Alarm_IRQn);

+    nvicDisableVector(EXTI0_IRQn);

+    nvicDisableVector(EXTI1_IRQn);

+    nvicDisableVector(EXTI2_IRQn);

+    nvicDisableVector(EXTI3_IRQn);

+    nvicDisableVector(EXTI4_IRQn);

+    nvicDisableVector(EXTI9_5_IRQn);

+    nvicDisableVector(EXTI15_10_IRQn);

+    nvicDisableVector(PVD_IRQn);

+    nvicDisableVector(RTC_Alarm_IRQn);

 #if defined(STM32L1XX_MD)

     /* EXTI vectors specific to STM32L1xx.*/

-    NVICDisableVector(USB_FS_WKUP_IRQn);

-    NVICDisableVector(TAMPER_STAMP_IRQn);

-    NVICDisableVector(RTC_WKUP_IRQn);

-    NVICDisableVector(COMP_IRQn);

+    nvicDisableVector(USB_FS_WKUP_IRQn);

+    nvicDisableVector(TAMPER_STAMP_IRQn);

+    nvicDisableVector(RTC_WKUP_IRQn);

+    nvicDisableVector(COMP_IRQn);

 #elif defined(STM32F2XX) || defined(STM32F4XX)

     /* EXTI vectors specific to STM32F2xx/STM32F4xx.*/

-    NVICDisableVector(OTG_FS_WKUP_IRQn);

-    NVICDisableVector(ETH_WKUP_IRQn);

-    NVICDisableVector(OTG_HS_WKUP_IRQn);

-    NVICDisableVector(TAMP_STAMP_IRQn);

-    NVICDisableVector(RTC_WKUP_IRQn);

+    nvicDisableVector(OTG_FS_WKUP_IRQn);

+    nvicDisableVector(ETH_WKUP_IRQn);

+    nvicDisableVector(OTG_HS_WKUP_IRQn);

+    nvicDisableVector(TAMP_STAMP_IRQn);

+    nvicDisableVector(RTC_WKUP_IRQn);

 #elif defined(STM32F10X_CL)

     /* EXTI vectors specific to STM32F1xx Connectivity Line.*/

-    NVICDisableVector(OTG_FS_WKUP_IRQn);

-    NVICDisableVector(ETH_WKUP_IRQn);

+    nvicDisableVector(OTG_FS_WKUP_IRQn);

+    nvicDisableVector(ETH_WKUP_IRQn);

 #else

     /* EXTI vectors specific to STM32F1xx except Connectivity Line.*/

-    NVICDisableVector(USB_FS_WKUP_IRQn);

+    nvicDisableVector(USB_FS_WKUP_IRQn);

 #endif

   }

   EXTI->EMR = 0;

diff --git a/os/hal/platforms/STM32/gpt_lld.c b/os/hal/platforms/STM32/gpt_lld.c
index 34468ccc3..9562f9b9a 100644
--- a/os/hal/platforms/STM32/gpt_lld.c
+++ b/os/hal/platforms/STM32/gpt_lld.c
@@ -270,7 +270,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD1 == gptp) {

       rccEnableTIM1(FALSE);

       rccResetTIM1();

-      NVICEnableVector(TIM1_UP_IRQn,

+      nvicEnableVector(TIM1_UP_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM1_IRQ_PRIORITY));

       gptp->clock = STM32_TIMCLK2;

     }

@@ -279,7 +279,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD2 == gptp) {

       rccEnableTIM2(FALSE);

       rccResetTIM2();

-      NVICEnableVector(TIM2_IRQn,

+      nvicEnableVector(TIM2_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM2_IRQ_PRIORITY));

       gptp->clock = STM32_TIMCLK1;

     }

@@ -288,7 +288,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD3 == gptp) {

       rccEnableTIM3(FALSE);

       rccResetTIM3();

-      NVICEnableVector(TIM3_IRQn,

+      nvicEnableVector(TIM3_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM3_IRQ_PRIORITY));

       gptp->clock = STM32_TIMCLK1;

     }

@@ -297,7 +297,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD4 == gptp) {

       rccEnableTIM4(FALSE);

       rccResetTIM4();

-      NVICEnableVector(TIM4_IRQn,

+      nvicEnableVector(TIM4_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM4_IRQ_PRIORITY));

       gptp->clock = STM32_TIMCLK1;

     }

@@ -307,7 +307,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD5 == gptp) {

       rccEnableTIM5(FALSE);

       rccResetTIM5();

-      NVICEnableVector(TIM5_IRQn,

+      nvicEnableVector(TIM5_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM5_IRQ_PRIORITY));

       gptp->clock = STM32_TIMCLK1;

     }

@@ -317,7 +317,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     if (&GPTD8 == gptp) {

       rccEnableTIM8(FALSE);

       rccResetTIM8();

-      NVICEnableVector(TIM8_UP_IRQn,

+      nvicEnableVector(TIM8_UP_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM8_IRQ_PRIORITY));

       gptp->clock = STM32_TIMCLK2;

     }

@@ -352,37 +352,37 @@ void gpt_lld_stop(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM1

     if (&GPTD1 == gptp) {

-      NVICDisableVector(TIM1_UP_IRQn);

+      nvicDisableVector(TIM1_UP_IRQn);

       rccDisableTIM1(FALSE);

     }

 #endif

 #if STM32_GPT_USE_TIM2

     if (&GPTD2 == gptp) {

-      NVICDisableVector(TIM2_IRQn);

+      nvicDisableVector(TIM2_IRQn);

       rccDisableTIM2(FALSE);

     }

 #endif

 #if STM32_GPT_USE_TIM3

     if (&GPTD3 == gptp) {

-      NVICDisableVector(TIM3_IRQn);

+      nvicDisableVector(TIM3_IRQn);

       rccDisableTIM3(FALSE);

     }

 #endif

 #if STM32_GPT_USE_TIM4

     if (&GPTD4 == gptp) {

-      NVICDisableVector(TIM4_IRQn);

+      nvicDisableVector(TIM4_IRQn);

       rccDisableTIM4(FALSE);

     }

 #endif

 #if STM32_GPT_USE_TIM5

     if (&GPTD5 == gptp) {

-      NVICDisableVector(TIM5_IRQn);

+      nvicDisableVector(TIM5_IRQn);

       rccDisableTIM5(FALSE);

     }

 #endif

 #if STM32_GPT_USE_TIM8

     if (&GPTD8 == gptp) {

-      NVICDisableVector(TIM8_UP_IRQn);

+      nvicDisableVector(TIM8_UP_IRQn);

       rccDisableTIM8(FALSE);

     }

 #endif

diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c
index 8f8262005..d172abebb 100644
--- a/os/hal/platforms/STM32/i2c_lld.c
+++ b/os/hal/platforms/STM32/i2c_lld.c
@@ -384,9 +384,9 @@ void i2c_lld_start(I2CDriver *i2cp) {
                             (void *)i2cp);
       chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");
       rccEnableI2C1(FALSE);
-      NVICEnableVector(I2C1_EV_IRQn,
+      nvicEnableVector(I2C1_EV_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
-      NVICEnableVector(I2C1_ER_IRQn,
+      nvicEnableVector(I2C1_ER_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C1_IRQ_PRIORITY));
 
       i2cp->dmamode |= STM32_DMA_CR_CHSEL(I2C1_RX_DMA_CHANNEL) | \
@@ -410,9 +410,9 @@ void i2c_lld_start(I2CDriver *i2cp) {
                             (void *)i2cp);
       chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");
       rccEnableI2C2(FALSE);
-      NVICEnableVector(I2C2_EV_IRQn,
+      nvicEnableVector(I2C2_EV_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C2_IRQ_PRIORITY));
-      NVICEnableVector(I2C2_ER_IRQn,
+      nvicEnableVector(I2C2_ER_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C2_IRQ_PRIORITY));
 
       i2cp->dmamode |= STM32_DMA_CR_CHSEL(I2C2_RX_DMA_CHANNEL) |
@@ -435,9 +435,9 @@ void i2c_lld_start(I2CDriver *i2cp) {
                             (void *)i2cp);
       chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");
       rccEnableI2C3(FALSE);
-      NVICEnableVector(I2C3_EV_IRQn,
+      nvicEnableVector(I2C3_EV_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C3_IRQ_PRIORITY));
-      NVICEnableVector(I2C3_ER_IRQn,
+      nvicEnableVector(I2C3_ER_IRQn,
           CORTEX_PRIORITY_MASK(STM32_I2C_I2C3_IRQ_PRIORITY));
 
       i2cp->dmamode |= STM32_DMA_CR_CHSEL(I2C3_RX_DMA_CHANNEL) |
@@ -705,24 +705,24 @@ void i2c_lld_stop(I2CDriver *i2cp) {
 
 #if STM32_I2C_USE_I2C1
     if (&I2CD1 == i2cp) {
-      NVICDisableVector(I2C1_EV_IRQn);
-      NVICDisableVector(I2C1_ER_IRQn);
+      nvicDisableVector(I2C1_EV_IRQn);
+      nvicDisableVector(I2C1_ER_IRQn);
       rccDisableI2C1(FALSE);
     }
 #endif
 
 #if STM32_I2C_USE_I2C2
     if (&I2CD2 == i2cp) {
-      NVICDisableVector(I2C2_EV_IRQn);
-      NVICDisableVector(I2C2_ER_IRQn);
+      nvicDisableVector(I2C2_EV_IRQn);
+      nvicDisableVector(I2C2_ER_IRQn);
       rccDisableI2C2(FALSE);
     }
 #endif
 
 #if STM32_I2C_USE_I2C3
     if (&I2CD3 == i2cp) {
-      NVICDisableVector(I2C3_EV_IRQn);
-      NVICDisableVector(I2C3_ER_IRQn);
+      nvicDisableVector(I2C3_EV_IRQn);
+      nvicDisableVector(I2C3_ER_IRQn);
       rccDisableI2C3(FALSE);
     }
 #endif
diff --git a/os/hal/platforms/STM32/icu_lld.c b/os/hal/platforms/STM32/icu_lld.c
index dfbcee5e6..5ba804d9b 100644
--- a/os/hal/platforms/STM32/icu_lld.c
+++ b/os/hal/platforms/STM32/icu_lld.c
@@ -289,7 +289,7 @@ void icu_lld_start(ICUDriver *icup) {
     if (&ICUD1 == icup) {

       rccEnableTIM1(FALSE);

       rccResetTIM1();

-      NVICEnableVector(TIM1_CC_IRQn,

+      nvicEnableVector(TIM1_CC_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));

       icup->clock = STM32_TIMCLK2;

     }

@@ -298,7 +298,7 @@ void icu_lld_start(ICUDriver *icup) {
     if (&ICUD2 == icup) {

       rccEnableTIM2(FALSE);

       rccResetTIM2();

-      NVICEnableVector(TIM2_IRQn,

+      nvicEnableVector(TIM2_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM2_IRQ_PRIORITY));

       icup->clock = STM32_TIMCLK1;

     }

@@ -307,7 +307,7 @@ void icu_lld_start(ICUDriver *icup) {
     if (&ICUD3 == icup) {

       rccEnableTIM3(FALSE);

       rccResetTIM3();

-      NVICEnableVector(TIM3_IRQn,

+      nvicEnableVector(TIM3_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM3_IRQ_PRIORITY));

       icup->clock = STM32_TIMCLK1;

     }

@@ -316,7 +316,7 @@ void icu_lld_start(ICUDriver *icup) {
     if (&ICUD4 == icup) {

       rccEnableTIM4(FALSE);

       rccResetTIM4();

-      NVICEnableVector(TIM4_IRQn,

+      nvicEnableVector(TIM4_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM4_IRQ_PRIORITY));

       icup->clock = STM32_TIMCLK1;

     }

@@ -326,7 +326,7 @@ void icu_lld_start(ICUDriver *icup) {
     if (&ICUD5 == icup) {

       rccEnableTIM5(FALSE);

       rccResetTIM5();

-      NVICEnableVector(TIM5_IRQn,

+      nvicEnableVector(TIM5_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM5_IRQ_PRIORITY));

       icup->clock = STM32_TIMCLK1;

     }

@@ -335,7 +335,7 @@ void icu_lld_start(ICUDriver *icup) {
     if (&ICUD8 == icup) {

       rccEnableTIM5(FALSE);

       rccResetTIM5();

-      NVICEnableVector(TIM8_CC_IRQn,

+      nvicEnableVector(TIM8_CC_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));

       icup->clock = STM32_TIMCLK2;

     }

@@ -395,38 +395,38 @@ void icu_lld_stop(ICUDriver *icup) {
 

 #if STM32_ICU_USE_TIM1

     if (&ICUD1 == icup) {

-      NVICDisableVector(TIM1_CC_IRQn);

+      nvicDisableVector(TIM1_CC_IRQn);

       rccDisableTIM1(FALSE);

     }

 #endif

 #if STM32_ICU_USE_TIM2

     if (&ICUD2 == icup) {

-      NVICDisableVector(TIM2_IRQn);

+      nvicDisableVector(TIM2_IRQn);

       rccDisableTIM2(FALSE);

     }

 #endif

 #if STM32_ICU_USE_TIM3

     if (&ICUD3 == icup) {

-      NVICDisableVector(TIM3_IRQn);

+      nvicDisableVector(TIM3_IRQn);

       rccDisableTIM3(FALSE);

     }

 #endif

 #if STM32_ICU_USE_TIM4

     if (&ICUD4 == icup) {

-      NVICDisableVector(TIM4_IRQn);

+      nvicDisableVector(TIM4_IRQn);

       rccDisableTIM4(FALSE);

     }

 #endif

 #if STM32_ICU_USE_TIM5

     if (&ICUD5 == icup) {

-      NVICDisableVector(TIM5_IRQn);

+      nvicDisableVector(TIM5_IRQn);

       rccDisableTIM5(FALSE);

     }

 #endif

   }

 #if STM32_ICU_USE_TIM8

     if (&ICUD8 == icup) {

-      NVICDisableVector(TIM8_CC_IRQn);

+      nvicDisableVector(TIM8_CC_IRQn);

       rccDisableTIM8(FALSE);

     }

 #endif

diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index cdb2d3978..f152fffc5 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -351,9 +351,9 @@ void pwm_lld_start(PWMDriver *pwmp) {
     if (&PWMD1 == pwmp) {

       rccEnableTIM1(FALSE);

       rccResetTIM1();

-      NVICEnableVector(TIM1_UP_IRQn,

+      nvicEnableVector(TIM1_UP_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));

-      NVICEnableVector(TIM1_CC_IRQn,

+      nvicEnableVector(TIM1_CC_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));

       pwmp->clock = STM32_TIMCLK2;

     }

@@ -362,7 +362,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
     if (&PWMD2 == pwmp) {

       rccEnableTIM2(FALSE);

       rccResetTIM2();

-      NVICEnableVector(TIM2_IRQn,

+      nvicEnableVector(TIM2_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM2_IRQ_PRIORITY));

       pwmp->clock = STM32_TIMCLK1;

     }

@@ -371,7 +371,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
     if (&PWMD3 == pwmp) {

       rccEnableTIM3(FALSE);

       rccResetTIM3();

-      NVICEnableVector(TIM3_IRQn,

+      nvicEnableVector(TIM3_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM3_IRQ_PRIORITY));

       pwmp->clock = STM32_TIMCLK1;

     }

@@ -380,7 +380,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
     if (&PWMD4 == pwmp) {

       rccEnableTIM4(FALSE);

       rccResetTIM4();

-      NVICEnableVector(TIM4_IRQn,

+      nvicEnableVector(TIM4_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM4_IRQ_PRIORITY));

       pwmp->clock = STM32_TIMCLK1;

     }

@@ -390,7 +390,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
     if (&PWMD5 == pwmp) {

       rccEnableTIM5(FALSE);

       rccResetTIM5();

-      NVICEnableVector(TIM5_IRQn,

+      nvicEnableVector(TIM5_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM5_IRQ_PRIORITY));

       pwmp->clock = STM32_TIMCLK1;

     }

@@ -399,9 +399,9 @@ void pwm_lld_start(PWMDriver *pwmp) {
     if (&PWMD8 == pwmp) {

       rccEnableTIM8(FALSE);

       rccResetTIM8();

-      NVICEnableVector(TIM8_UP_IRQn,

+      nvicEnableVector(TIM8_UP_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY));

-      NVICEnableVector(TIM8_CC_IRQn,

+      nvicEnableVector(TIM8_CC_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY));

       pwmp->clock = STM32_TIMCLK2;

     }

@@ -545,39 +545,39 @@ void pwm_lld_stop(PWMDriver *pwmp) {
 

 #if STM32_PWM_USE_TIM1

     if (&PWMD1 == pwmp) {

-      NVICDisableVector(TIM1_UP_IRQn);

-      NVICDisableVector(TIM1_CC_IRQn);

+      nvicDisableVector(TIM1_UP_IRQn);

+      nvicDisableVector(TIM1_CC_IRQn);

       rccDisableTIM1(FALSE);

     }

 #endif

 #if STM32_PWM_USE_TIM2

     if (&PWMD2 == pwmp) {

-      NVICDisableVector(TIM2_IRQn);

+      nvicDisableVector(TIM2_IRQn);

       rccDisableTIM2(FALSE);

     }

 #endif

 #if STM32_PWM_USE_TIM3

     if (&PWMD3 == pwmp) {

-      NVICDisableVector(TIM3_IRQn);

+      nvicDisableVector(TIM3_IRQn);

       rccDisableTIM3(FALSE);

     }

 #endif

 #if STM32_PWM_USE_TIM4

     if (&PWMD4 == pwmp) {

-      NVICDisableVector(TIM4_IRQn);

+      nvicDisableVector(TIM4_IRQn);

       rccDisableTIM4(FALSE);

     }

 #endif

 #if STM32_PWM_USE_TIM5

     if (&PWMD5 == pwmp) {

-      NVICDisableVector(TIM5_IRQn);

+      nvicDisableVector(TIM5_IRQn);

       rccDisableTIM5(FALSE);

     }

 #endif

 #if STM32_PWM_USE_TIM8

     if (&PWMD8 == pwmp) {

-      NVICDisableVector(TIM8_UP_IRQn);

-      NVICDisableVector(TIM8_CC_IRQn);

+      nvicDisableVector(TIM8_UP_IRQn);

+      nvicDisableVector(TIM8_CC_IRQn);

       rccDisableTIM8(FALSE);

     }

 #endif

diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c
index 2ce3cd0fb..3812266c7 100644
--- a/os/hal/platforms/STM32/sdc_lld.c
+++ b/os/hal/platforms/STM32/sdc_lld.c
@@ -441,7 +441,7 @@ void sdc_lld_start(SDCDriver *sdcp) {
     /* Note, the DMA must be enabled before the IRQs.*/

     dmaStreamAllocate(STM32_DMA2_STREAM4, 0, NULL, NULL);

     dmaStreamSetPeripheral(STM32_DMA2_STREAM4, &SDIO->FIFO);

-    NVICEnableVector(SDIO_IRQn,

+    nvicEnableVector(SDIO_IRQn,

                      CORTEX_PRIORITY_MASK(STM32_SDC_SDIO_IRQ_PRIORITY));

     rccEnableSDIO(FALSE);

   }

@@ -468,7 +468,7 @@ void sdc_lld_stop(SDCDriver *sdcp) {
     SDIO->DTIMER = 0;

 

     /* Clock deactivation.*/

-    NVICDisableVector(SDIO_IRQn);

+    nvicDisableVector(SDIO_IRQn);

     dmaStreamRelease(STM32_DMA2_STREAM4);

     rccDisableSDIO(FALSE);

   }

diff --git a/os/hal/platforms/STM32/serial_lld.c b/os/hal/platforms/STM32/serial_lld.c
index c5dda231b..209d755e3 100644
--- a/os/hal/platforms/STM32/serial_lld.c
+++ b/os/hal/platforms/STM32/serial_lld.c
@@ -415,42 +415,42 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
 #if STM32_SERIAL_USE_USART1

     if (&SD1 == sdp) {

       rccEnableUSART1(FALSE);

-      NVICEnableVector(USART1_IRQn,

+      nvicEnableVector(USART1_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_SERIAL_USART1_PRIORITY));

     }

 #endif

 #if STM32_SERIAL_USE_USART2

     if (&SD2 == sdp) {

       rccEnableUSART2(FALSE);

-      NVICEnableVector(USART2_IRQn,

+      nvicEnableVector(USART2_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_SERIAL_USART2_PRIORITY));

     }

 #endif

 #if STM32_SERIAL_USE_USART3

     if (&SD3 == sdp) {

       rccEnableUSART3(FALSE);

-      NVICEnableVector(USART3_IRQn,

+      nvicEnableVector(USART3_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_SERIAL_USART3_PRIORITY));

     }

 #endif

 #if STM32_SERIAL_USE_UART4

     if (&SD4 == sdp) {

       rccEnableUART4(FALSE);

-      NVICEnableVector(UART4_IRQn,

+      nvicEnableVector(UART4_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_SERIAL_UART4_PRIORITY));

     }

 #endif

 #if STM32_SERIAL_USE_UART5

     if (&SD5 == sdp) {

       rccEnableUART5(FALSE);

-      NVICEnableVector(UART5_IRQn,

+      nvicEnableVector(UART5_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_SERIAL_UART5_PRIORITY));

     }

 #endif

 #if STM32_SERIAL_USE_USART6

     if (&SD6 == sdp) {

       rccEnableUSART6(FALSE);

-      NVICEnableVector(USART6_IRQn,

+      nvicEnableVector(USART6_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_SERIAL_USART6_PRIORITY));

     }

 #endif

@@ -474,42 +474,42 @@ void sd_lld_stop(SerialDriver *sdp) {
 #if STM32_SERIAL_USE_USART1

     if (&SD1 == sdp) {

       rccDisableUSART1(FALSE);

-      NVICDisableVector(USART1_IRQn);

+      nvicDisableVector(USART1_IRQn);

       return;

     }

 #endif

 #if STM32_SERIAL_USE_USART2

     if (&SD2 == sdp) {

       rccDisableUSART2(FALSE);

-      NVICDisableVector(USART2_IRQn);

+      nvicDisableVector(USART2_IRQn);

       return;

     }

 #endif

 #if STM32_SERIAL_USE_USART3

     if (&SD3 == sdp) {

       rccDisableUSART3(FALSE);

-      NVICDisableVector(USART3_IRQn);

+      nvicDisableVector(USART3_IRQn);

       return;

     }

 #endif

 #if STM32_SERIAL_USE_UART4

     if (&SD4 == sdp) {

       rccDisableUART4(FALSE);

-      NVICDisableVector(UART4_IRQn);

+      nvicDisableVector(UART4_IRQn);

       return;

     }

 #endif

 #if STM32_SERIAL_USE_UART5

     if (&SD5 == sdp) {

       rccDisableUART5(FALSE);

-      NVICDisableVector(UART5_IRQn);

+      nvicDisableVector(UART5_IRQn);

       return;

     }

 #endif

 #if STM32_SERIAL_USE_USART6

     if (&SD6 == sdp) {

       rccDisableUSART6(FALSE);

-      NVICDisableVector(USART6_IRQn);

+      nvicDisableVector(USART6_IRQn);

       return;

     }

 #endif

diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c
index be63fc695..a9be379af 100644
--- a/os/hal/platforms/STM32/uart_lld.c
+++ b/os/hal/platforms/STM32/uart_lld.c
@@ -396,7 +396,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #2", "stream already allocated");

       rccEnableUSART1(FALSE);

-      NVICEnableVector(USART1_IRQn,

+      nvicEnableVector(USART1_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART1_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);

@@ -417,7 +417,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");

       rccEnableUSART2(FALSE);

-      NVICEnableVector(USART2_IRQn,

+      nvicEnableVector(USART2_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART2_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);

@@ -438,7 +438,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #6", "stream already allocated");

       rccEnableUSART3(FALSE);

-      NVICEnableVector(USART3_IRQn,

+      nvicEnableVector(USART3_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART3_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);

@@ -475,7 +475,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART1

     if (&UARTD1 == uartp) {

-      NVICDisableVector(USART1_IRQn);

+      nvicDisableVector(USART1_IRQn);

       rccDisableUSART1(FALSE);

       return;

     }

@@ -483,7 +483,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART2

     if (&UARTD2 == uartp) {

-      NVICDisableVector(USART2_IRQn);

+      nvicDisableVector(USART2_IRQn);

       rccDisableUSART2(FALSE);

       return;

     }

@@ -491,7 +491,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART3

     if (&UARTD3 == uartp) {

-      NVICDisableVector(USART3_IRQn);

+      nvicDisableVector(USART3_IRQn);

       rccDisableUSART3(FALSE);

       return;

     }

diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c
index 6b5cc1459..1be870fcd 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld.c
+++ b/os/hal/platforms/STM32F1xx/hal_lld.c
@@ -29,8 +29,6 @@
 #include "ch.h"

 #include "hal.h"

 

-#define AIRCR_VECTKEY           0x05FA0000

-

 /*===========================================================================*/

 /* Driver exported variables.                                                */

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.c b/os/hal/platforms/STM32F1xx/stm32_dma.c
index 7fd1e39ee..939ae9e93 100644
--- a/os/hal/platforms/STM32F1xx/stm32_dma.c
+++ b/os/hal/platforms/STM32F1xx/stm32_dma.c
@@ -451,7 +451,7 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
 

   /* Enables the associated IRQ vector if a callback is defined.*/

   if (func != NULL)

-    NVICEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

+    nvicEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

 

   return FALSE;

 }

@@ -478,7 +478,7 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
               "dmaRelease(), #1", "not allocated");

 

   /* Disables the associated IRQ vector.*/

-  NVICDisableVector(dmastp->vector);

+  nvicDisableVector(dmastp->vector);

 

   /* Marks the stream as not allocated.*/

   dma_streams_mask &= ~(1 << dmastp->selfindex);

diff --git a/os/hal/platforms/STM32F2xx/hal_lld.c b/os/hal/platforms/STM32F2xx/hal_lld.c
index 3f7bf538b..2d5d56895 100644
--- a/os/hal/platforms/STM32F2xx/hal_lld.c
+++ b/os/hal/platforms/STM32F2xx/hal_lld.c
@@ -29,8 +29,6 @@
 #include "ch.h"

 #include "hal.h"

 

-#define AIRCR_VECTKEY           0x05FA0000

-

 /*===========================================================================*/

 /* Driver exported variables.                                                */

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32F2xx/stm32_dma.c b/os/hal/platforms/STM32F2xx/stm32_dma.c
index 70f412083..95b3e555c 100644
--- a/os/hal/platforms/STM32F2xx/stm32_dma.c
+++ b/os/hal/platforms/STM32F2xx/stm32_dma.c
@@ -493,7 +493,7 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
 

   /* Enables the associated IRQ vector if a callback is defined.*/

   if (func != NULL)

-    NVICEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

+    nvicEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

 

   return FALSE;

 }

@@ -520,7 +520,7 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
               "dmaRelease(), #1", "not allocated");

 

   /* Disables the associated IRQ vector.*/

-  NVICDisableVector(dmastp->vector);

+  nvicDisableVector(dmastp->vector);

 

   /* Marks the stream as not allocated.*/

   dma_streams_mask &= ~(1 << dmastp->selfindex);

diff --git a/os/hal/platforms/STM32F4xx/adc_lld.c b/os/hal/platforms/STM32F4xx/adc_lld.c
index 777804b5a..963ffc7c7 100644
--- a/os/hal/platforms/STM32F4xx/adc_lld.c
+++ b/os/hal/platforms/STM32F4xx/adc_lld.c
@@ -220,7 +220,7 @@ void adc_lld_init(void) {
 

   /* The shared vector is initialized on driver initialization and never

      disabled.*/

-  NVICEnableVector(ADC_IRQn, CORTEX_PRIORITY_MASK(STM32_ADC_IRQ_PRIORITY));

+  nvicEnableVector(ADC_IRQn, CORTEX_PRIORITY_MASK(STM32_ADC_IRQ_PRIORITY));

 }

 

 /**

diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index d33237c2d..fa87998c5 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -29,8 +29,6 @@
 #include "ch.h"

 #include "hal.h"

 

-#define AIRCR_VECTKEY           0x05FA0000

-

 /*===========================================================================*/

 /* Driver exported variables.                                                */

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32F4xx/stm32_dma.c b/os/hal/platforms/STM32F4xx/stm32_dma.c
index d7005b77b..4a0ea3e8e 100644
--- a/os/hal/platforms/STM32F4xx/stm32_dma.c
+++ b/os/hal/platforms/STM32F4xx/stm32_dma.c
@@ -489,7 +489,7 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
 

   /* Enables the associated IRQ vector if a callback is defined.*/

   if (func != NULL)

-    NVICEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

+    nvicEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

 

   return FALSE;

 }

@@ -516,7 +516,7 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
               "dmaRelease(), #1", "not allocated");

 

   /* Disables the associated IRQ vector.*/

-  NVICDisableVector(dmastp->vector);

+  nvicDisableVector(dmastp->vector);

 

   /* Marks the stream as not allocated.*/

   dma_streams_mask &= ~(1 << dmastp->selfindex);

diff --git a/os/hal/platforms/STM32L1xx/adc_lld.c b/os/hal/platforms/STM32L1xx/adc_lld.c
index 3d91a9991..cdd2ab167 100644
--- a/os/hal/platforms/STM32L1xx/adc_lld.c
+++ b/os/hal/platforms/STM32L1xx/adc_lld.c
@@ -135,7 +135,7 @@ void adc_lld_init(void) {
 

   /* The shared vector is initialized on driver initialization and never

      disabled.*/

-  NVICEnableVector(ADC1_IRQn, CORTEX_PRIORITY_MASK(STM32_ADC_IRQ_PRIORITY));

+  nvicEnableVector(ADC1_IRQn, CORTEX_PRIORITY_MASK(STM32_ADC_IRQ_PRIORITY));

 }

 

 /**

diff --git a/os/hal/platforms/STM32L1xx/hal_lld.c b/os/hal/platforms/STM32L1xx/hal_lld.c
index 96b18a656..aecff7be1 100644
--- a/os/hal/platforms/STM32L1xx/hal_lld.c
+++ b/os/hal/platforms/STM32L1xx/hal_lld.c
@@ -29,8 +29,6 @@
 #include "ch.h"

 #include "hal.h"

 

-#define AIRCR_VECTKEY           0x05FA0000

-

 /*===========================================================================*/

 /* Driver exported variables.                                                */

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32L1xx/stm32_dma.c b/os/hal/platforms/STM32L1xx/stm32_dma.c
index e49c419d9..851efb8b5 100644
--- a/os/hal/platforms/STM32L1xx/stm32_dma.c
+++ b/os/hal/platforms/STM32L1xx/stm32_dma.c
@@ -307,7 +307,7 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
 

   /* Enables the associated IRQ vector if a callback is defined.*/

   if (func != NULL)

-    NVICEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

+    nvicEnableVector(dmastp->vector, CORTEX_PRIORITY_MASK(priority));

 

   return FALSE;

 }

@@ -334,7 +334,7 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
               "dmaRelease(), #1", "not allocated");

 

   /* Disables the associated IRQ vector.*/

-  NVICDisableVector(dmastp->vector);

+  nvicDisableVector(dmastp->vector);

 

   /* Marks the stream as not allocated.*/

   dma_streams_mask &= ~(1 << dmastp->selfindex);