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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-06-19 16:47:09 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-06-19 16:47:09 +0000 |
commit | de6bbbb9eff7592723d401c6340b9e4c78b24953 (patch) | |
tree | 7769b2a519686c3a817fbaa7658d7fbfd2f6e637 /os/hal/platforms/STM32F4xx | |
parent | cbfc9a5396c2924d6b8fa3c03e4ea8bbda386a15 (diff) | |
download | ChibiOS-de6bbbb9eff7592723d401c6340b9e4c78b24953.tar.gz ChibiOS-de6bbbb9eff7592723d401c6340b9e4c78b24953.tar.bz2 ChibiOS-de6bbbb9eff7592723d401c6340b9e4c78b24953.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4307 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F4xx')
-rw-r--r-- | os/hal/platforms/STM32F4xx/hal_lld.h | 1 | ||||
-rw-r--r-- | os/hal/platforms/STM32F4xx/platform.mk | 1 | ||||
-rw-r--r-- | os/hal/platforms/STM32F4xx/stm32_rcc.h | 58 |
3 files changed, 58 insertions, 2 deletions
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h index 8c5303350..a755f5aa5 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.h +++ b/os/hal/platforms/STM32F4xx/hal_lld.h @@ -286,6 +286,7 @@ /* CAN attributes.*/
#define STM32_HAS_CAN1 TRUE
#define STM32_HAS_CAN2 TRUE
+#define STM32_CAN_MAX_FILTERS 28
/* DAC attributes.*/
#define STM32_HAS_DAC TRUE
diff --git a/os/hal/platforms/STM32F4xx/platform.mk b/os/hal/platforms/STM32F4xx/platform.mk index 5194488b8..5422ab5e6 100644 --- a/os/hal/platforms/STM32F4xx/platform.mk +++ b/os/hal/platforms/STM32F4xx/platform.mk @@ -2,6 +2,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F4xx/stm32_dma.c \
${CHIBIOS}/os/hal/platforms/STM32F4xx/hal_lld.c \
${CHIBIOS}/os/hal/platforms/STM32F4xx/adc_lld.c \
+ ${CHIBIOS}/os/hal/platforms/STM32/can_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/ext_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/i2c_lld.c \
diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h index 9ccb4a960..367318e04 100644 --- a/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -396,7 +396,6 @@ */
/**
* @brief Enables the PWR interface clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -406,7 +405,6 @@ /**
* @brief Disables PWR interface clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -422,6 +420,62 @@ #define rccResetPWRInterface() rccResetAPB1(RCC_APB1RSTR_PWRRST)
/** @} */
+
+/**
+ * @name CAN peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief Enables the CAN1 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableCAN1(lp) rccEnableAPB1(RCC_APB1ENR_CAN1EN, lp)
+
+/**
+ * @brief Disables the CAN1 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp)
+
+/**
+ * @brief Resets the CAN1 peripheral.
+ *
+ * @api
+ */
+#define rccResetCAN1() rccResetAPB1(RCC_APB1RSTR_CAN1RST)
+
+/**
+ * @brief Enables the CAN2 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableCAN2(lp) rccEnableAPB1(RCC_APB1ENR_CAN2EN, lp)
+
+/**
+ * @brief Disables the CAN2 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableCAN2(lp) rccDisableAPB1(RCC_APB1ENR_CAN2EN, lp)
+
+/**
+ * @brief Resets the CAN2 peripheral.
+ *
+ * @api
+ */
+#define rccResetCAN2() rccResetAPB1(RCC_APB1RSTR_CAN2RST)
+/** @} */
+
/**
* @name ETH peripheral specific RCC operations
* @{
|