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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-07 11:52:13 +0000 |
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| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-07 11:52:13 +0000 |
| commit | 10e2b91f3ecf6f85f8f4806bd99507e985c01cfe (patch) | |
| tree | 9cbe5bf915196f41ea4da44aa194dca3a275bac2 /os/hal/platforms/STM32F3xx/hal_lld.h | |
| parent | d3eb66ffd31e7bad8689b88a77c5d0f489b85e37 (diff) | |
| download | ChibiOS-10e2b91f3ecf6f85f8f4806bd99507e985c01cfe.tar.gz ChibiOS-10e2b91f3ecf6f85f8f4806bd99507e985c01cfe.tar.bz2 ChibiOS-10e2b91f3ecf6f85f8f4806bd99507e985c01cfe.zip | |
GPT, ICU, PWM tested on STM32F3xx.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4882 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F3xx/hal_lld.h')
| -rw-r--r-- | os/hal/platforms/STM32F3xx/hal_lld.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/os/hal/platforms/STM32F3xx/hal_lld.h b/os/hal/platforms/STM32F3xx/hal_lld.h index 348bba45c..270664abd 100644 --- a/os/hal/platforms/STM32F3xx/hal_lld.h +++ b/os/hal/platforms/STM32F3xx/hal_lld.h @@ -170,11 +170,11 @@ #define STM32_PPRE1_DIV8 (6 << 8) /**< HCLK divided by 8. */
#define STM32_PPRE1_DIV16 (7 << 8) /**< HCLK divided by 16. */
-#define STM32_PPRE2_DIV1 (0 << 8) /**< HCLK divided by 1. */
-#define STM32_PPRE2_DIV2 (4 << 8) /**< HCLK divided by 2. */
-#define STM32_PPRE2_DIV4 (5 << 8) /**< HCLK divided by 4. */
-#define STM32_PPRE2_DIV8 (6 << 8) /**< HCLK divided by 8. */
-#define STM32_PPRE2_DIV16 (7 << 8) /**< HCLK divided by 16. */
+#define STM32_PPRE2_DIV1 (0 << 11) /**< HCLK divided by 1. */
+#define STM32_PPRE2_DIV2 (4 << 11) /**< HCLK divided by 2. */
+#define STM32_PPRE2_DIV4 (5 << 11) /**< HCLK divided by 4. */
+#define STM32_PPRE2_DIV8 (6 << 11) /**< HCLK divided by 8. */
+#define STM32_PPRE2_DIV16 (7 << 11) /**< HCLK divided by 16. */
#define STM32_PLLSRC_HSI (0 << 16) /**< PLL clock source is HSI/2. */
#define STM32_PLLSRC_HSE (1 << 16) /**< PLL clock source is
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