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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-03-08 10:09:57 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-03-08 10:09:57 +0000
commit18fb8f676f0f650d83f69bc29ab45b04b73e86c1 (patch)
tree5a5668b39a5ddec4981f6dd2d5815d1e706c8471 /os/hal/platforms/STM32/uart_lld.h
parentc3cb79bec35415a930dd017f7c389c57784377ab (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2808 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/uart_lld.h')
-rw-r--r--os/hal/platforms/STM32/uart_lld.h50
1 files changed, 25 insertions, 25 deletions
diff --git a/os/hal/platforms/STM32/uart_lld.h b/os/hal/platforms/STM32/uart_lld.h
index f09fe7cd4..8394d8421 100644
--- a/os/hal/platforms/STM32/uart_lld.h
+++ b/os/hal/platforms/STM32/uart_lld.h
@@ -117,8 +117,8 @@
/**
* @brief USART1 DMA error hook.
- * @note The default action for DMA errors is a system halt because DMA error
- * can only happen because programming errors.
+ * @note The default action for DMA errors is a system halt because DMA
+ * error can only happen because programming errors.
*/
#if !defined(STM32_UART_USART1_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt()
@@ -126,8 +126,8 @@
/**
* @brief USART2 DMA error hook.
- * @note The default action for DMA errors is a system halt because DMA error
- * can only happen because programming errors.
+ * @note The default action for DMA errors is a system halt because DMA
+ * error can only happen because programming errors.
*/
#if !defined(STM32_UART_USART2_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt()
@@ -135,8 +135,8 @@
/**
* @brief USART3 DMA error hook.
- * @note The default action for DMA errors is a system halt because DMA error
- * can only happen because programming errors.
+ * @note The default action for DMA errors is a system halt because DMA
+ * error can only happen because programming errors.
*/
#if !defined(STM32_UART_USART3_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt()
@@ -208,40 +208,40 @@ typedef struct {
/**
* @brief End of transmission buffer callback.
*/
- uartcb_t uc_txend1;
+ uartcb_t txend1_cb;
/**
* @brief Physical end of transmission callback.
*/
- uartcb_t uc_txend2;
+ uartcb_t txend2_cb;
/**
* @brief Receive buffer filled callback.
*/
- uartcb_t uc_rxend;
+ uartcb_t rxend_cb;
/**
* @brief Character received while out if the @p UART_RECEIVE state.
*/
- uartccb_t uc_rxchar;
+ uartccb_t rxchar_cb;
/**
* @brief Receive error callback.
*/
- uartecb_t uc_rxerr;
+ uartecb_t rxerr_cb;
/* End of the mandatory fields.*/
/**
* @brief Bit rate.
*/
- uint32_t uc_speed;
+ uint32_t speed;
/**
* @brief Initialization value for the CR1 register.
*/
- uint16_t uc_cr1;
+ uint16_t cr1;
/**
* @brief Initialization value for the CR2 register.
*/
- uint16_t uc_cr2;
+ uint16_t cr2;
/**
* @brief Initialization value for the CR3 register.
*/
- uint16_t uc_cr3;
+ uint16_t cr3;
} UARTConfig;
/**
@@ -251,19 +251,19 @@ struct UARTDriver {
/**
* @brief Driver state.
*/
- uartstate_t ud_state;
+ uartstate_t state;
/**
* @brief Transmitter state.
*/
- uarttxstate_t ud_txstate;
+ uarttxstate_t txstate;
/**
* @brief Receiver state.
*/
- uartrxstate_t ud_rxstate;
+ uartrxstate_t rxstate;
/**
* @brief Current configuration data.
*/
- const UARTConfig *ud_config;
+ const UARTConfig *config;
#if defined(UART_DRIVER_EXT_FIELDS)
UART_DRIVER_EXT_FIELDS
#endif
@@ -271,27 +271,27 @@ struct UARTDriver {
/**
* @brief Pointer to the USART registers block.
*/
- USART_TypeDef *ud_usart;
+ USART_TypeDef *usart;
/**
* @brief Pointer to the DMA registers block.
*/
- stm32_dma_t *ud_dmap;
+ stm32_dma_t *dmap;
/**
* @brief DMA priority bit mask.
*/
- uint32_t ud_dmaccr;
+ uint32_t dmaccr;
/**
* @brief Receive DMA channel.
*/
- uint8_t ud_dmarx;
+ uint8_t dmarx;
/**
* @brief Transmit DMA channel.
*/
- uint8_t ud_dmatx;
+ uint8_t dmatx;
/**
* @brief Default receive buffer while into @p UART_RX_IDLE state.
*/
- volatile uint16_t ud_rxbuf;
+ volatile uint16_t rxbuf;
};
/*===========================================================================*/