diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-07-31 08:06:30 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-07-31 08:06:30 +0000 |
| commit | 28acd9ec851f318a3198b60eb5bf76f46e05adbf (patch) | |
| tree | 2d9935c604629acbf3273613508fbc5b039e7a6d /os/hal/platforms/STM32/uart_lld.c | |
| parent | 81cf25559579542b88eb1e3ba145cd27ebb44c2a (diff) | |
| download | ChibiOS-28acd9ec851f318a3198b60eb5bf76f46e05adbf.tar.gz ChibiOS-28acd9ec851f318a3198b60eb5bf76f46e05adbf.tar.bz2 ChibiOS-28acd9ec851f318a3198b60eb5bf76f46e05adbf.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2102 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/uart_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/uart_lld.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c index 88dd7d8a3..e585eed6a 100644 --- a/os/hal/platforms/STM32/uart_lld.c +++ b/os/hal/platforms/STM32/uart_lld.c @@ -249,6 +249,9 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) { CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF4) != 0) {
+ STM32_UART_USART1_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_4);
uartp = &UARTD1;
if (uartp->ud_rxstate == UART_RX_IDLE) {
@@ -275,6 +278,9 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) { CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF5) != 0) {
+ STM32_UART_USART1_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_5);
dmaDisableChannel(STM32_DMA1, STM32_DMA_CHANNEL_5);
serve_tx_end_irq(&UARTD1);
@@ -304,6 +310,9 @@ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) { CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF6) != 0) {
+ STM32_UART_USART2_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_6);
uartp = &UARTD2;
if (uartp->ud_rxstate == UART_RX_IDLE) {
@@ -330,6 +339,9 @@ CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) { CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF7) != 0) {
+ STM32_UART_USART2_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_7);
dmaDisableChannel(STM32_DMA1, STM32_DMA_CHANNEL_7);
serve_tx_end_irq(&UARTD2);
|