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-rw-r--r--os/hal/platforms/STM32/uart_lld.c12
-rw-r--r--os/hal/platforms/STM32/uart_lld.h26
-rw-r--r--testhal/STM32/UART/mcuconf.h9
3 files changed, 46 insertions, 1 deletions
diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c
index 88dd7d8a3..e585eed6a 100644
--- a/os/hal/platforms/STM32/uart_lld.c
+++ b/os/hal/platforms/STM32/uart_lld.c
@@ -249,6 +249,9 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF4) != 0) {
+ STM32_UART_USART1_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_4);
uartp = &UARTD1;
if (uartp->ud_rxstate == UART_RX_IDLE) {
@@ -275,6 +278,9 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF5) != 0) {
+ STM32_UART_USART1_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_5);
dmaDisableChannel(STM32_DMA1, STM32_DMA_CHANNEL_5);
serve_tx_end_irq(&UARTD1);
@@ -304,6 +310,9 @@ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) {
CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF6) != 0) {
+ STM32_UART_USART2_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_6);
uartp = &UARTD2;
if (uartp->ud_rxstate == UART_RX_IDLE) {
@@ -330,6 +339,9 @@ CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) {
CH_IRQ_PROLOGUE();
+ if ((STM32_DMA1->ISR & DMA_ISR_TEIF7) != 0) {
+ STM32_UART_USART2_DMA_ERROR_HOOK();
+ }
dmaClearChannel(STM32_DMA1, STM32_DMA_CHANNEL_7);
dmaDisableChannel(STM32_DMA1, STM32_DMA_CHANNEL_7);
serve_tx_end_irq(&UARTD2);
diff --git a/os/hal/platforms/STM32/uart_lld.h b/os/hal/platforms/STM32/uart_lld.h
index d1033050e..1e294e212 100644
--- a/os/hal/platforms/STM32/uart_lld.h
+++ b/os/hal/platforms/STM32/uart_lld.h
@@ -115,6 +115,32 @@
#define STM32_UART_USART3_DMA_PRIORITY 0
#endif
+/**
+ * @brief USART1 DMA error hook.
+ * @note The default action for DMA errors is a system halt because DMA error
+ * can only happen because programming errors.
+ */
+#if !defined(STM32_UART_USART1_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
+#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt()
+#endif
+
+/**
+ * @brief USART2 DMA error hook.
+ * @note The default action for DMA errors is a system halt because DMA error
+ * can only happen because programming errors.
+ */
+#if !defined(STM32_UART_USART2_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
+#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt()
+#endif
+
+/**
+ * @brief USART3 DMA error hook.
+ * @note The default action for DMA errors is a system halt because DMA error
+ * can only happen because programming errors.
+ */
+#if !defined(STM32_UART_USART3_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
+#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt()
+#endif
/*===========================================================================*/
/* Derived constants and error checks. */
diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h
index 2b5bd9aa7..98ffc6e5a 100644
--- a/testhal/STM32/UART/mcuconf.h
+++ b/testhal/STM32/UART/mcuconf.h
@@ -93,11 +93,16 @@
*/
#define USE_STM32_SPI1 TRUE
#define USE_STM32_SPI2 TRUE
+#define USE_STM32_SPI3 TRUE
#define STM32_SPI1_DMA_PRIORITY 2
#define STM32_SPI2_DMA_PRIORITY 2
+#define STM32_SPI3_DMA_PRIORITY 2
#define STM32_SPI1_IRQ_PRIORITY 10
#define STM32_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI3_IRQ_PRIORITY 10
#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt()
/*
* UART driver system settings.
@@ -111,4 +116,6 @@
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
-#define STM32_UART_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt()