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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-01-23 18:32:02 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-01-23 18:32:02 +0000 |
| commit | edc56330a91f1f646d8b78ead8a89c46a5d841e6 (patch) | |
| tree | b41391451de8eae9eb9d659cfe512b2ddefc7a3c /os/hal/platforms/STM32/serial_lld.h | |
| parent | 461b44091f45dd6fded72222f08ba2fd652cffd3 (diff) | |
| download | ChibiOS-edc56330a91f1f646d8b78ead8a89c46a5d841e6.tar.gz ChibiOS-edc56330a91f1f646d8b78ead8a89c46a5d841e6.tar.bz2 ChibiOS-edc56330a91f1f646d8b78ead8a89c46a5d841e6.zip | |
Merged Egon's patch.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1542 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/serial_lld.h')
| -rw-r--r-- | os/hal/platforms/STM32/serial_lld.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/serial_lld.h b/os/hal/platforms/STM32/serial_lld.h index e215dcef9..47d7b8650 100644 --- a/os/hal/platforms/STM32/serial_lld.h +++ b/os/hal/platforms/STM32/serial_lld.h @@ -64,6 +64,27 @@ #define USE_STM32_USART3 TRUE
#endif
+
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
+/**
+ * @brief UART4 driver enable switch.
+ * @details If set to @p TRUE the support for UART4 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(USE_STM32_UART4) || defined(__DOXYGEN__)
+#define USE_STM32_UART4 TRUE
+#endif
+
+/**
+ * @brief UART5 driver enable switch.
+ * @details If set to @p TRUE the support for UART5 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(USE_STM32_USART3) || defined(__DOXYGEN__)
+#define USE_STM32_UART5 TRUE
+#endif
+#endif
+
/**
* @brief USART1 interrupt priority level setting.
* @note @p BASEPRI_KERNEL >= @p STM32_USART1_PRIORITY > @p PRIORITY_PENDSV.
@@ -88,6 +109,23 @@ #define STM32_USART3_PRIORITY 0xC0
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
+/**
+ * @brief UART4 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_UART4_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_UART4_PRIORITY 0xC0
+#endif
+
+/**
+ * @brief UART5 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_UART5_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_UART5_PRIORITY 0xC0
+#endif
+#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -180,6 +218,14 @@ extern SerialDriver SD2; #if USE_STM32_USART3
extern SerialDriver SD3;
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#if USE_STM32_UART4
+extern SerialDriver SD4;
+#endif
+#if USE_STM32_UART5
+extern SerialDriver SD5;
+#endif
+#endif
#ifdef __cplusplus
extern "C" {
|