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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-01-23 18:32:02 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-01-23 18:32:02 +0000
commitedc56330a91f1f646d8b78ead8a89c46a5d841e6 (patch)
treeb41391451de8eae9eb9d659cfe512b2ddefc7a3c
parent461b44091f45dd6fded72222f08ba2fd652cffd3 (diff)
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Merged Egon's patch.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1542 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h8
-rw-r--r--demos/ARMCM3-STM32F103-GCC/mcuconf.h8
-rw-r--r--os/hal/platforms/STM32/serial_lld.c94
-rw-r--r--os/hal/platforms/STM32/serial_lld.h46
-rw-r--r--readme.txt2
5 files changed, 158 insertions, 0 deletions
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h b/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h
index 568dffb11..988e6b79d 100644
--- a/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h
+++ b/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h
@@ -66,9 +66,17 @@
#define USE_STM32_USART1 FALSE
#define USE_STM32_USART2 TRUE
#define USE_STM32_USART3 FALSE
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define USE_STM32_UART4 FALSE
+#define USE_STM32_UART5 FALSE
+#endif
#define STM32_USART1_PRIORITY 0xC0
#define STM32_USART2_PRIORITY 0xC0
#define STM32_USART3_PRIORITY 0xC0
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define STM32_UART4_PRIORITY 0xC0
+#define STM32_UART5_PRIORITY 0xC0
+#endif
/*
* SPI driver system settings.
diff --git a/demos/ARMCM3-STM32F103-GCC/mcuconf.h b/demos/ARMCM3-STM32F103-GCC/mcuconf.h
index 568dffb11..988e6b79d 100644
--- a/demos/ARMCM3-STM32F103-GCC/mcuconf.h
+++ b/demos/ARMCM3-STM32F103-GCC/mcuconf.h
@@ -66,9 +66,17 @@
#define USE_STM32_USART1 FALSE
#define USE_STM32_USART2 TRUE
#define USE_STM32_USART3 FALSE
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define USE_STM32_UART4 FALSE
+#define USE_STM32_UART5 FALSE
+#endif
#define STM32_USART1_PRIORITY 0xC0
#define STM32_USART2_PRIORITY 0xC0
#define STM32_USART3_PRIORITY 0xC0
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define STM32_UART4_PRIORITY 0xC0
+#define STM32_UART5_PRIORITY 0xC0
+#endif
/*
* SPI driver system settings.
diff --git a/os/hal/platforms/STM32/serial_lld.c b/os/hal/platforms/STM32/serial_lld.c
index 8077aa3f3..92ee6609e 100644
--- a/os/hal/platforms/STM32/serial_lld.c
+++ b/os/hal/platforms/STM32/serial_lld.c
@@ -48,6 +48,18 @@ SerialDriver SD2;
SerialDriver SD3;
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
+/** @brief UART4 serial driver identifier.*/
+#if USE_STM32_UART4 || defined(__DOXYGEN__)
+SerialDriver SD4;
+#endif
+
+/** @brief UART5 serial driver identifier.*/
+#if USE_STM32_UART5 || defined(__DOXYGEN__)
+SerialDriver SD5;
+#endif
+#endif
+
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
@@ -187,6 +199,22 @@ static void notify3(void) {
}
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
+#if USE_STM32_UART4 || defined(__DOXYGEN__)
+static void notify4(void) {
+
+ UART4->CR1 |= USART_CR1_TXEIE;
+}
+#endif
+
+#if USE_STM32_UART5 || defined(__DOXYGEN__)
+static void notify5(void) {
+
+ UART5->CR1 |= USART_CR1_TXEIE;
+}
+#endif
+#endif
+
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
@@ -224,6 +252,30 @@ CH_IRQ_HANDLER(VectorDC) {
}
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
+#if USE_STM32_UART4 || defined(__DOXYGEN__)
+CH_IRQ_HANDLER(Vector110) {
+
+ CH_IRQ_PROLOGUE();
+
+ serve_interrupt(&SD4);
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if USE_STM32_UART5 || defined(__DOXYGEN__)
+CH_IRQ_HANDLER(Vector114) {
+
+ CH_IRQ_PROLOGUE();
+
+ serve_interrupt(&SD5);
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+#endif
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -247,6 +299,18 @@ void sd_lld_init(void) {
sdObjectInit(&SD3, NULL, notify3);
SD3.usart = USART3;
#endif
+
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#if USE_STM32_UART4
+ sdObjectInit(&SD4, NULL, notify4);
+ SD4.usart = UART4;
+#endif
+
+#if USE_STM32_UART5
+ sdObjectInit(&SD5, NULL, notify5);
+ SD5.usart = UART5;
+#endif
+#endif
}
/**
@@ -278,6 +342,20 @@ void sd_lld_start(SerialDriver *sdp) {
NVICEnableVector(USART3_IRQn, STM32_USART3_PRIORITY);
}
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#if USE_STM32_UART4
+ if (&SD4 == sdp) {
+ RCC->APB1ENR |= RCC_APB1ENR_UART4EN;
+ NVICEnableVector(UART4_IRQn, STM32_UART4_PRIORITY);
+ }
+#endif
+#if USE_STM32_UART5
+ if (&SD5 == sdp) {
+ RCC->APB1ENR |= RCC_APB1ENR_UART5EN;
+ NVICEnableVector(UART5_IRQn, STM32_UART5_PRIORITY);
+ }
+#endif
+#endif
}
usart_init(sdp);
}
@@ -314,6 +392,22 @@ void sd_lld_stop(SerialDriver *sdp) {
return;
}
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#if USE_STM32_UART4
+ if (&SD4 == sdp) {
+ RCC->APB1ENR &= ~RCC_APB1ENR_UART4EN;
+ NVICDisableVector(UART4_IRQn);
+ return;
+ }
+#endif
+#if USE_STM32_UART5
+ if (&SD5 == sdp) {
+ RCC->APB1ENR &= ~RCC_APB1ENR_UART5EN;
+ NVICDisableVector(UART5_IRQn);
+ return;
+ }
+#endif
+#endif
}
}
diff --git a/os/hal/platforms/STM32/serial_lld.h b/os/hal/platforms/STM32/serial_lld.h
index e215dcef9..47d7b8650 100644
--- a/os/hal/platforms/STM32/serial_lld.h
+++ b/os/hal/platforms/STM32/serial_lld.h
@@ -64,6 +64,27 @@
#define USE_STM32_USART3 TRUE
#endif
+
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
+/**
+ * @brief UART4 driver enable switch.
+ * @details If set to @p TRUE the support for UART4 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(USE_STM32_UART4) || defined(__DOXYGEN__)
+#define USE_STM32_UART4 TRUE
+#endif
+
+/**
+ * @brief UART5 driver enable switch.
+ * @details If set to @p TRUE the support for UART5 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(USE_STM32_USART3) || defined(__DOXYGEN__)
+#define USE_STM32_UART5 TRUE
+#endif
+#endif
+
/**
* @brief USART1 interrupt priority level setting.
* @note @p BASEPRI_KERNEL >= @p STM32_USART1_PRIORITY > @p PRIORITY_PENDSV.
@@ -88,6 +109,23 @@
#define STM32_USART3_PRIORITY 0xC0
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
+/**
+ * @brief UART4 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_UART4_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_UART4_PRIORITY 0xC0
+#endif
+
+/**
+ * @brief UART5 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_UART5_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_UART5_PRIORITY 0xC0
+#endif
+#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -180,6 +218,14 @@ extern SerialDriver SD2;
#if USE_STM32_USART3
extern SerialDriver SD3;
#endif
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#if USE_STM32_UART4
+extern SerialDriver SD4;
+#endif
+#if USE_STM32_UART5
+extern SerialDriver SD5;
+#endif
+#endif
#ifdef __cplusplus
extern "C" {
diff --git a/readme.txt b/readme.txt
index 8349fbb5e..c14a41c69 100644
--- a/readme.txt
+++ b/readme.txt
@@ -64,6 +64,8 @@
- OPT: Speed/size optimization to the mutexes subsystem.
- OPT: Speed/size optimization to the condvars subsystem.
- OPT: Speed/size optimization to the synchronous messages subsystem.
+- NEW: Added support for STM32/HD/CL UART4 and UART5, thanks Egon for the
+ patch.
*** 1.3.8 ***
- FIX: Fixed dequeuing in lifo_remove() function (bug 2928142).