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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-04-01 13:06:44 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-04-01 13:06:44 +0000 |
| commit | d8420eb83a4b843ad23d0fbe77fea36272adc525 (patch) | |
| tree | 6f3b4576c53b3105a2bf800360c96212c8d476ac /os/hal/platforms/STM32/pwm_lld.h | |
| parent | 875a7d8f4151039f4c47b05c0d4f196575b8d109 (diff) | |
| download | ChibiOS-d8420eb83a4b843ad23d0fbe77fea36272adc525.tar.gz ChibiOS-d8420eb83a4b843ad23d0fbe77fea36272adc525.tar.bz2 ChibiOS-d8420eb83a4b843ad23d0fbe77fea36272adc525.zip | |
Added advanced mode and BTRD handling to the STM32 PWM driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2861 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/pwm_lld.h')
| -rw-r--r-- | os/hal/platforms/STM32/pwm_lld.h | 83 |
1 files changed, 73 insertions, 10 deletions
diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index d8e1754c9..e36b6f1f6 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -38,13 +38,69 @@ /**
* @brief Number of PWM channels per PWM driver.
*/
-#define PWM_CHANNELS 4
+#define PWM_CHANNELS 4
+
+/**
+ * @brief Standard output modes mask.
+ */
+#define PWM_OUTPUT_MASK 0x07
+
+/**
+ * @brief Output not driven, callback only.
+ */
+#define PWM_OUTPUT_DISABLED 0x00
+
+/**
+ * @brief Positive PWM logic, active is logic level one.
+ */
+#define PWM_OUTPUT_ACTIVE_HIGH 0x01
+
+/**
+ * @brief Inverse PWM logic, active is logic level zero.
+ */
+#define PWM_OUTPUT_ACTIVE_LOW 0x02
+
+/**
+ * @brief Complementary output modes mask.
+ */
+#define PWM_COMPLEMENTARY_OUTPUT_MASK 0x70
+
+/**
+ * @brief Complementary output not driven.
+ */
+#define PWM_COMPLEMENTARY_OUTPUT_DISABLED 0x00
+
+/**
+ * @brief Complementary output, active is logic level one.
+ * @note This setting is only available if the configuration option
+ * @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced
+ * timers TIM1 and TIM8.
+ */
+#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH 0x10
+
+/**
+ * @brief Complementary output, active is logic level zero.
+ * @note This setting is only available if the configuration option
+ * @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced
+ * timers TIM1 and TIM8.
+ */
+#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW 0x20
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
+ * @brief If advanced timer features switch.
+ * @details If set to @p TRUE the advanced features for TIM1 and TIM8 are
+ * enabled.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_PWM_USE_ADVANCED) || defined(__DOXYGEN__)
+#define STM32_PWM_USE_ADVANCED TRUE
+#endif
+
+/**
* @brief PWMD1 driver enable switch.
* @details If set to @p TRUE the support for PWMD1 is included.
* @note The default is @p TRUE.
@@ -154,11 +210,20 @@ #error "PWM driver activated but no TIM peripheral assigned"
#endif
+#if STM32_PWM_USE_ADVANCED && !STM32_PWM_USE_TIM1
+#error "advanced mode selected but no advanced timer assigned"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
+ * @brief PWM mode type.
+ */
+typedef uint32_t pwmmode_t;
+
+/**
* @brief PWM channel type.
*/
typedef uint8_t pwmchannel_t;
@@ -169,15 +234,6 @@ typedef uint8_t pwmchannel_t; typedef uint16_t pwmcnt_t;
/**
- * @brief PWM logic mode.
- */
-typedef enum {
- PWM_OUTPUT_DISABLED = 0, /**< Output not driven, callback only. */
- PWM_OUTPUT_ACTIVE_HIGH = 1, /**< Idle is logic level 0. */
- PWM_OUTPUT_ACTIVE_LOW = 2 /**< Idle is logic level 1. */
-} pwmmode_t;
-
-/**
* @brief PWM driver channel configuration structure.
*/
typedef struct {
@@ -226,6 +282,13 @@ typedef struct { * @note The value of this field should normally be equal to zero.
*/
uint16_t cr2;
+#if STM32_PWM_USE_ADVANCED || defined(__DOXYGEN__)
+ /**
+ * @brief TIM BDTR (break & dead-time) register initialization data.
+ * @note The value of this field should normally be equal to zero.
+ */ \
+ uint16_t bdtr;
+#endif
} PWMConfig;
/**
|