Added advanced mode and BTRD handling to the STM32 PWM driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2861 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 111 insertions, 14 deletions

diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index 6b05b66aa..2f125b345 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -394,7 +394,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
 

   /* Output enables and polarities setup.*/

   ccer = 0;

-  switch (pwmp->config->channels[0].mode) {

+  switch (pwmp->config->channels[0].mode & PWM_OUTPUT_MASK) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC1P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -402,7 +402,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

-  switch (pwmp->config->channels[1].mode) {

+  switch (pwmp->config->channels[1].mode & PWM_OUTPUT_MASK) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC2P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -410,7 +410,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

-  switch (pwmp->config->channels[2].mode) {

+  switch (pwmp->config->channels[2].mode & PWM_OUTPUT_MASK) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC3P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -418,7 +418,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

-  switch (pwmp->config->channels[3].mode) {

+  switch (pwmp->config->channels[3].mode & PWM_OUTPUT_MASK) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC4P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -426,11 +426,44 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

+#if STM32_PWM_USE_ADVANCED

+  if (&PWMD1 == pwmp) {

+    switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {

+    case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:

+      ccer |= TIM_CCER_CC1NP;

+    case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:

+      ccer |= TIM_CCER_CC1NE;

+    default:

+      ;

+    }

+    switch (pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {

+    case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:

+      ccer |= TIM_CCER_CC2NP;

+    case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:

+      ccer |= TIM_CCER_CC2NE;

+    default:

+      ;

+    }

+    switch (pwmp->config->channels[2].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {

+    case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:

+      ccer |= TIM_CCER_CC3NP;

+    case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:

+      ccer |= TIM_CCER_CC3NE;

+    default:

+      ;

+    }

+  }

+#endif /* STM32_PWM_USE_ADVANCED*/

+

   pwmp->tim->CCER = ccer;

   pwmp->tim->EGR  = TIM_EGR_UG;             /* Update event.                */

   pwmp->tim->SR   = 0;                      /* Clear pending IRQs.          */

   pwmp->tim->DIER = pwmp->config->callback == NULL ? 0 : TIM_DIER_UIE;

+#if STM32_PWM_USE_ADVANCED

+  pwmp->tim->BDTR = pwmp->config->bdtr | TIM_BDTR_MOE;

+#else

   pwmp->tim->BDTR = TIM_BDTR_MOE;

+#endif

   /* Timer configured and started.*/

   pwmp->tim->CR1  = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN;

 }

@@ -450,6 +483,7 @@ void pwm_lld_stop(PWMDriver *pwmp) {
     pwmp->tim->CR1  = 0;                    /* Timer disabled.              */

     pwmp->tim->DIER = 0;                    /* All IRQs disabled.           */

     pwmp->tim->SR   = 0;                    /* Clear eventual pending IRQs. */

+    pwmp->tim->BDTR  = 0;

 

 #if STM32_PWM_USE_TIM1

     if (&PWMD1 == pwmp) {

diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h
index d8e1754c9..e36b6f1f6 100644
--- a/os/hal/platforms/STM32/pwm_lld.h
+++ b/os/hal/platforms/STM32/pwm_lld.h
@@ -38,13 +38,69 @@
 /**

  * @brief   Number of PWM channels per PWM driver.

  */

-#define PWM_CHANNELS                        4

+#define PWM_CHANNELS                            4

+

+/**

+ * @brief   Standard output modes mask.

+ */

+#define PWM_OUTPUT_MASK                         0x07

+

+/**

+ * @brief   Output not driven, callback only.

+ */

+#define PWM_OUTPUT_DISABLED                     0x00

+

+/**

+ * @brief   Positive PWM logic, active is logic level one.

+ */

+#define PWM_OUTPUT_ACTIVE_HIGH                  0x01

+

+/**

+ * @brief   Inverse PWM logic, active is logic level zero.

+ */

+#define PWM_OUTPUT_ACTIVE_LOW                   0x02

+

+/**

+ * @brief   Complementary output modes mask.

+ */

+#define PWM_COMPLEMENTARY_OUTPUT_MASK           0x70

+

+/**

+ * @brief   Complementary output not driven.

+ */

+#define PWM_COMPLEMENTARY_OUTPUT_DISABLED       0x00

+

+/**

+ * @brief   Complementary output, active is logic level one.

+ * @note    This setting is only available if the configuration option

+ *          @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced

+ *          timers TIM1 and TIM8.

+ */

+#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH    0x10

+

+/**

+ * @brief   Complementary output, active is logic level zero.

+ * @note    This setting is only available if the configuration option

+ *          @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced

+ *          timers TIM1 and TIM8.

+ */

+#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW     0x20

 

 /*===========================================================================*/

 /* Driver pre-compile time settings.                                         */

 /*===========================================================================*/

 

 /**

+ * @brief   If advanced timer features switch.

+ * @details If set to @p TRUE the advanced features for TIM1 and TIM8 are

+ *          enabled.

+ * @note    The default is @p TRUE.

+ */

+#if !defined(STM32_PWM_USE_ADVANCED) || defined(__DOXYGEN__)

+#define STM32_PWM_USE_ADVANCED              TRUE

+#endif

+

+/**

  * @brief   PWMD1 driver enable switch.

  * @details If set to @p TRUE the support for PWMD1 is included.

  * @note    The default is @p TRUE.

@@ -154,11 +210,20 @@
 #error "PWM driver activated but no TIM peripheral assigned"

 #endif

 

+#if STM32_PWM_USE_ADVANCED && !STM32_PWM_USE_TIM1

+#error "advanced mode selected but no advanced timer assigned"

+#endif

+

 /*===========================================================================*/

 /* Driver data structures and types.                                         */

 /*===========================================================================*/

 

 /**

+ * @brief PWM mode type.

+ */

+typedef uint32_t pwmmode_t;

+

+/**

  * @brief   PWM channel type.

  */

 typedef uint8_t pwmchannel_t;

@@ -169,15 +234,6 @@ typedef uint8_t pwmchannel_t;
 typedef uint16_t pwmcnt_t;

 

 /**

- * @brief PWM logic mode.

- */

-typedef enum {

-  PWM_OUTPUT_DISABLED = 0,          /**< Output not driven, callback only.  */

-  PWM_OUTPUT_ACTIVE_HIGH = 1,       /**< Idle is logic level 0.             */

-  PWM_OUTPUT_ACTIVE_LOW = 2         /**< Idle is logic level 1.             */

-} pwmmode_t;

-

-/**

  * @brief   PWM driver channel configuration structure.

  */

 typedef struct {

@@ -226,6 +282,13 @@ typedef struct {
    * @note  The value of this field should normally be equal to zero.

    */

   uint16_t                  cr2;

+#if STM32_PWM_USE_ADVANCED || defined(__DOXYGEN__)

+  /**

+   * @brief TIM BDTR (break & dead-time) register initialization data.

+   * @note  The value of this field should normally be equal to zero.

+   */                                                                     \

+  uint16_t                  bdtr;

+#endif

 } PWMConfig;

 

 /**