git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2808 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 70 insertions, 70 deletions

diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index a101b284a..6a5b210df 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -107,20 +107,20 @@ PWMDriver PWMD5;
 static void serve_interrupt(PWMDriver *pwmp) {

   uint16_t sr;

 

-  sr  = pwmp->pd_tim->SR;

-  sr &= pwmp->pd_tim->DIER;

-  pwmp->pd_tim->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF |

+  sr  = pwmp->tim->SR;

+  sr &= pwmp->tim->DIER;

+  pwmp->tim->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF |

                        TIM_SR_CC4IF | TIM_SR_UIF);

   if ((sr & TIM_SR_CC1IF) != 0)

-    pwmp->pd_config->pc_channels[0].pcc_callback(pwmp);

+    pwmp->config->channels[0].callback(pwmp);

   if ((sr & TIM_SR_CC2IF) != 0)

-    pwmp->pd_config->pc_channels[1].pcc_callback(pwmp);

+    pwmp->config->channels[1].callback(pwmp);

   if ((sr & TIM_SR_CC3IF) != 0)

-    pwmp->pd_config->pc_channels[2].pcc_callback(pwmp);

+    pwmp->config->channels[2].callback(pwmp);

   if ((sr & TIM_SR_CC4IF) != 0)

-    pwmp->pd_config->pc_channels[3].pcc_callback(pwmp);

+    pwmp->config->channels[3].callback(pwmp);

   if ((sr & TIM_SR_UIF) != 0)

-    pwmp->pd_config->pc_callback(pwmp);

+    pwmp->config->callback(pwmp);

 }

 #endif /* STM32_PWM_USE_TIM2 || ... || STM32_PWM_USE_TIM5 */

 

@@ -142,7 +142,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
   CH_IRQ_PROLOGUE();

 

   TIM1->SR = ~TIM_SR_UIF;

-  PWMD1.pd_config->pc_callback(&PWMD1);

+  PWMD1.config->callback(&PWMD1);

 

   CH_IRQ_EPILOGUE();

 }

@@ -163,13 +163,13 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
   sr = TIM1->SR & TIM1->DIER;

   TIM1->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF);

   if ((sr & TIM_SR_CC1IF) != 0)

-    PWMD1.pd_config->pc_channels[0].pcc_callback(&PWMD1);

+    PWMD1.config->channels[0].callback(&PWMD1);

   if ((sr & TIM_SR_CC2IF) != 0)

-    PWMD1.pd_config->pc_channels[1].pcc_callback(&PWMD1);

+    PWMD1.config->channels[1].callback(&PWMD1);

   if ((sr & TIM_SR_CC3IF) != 0)

-    PWMD1.pd_config->pc_channels[2].pcc_callback(&PWMD1);

+    PWMD1.config->channels[2].callback(&PWMD1);

   if ((sr & TIM_SR_CC4IF) != 0)

-    PWMD1.pd_config->pc_channels[3].pcc_callback(&PWMD1);

+    PWMD1.config->channels[3].callback(&PWMD1);

 

   CH_IRQ_EPILOGUE();

 }

@@ -253,36 +253,36 @@ void pwm_lld_init(void) {
 #if STM32_PWM_USE_TIM1

   /* Driver initialization.*/

   pwmObjectInit(&PWMD1);

-  PWMD1.pd_enabled_channels = 0;

-  PWMD1.pd_tim = TIM1;

+  PWMD1.enabled_channels = 0;

+  PWMD1.tim = TIM1;

 #endif

 

 #if STM32_PWM_USE_TIM2

   /* Driver initialization.*/

   pwmObjectInit(&PWMD2);

-  PWMD2.pd_enabled_channels = 0;

-  PWMD2.pd_tim = TIM2;

+  PWMD2.enabled_channels = 0;

+  PWMD2.tim = TIM2;

 #endif

 

 #if STM32_PWM_USE_TIM3

   /* Driver initialization.*/

   pwmObjectInit(&PWMD3);

-  PWMD3.pd_enabled_channels = 0;

-  PWMD3.pd_tim = TIM3;

+  PWMD3.enabled_channels = 0;

+  PWMD3.tim = TIM3;

 #endif

 

 #if STM32_PWM_USE_TIM4

   /* Driver initialization.*/

   pwmObjectInit(&PWMD4);

-  PWMD4.pd_enabled_channels = 0;

-  PWMD4.pd_tim = TIM4;

+  PWMD4.enabled_channels = 0;

+  PWMD4.tim = TIM4;

 #endif

 

 #if STM32_PWM_USE_TIM5

   /* Driver initialization.*/

   pwmObjectInit(&PWMD5);

-  PWMD5.pd_enabled_channels = 0;

-  PWMD5.pd_tim = TIM5;

+  PWMD5.enabled_channels = 0;

+  PWMD5.tim = TIM5;

 #endif

 }

 

@@ -297,9 +297,9 @@ void pwm_lld_start(PWMDriver *pwmp) {
   uint16_t ccer;

 

   /* Reset channels.*/

-  pwmp->pd_enabled_channels = 0;            /* All channels disabled.       */

+  pwmp->enabled_channels = 0;               /* All channels disabled.       */

 

-  if (pwmp->pd_state == PWM_STOP) {

+  if (pwmp->state == PWM_STOP) {

     /* Clock activation and timer reset.*/

 #if STM32_PWM_USE_TIM1

     if (&PWMD1 == pwmp) {

@@ -352,11 +352,11 @@ void pwm_lld_start(PWMDriver *pwmp) {
 

     /* All channels configured in PWM1 mode with preload enabled and will

        stay that way until the driver is stopped.*/

-    pwmp->pd_tim->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 |

+    pwmp->tim->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 |

                           TIM_CCMR1_OC1PE |

                           TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 |

                           TIM_CCMR1_OC2PE;

-    pwmp->pd_tim->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 |

+    pwmp->tim->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 |

                           TIM_CCMR2_OC3PE |

                           TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 |

                           TIM_CCMR2_OC4PE;

@@ -364,23 +364,23 @@ void pwm_lld_start(PWMDriver *pwmp) {
   else {

     /* Driver re-configuration scenario, it must be stopped first.*/

     /* Really required ?????????? */

-    pwmp->pd_tim->CR1  = 0;                   /* Timer stopped.               */

-    pwmp->pd_tim->CR2  = 0;                   /* Timer stopped.               */

-    pwmp->pd_tim->SMCR = 0;                   /* Slave mode disabled.         */

-    pwmp->pd_tim->CCR1 = 0;                   /* Comparator 1 disabled.       */

-    pwmp->pd_tim->CCR2 = 0;                   /* Comparator 2 disabled.       */

-    pwmp->pd_tim->CCR3 = 0;                   /* Comparator 3 disabled.       */

-    pwmp->pd_tim->CCR4 = 0;                   /* Comparator 4 disabled.       */

-    pwmp->pd_tim->CNT  = 0;

+    pwmp->tim->CR1  = 0;                    /* Timer stopped.               */

+    pwmp->tim->CR2  = 0;                    /* Timer stopped.               */

+    pwmp->tim->SMCR = 0;                    /* Slave mode disabled.         */

+    pwmp->tim->CCR1 = 0;                    /* Comparator 1 disabled.       */

+    pwmp->tim->CCR2 = 0;                    /* Comparator 2 disabled.       */

+    pwmp->tim->CCR3 = 0;                    /* Comparator 3 disabled.       */

+    pwmp->tim->CCR4 = 0;                    /* Comparator 4 disabled.       */

+    pwmp->tim->CNT  = 0;

   }

 

   /* Timer configuration.*/

-  pwmp->pd_tim->CR2  = pwmp->pd_config->pc_cr2;

-  pwmp->pd_tim->PSC  = pwmp->pd_config->pc_psc;

-  pwmp->pd_tim->ARR  = pwmp->pd_config->pc_arr;

+  pwmp->tim->CR2  = pwmp->config->cr2;

+  pwmp->tim->PSC  = pwmp->config->psc;

+  pwmp->tim->ARR  = pwmp->config->arr;

   /* Output enables and polarities setup.*/

   ccer = 0;

-  switch (pwmp->pd_config->pc_channels[0].pcc_mode) {

+  switch (pwmp->config->channels[0].mode) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC1P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -388,7 +388,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

-  switch (pwmp->pd_config->pc_channels[1].pcc_mode) {

+  switch (pwmp->config->channels[1].mode) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC2P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -396,7 +396,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

-  switch (pwmp->pd_config->pc_channels[2].pcc_mode) {

+  switch (pwmp->config->channels[2].mode) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC3P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -404,7 +404,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

-  switch (pwmp->pd_config->pc_channels[3].pcc_mode) {

+  switch (pwmp->config->channels[3].mode) {

   case PWM_OUTPUT_ACTIVE_LOW:

     ccer |= TIM_CCER_CC4P;

   case PWM_OUTPUT_ACTIVE_HIGH:

@@ -412,13 +412,13 @@ void pwm_lld_start(PWMDriver *pwmp) {
   default:

     ;

   }

-  pwmp->pd_tim->CCER = ccer;

-  pwmp->pd_tim->EGR  = TIM_EGR_UG;          /* Update event.                */

-  pwmp->pd_tim->SR   = 0;                   /* Clear pending IRQs.          */

-  pwmp->pd_tim->DIER = pwmp->pd_config->pc_callback == NULL ? 0 : TIM_DIER_UIE;

-  pwmp->pd_tim->BDTR = TIM_BDTR_MOE;

+  pwmp->tim->CCER = ccer;

+  pwmp->tim->EGR  = TIM_EGR_UG;             /* Update event.                */

+  pwmp->tim->SR   = 0;                      /* Clear pending IRQs.          */

+  pwmp->tim->DIER = pwmp->config->callback == NULL ? 0 : TIM_DIER_UIE;

+  pwmp->tim->BDTR = TIM_BDTR_MOE;

   /* Timer configured and started.*/

-  pwmp->pd_tim->CR1  = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN;

+  pwmp->tim->CR1  = TIM_CR1_ARPE | TIM_CR1_URS | TIM_CR1_CEN;

 }

 

 /**

@@ -431,19 +431,19 @@ void pwm_lld_start(PWMDriver *pwmp) {
 void pwm_lld_stop(PWMDriver *pwmp) {

 

   /* If in ready state then disables the PWM clock.*/

-  if (pwmp->pd_state == PWM_READY) {

-    pwmp->pd_enabled_channels = 0;          /* All channels disabled.       */

-    pwmp->pd_tim->CR1   = 0;

-    pwmp->pd_tim->CR2   = 0;

-    pwmp->pd_tim->CCER  = 0;                /* Outputs disabled.            */

-    pwmp->pd_tim->CCR1  = 0;                /* Comparator 1 disabled.       */

-    pwmp->pd_tim->CCR2  = 0;                /* Comparator 2 disabled.       */

-    pwmp->pd_tim->CCR3  = 0;                /* Comparator 3 disabled.       */

-    pwmp->pd_tim->CCR4  = 0;                /* Comparator 4 disabled.       */

-    pwmp->pd_tim->BDTR  = 0;

-    pwmp->pd_tim->DIER  = 0;

-    pwmp->pd_tim->SR    = 0;

-    pwmp->pd_tim->EGR  = TIM_EGR_UG;        /* Update event.                */

+  if (pwmp->state == PWM_READY) {

+    pwmp->enabled_channels = 0;             /* All channels disabled.       */

+    pwmp->tim->CR1   = 0;

+    pwmp->tim->CR2   = 0;

+    pwmp->tim->CCER  = 0;                   /* Outputs disabled.            */

+    pwmp->tim->CCR1  = 0;                   /* Comparator 1 disabled.       */

+    pwmp->tim->CCR2  = 0;                   /* Comparator 2 disabled.       */

+    pwmp->tim->CCR3  = 0;                   /* Comparator 3 disabled.       */

+    pwmp->tim->CCR4  = 0;                   /* Comparator 4 disabled.       */

+    pwmp->tim->BDTR  = 0;

+    pwmp->tim->DIER  = 0;

+    pwmp->tim->SR    = 0;

+    pwmp->tim->EGR  = TIM_EGR_UG;           /* Update event.                */

 

 #if STM32_PWM_USE_TIM1

     if (&PWMD1 == pwmp) {

@@ -492,15 +492,15 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
                             pwmchannel_t channel,

                             pwmcnt_t width) {

 

-  *(&pwmp->pd_tim->CCR1 + (channel * 2)) = width;   /* New duty cycle.      */

-  if ((pwmp->pd_enabled_channels & (1 << channel)) == 0) {

+  *(&pwmp->tim->CCR1 + (channel * 2)) = width;      /* New duty cycle.      */

+  if ((pwmp->enabled_channels & (1 << channel)) == 0) {

     /* The channel is not enabled yet.*/

-    pwmp->pd_enabled_channels |= (1 << channel);

+    pwmp->enabled_channels |= (1 << channel);

     /* If there is a callback associated to the channel then the proper

        interrupt is cleared and enabled.*/

-    if (pwmp->pd_config->pc_channels[channel].pcc_callback) {

-      pwmp->pd_tim->SR    = ~(2 << channel);

-      pwmp->pd_tim->DIER |= (2 << channel);

+    if (pwmp->config->channels[channel].callback) {

+      pwmp->tim->SR    = ~(2 << channel);

+      pwmp->tim->DIER |= (2 << channel);

     }

   }

 }

@@ -517,9 +517,9 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
  */

 void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {

 

-  *(&pwmp->pd_tim->CCR1 + (channel * 2)) = 0;

-  pwmp->pd_tim->DIER &= ~(2 << channel);

-  pwmp->pd_enabled_channels &= ~(1 << channel);

+  *(&pwmp->tim->CCR1 + (channel * 2)) = 0;

+  pwmp->tim->DIER &= ~(2 << channel);

+  pwmp->enabled_channels &= ~(1 << channel);

 }

 

 #endif /* HAL_USE_PWM */