diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-01-20 19:07:07 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-01-20 19:07:07 +0000 |
| commit | 1664a6573e8b8c6caf4104c1e4e298a34e8c8271 (patch) | |
| tree | aa91cc5d71733a9c25680ff3dc131c8efdb73ba9 /os/hal/platforms/STM32/adc_lld.h | |
| parent | c904e6588a049d5e00aaf084a24037786a5182d6 (diff) | |
| download | ChibiOS-1664a6573e8b8c6caf4104c1e4e298a34e8c8271.tar.gz ChibiOS-1664a6573e8b8c6caf4104c1e4e298a34e8c8271.tar.bz2 ChibiOS-1664a6573e8b8c6caf4104c1e4e298a34e8c8271.zip | |
Fixed bug 3160306.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2663 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/adc_lld.h')
| -rw-r--r-- | os/hal/platforms/STM32/adc_lld.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/os/hal/platforms/STM32/adc_lld.h b/os/hal/platforms/STM32/adc_lld.h index 3e9e07349..876560fca 100644 --- a/os/hal/platforms/STM32/adc_lld.h +++ b/os/hal/platforms/STM32/adc_lld.h @@ -281,19 +281,19 @@ struct ADCDriver { */
#define ADC_SQR1_NUM_CH(n) (((n) - 1) << 20)
-#define ADC_SQR3_SQ0_N(n) ((n) << 0) /**< @brief 1st channel in seq. */
-#define ADC_SQR3_SQ1_N(n) ((n) << 5) /**< @brief 2nd channel in seq. */
-#define ADC_SQR3_SQ2_N(n) ((n) << 10) /**< @brief 3rd channel in seq. */
-#define ADC_SQR3_SQ3_N(n) ((n) << 15) /**< @brief 4th channel in seq. */
-#define ADC_SQR3_SQ4_N(n) ((n) << 20) /**< @brief 5th channel in seq. */
-#define ADC_SQR3_SQ5_N(n) ((n) << 25) /**< @brief 6th channel in seq. */
-
-#define ADC_SQR2_SQ6_N(n) ((n) << 0) /**< @brief 7th channel in seq. */
-#define ADC_SQR2_SQ7_N(n) ((n) << 5) /**< @brief 8th channel in seq. */
-#define ADC_SQR2_SQ8_N(n) ((n) << 10) /**< @brief 9th channel in seq. */
-#define ADC_SQR2_SQ9_N(n) ((n) << 15) /**< @brief 10th channel in seq.*/
-#define ADC_SQR2_SQ10_N(n) ((n) << 20) /**< @brief 11th channel in seq.*/
-#define ADC_SQR2_SQ11_N(n) ((n) << 25) /**< @brief 12th channel in seq.*/
+#define ADC_SQR3_SQ1_N(n) ((n) << 0) /**< @brief 1st channel in seq. */
+#define ADC_SQR3_SQ2_N(n) ((n) << 5) /**< @brief 2nd channel in seq. */
+#define ADC_SQR3_SQ3_N(n) ((n) << 10) /**< @brief 3rd channel in seq. */
+#define ADC_SQR3_SQ4_N(n) ((n) << 15) /**< @brief 4th channel in seq. */
+#define ADC_SQR3_SQ5_N(n) ((n) << 20) /**< @brief 5th channel in seq. */
+#define ADC_SQR3_SQ6_N(n) ((n) << 25) /**< @brief 6th channel in seq. */
+
+#define ADC_SQR2_SQ7_N(n) ((n) << 0) /**< @brief 7th channel in seq. */
+#define ADC_SQR2_SQ8_N(n) ((n) << 5) /**< @brief 8th channel in seq. */
+#define ADC_SQR2_SQ9_N(n) ((n) << 10) /**< @brief 9th channel in seq. */
+#define ADC_SQR2_SQ10_N(n) ((n) << 15) /**< @brief 10th channel in seq.*/
+#define ADC_SQR2_SQ11_N(n) ((n) << 20) /**< @brief 11th channel in seq.*/
+#define ADC_SQR2_SQ12_N(n) ((n) << 25) /**< @brief 12th channel in seq.*/
#define ADC_SQR1_SQ13_N(n) ((n) << 0) /**< @brief 13th channel in seq.*/
#define ADC_SQR1_SQ14_N(n) ((n) << 5) /**< @brief 14th channel in seq.*/
|