diff options
| -rw-r--r-- | demos/ARMCM3-STM32F100-DISCOVERY/main.c | 2 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/adc_lld.h | 26 | ||||
| -rw-r--r-- | readme.txt | 2 | ||||
| -rw-r--r-- | testhal/STM32/ADC/main.c | 19 |
4 files changed, 23 insertions, 26 deletions
diff --git a/demos/ARMCM3-STM32F100-DISCOVERY/main.c b/demos/ARMCM3-STM32F100-DISCOVERY/main.c index 471929a4d..c4a222680 100644 --- a/demos/ARMCM3-STM32F100-DISCOVERY/main.c +++ b/demos/ARMCM3-STM32F100-DISCOVERY/main.c @@ -53,7 +53,7 @@ static const ADCConversionGroup adcgrpcfg = { 0,
ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
0,
- ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ0_N(ADC_CHANNEL_SENSOR)
+ ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ1_N(ADC_CHANNEL_SENSOR)
};
/*
diff --git a/os/hal/platforms/STM32/adc_lld.h b/os/hal/platforms/STM32/adc_lld.h index 3e9e07349..876560fca 100644 --- a/os/hal/platforms/STM32/adc_lld.h +++ b/os/hal/platforms/STM32/adc_lld.h @@ -281,19 +281,19 @@ struct ADCDriver { */
#define ADC_SQR1_NUM_CH(n) (((n) - 1) << 20)
-#define ADC_SQR3_SQ0_N(n) ((n) << 0) /**< @brief 1st channel in seq. */
-#define ADC_SQR3_SQ1_N(n) ((n) << 5) /**< @brief 2nd channel in seq. */
-#define ADC_SQR3_SQ2_N(n) ((n) << 10) /**< @brief 3rd channel in seq. */
-#define ADC_SQR3_SQ3_N(n) ((n) << 15) /**< @brief 4th channel in seq. */
-#define ADC_SQR3_SQ4_N(n) ((n) << 20) /**< @brief 5th channel in seq. */
-#define ADC_SQR3_SQ5_N(n) ((n) << 25) /**< @brief 6th channel in seq. */
-
-#define ADC_SQR2_SQ6_N(n) ((n) << 0) /**< @brief 7th channel in seq. */
-#define ADC_SQR2_SQ7_N(n) ((n) << 5) /**< @brief 8th channel in seq. */
-#define ADC_SQR2_SQ8_N(n) ((n) << 10) /**< @brief 9th channel in seq. */
-#define ADC_SQR2_SQ9_N(n) ((n) << 15) /**< @brief 10th channel in seq.*/
-#define ADC_SQR2_SQ10_N(n) ((n) << 20) /**< @brief 11th channel in seq.*/
-#define ADC_SQR2_SQ11_N(n) ((n) << 25) /**< @brief 12th channel in seq.*/
+#define ADC_SQR3_SQ1_N(n) ((n) << 0) /**< @brief 1st channel in seq. */
+#define ADC_SQR3_SQ2_N(n) ((n) << 5) /**< @brief 2nd channel in seq. */
+#define ADC_SQR3_SQ3_N(n) ((n) << 10) /**< @brief 3rd channel in seq. */
+#define ADC_SQR3_SQ4_N(n) ((n) << 15) /**< @brief 4th channel in seq. */
+#define ADC_SQR3_SQ5_N(n) ((n) << 20) /**< @brief 5th channel in seq. */
+#define ADC_SQR3_SQ6_N(n) ((n) << 25) /**< @brief 6th channel in seq. */
+
+#define ADC_SQR2_SQ7_N(n) ((n) << 0) /**< @brief 7th channel in seq. */
+#define ADC_SQR2_SQ8_N(n) ((n) << 5) /**< @brief 8th channel in seq. */
+#define ADC_SQR2_SQ9_N(n) ((n) << 10) /**< @brief 9th channel in seq. */
+#define ADC_SQR2_SQ10_N(n) ((n) << 15) /**< @brief 10th channel in seq.*/
+#define ADC_SQR2_SQ11_N(n) ((n) << 20) /**< @brief 11th channel in seq.*/
+#define ADC_SQR2_SQ12_N(n) ((n) << 25) /**< @brief 12th channel in seq.*/
#define ADC_SQR1_SQ13_N(n) ((n) << 0) /**< @brief 13th channel in seq.*/
#define ADC_SQR1_SQ14_N(n) ((n) << 5) /**< @brief 14th channel in seq.*/
diff --git a/readme.txt b/readme.txt index 1ac2d1275..6ff76dc40 100644 --- a/readme.txt +++ b/readme.txt @@ -69,6 +69,8 @@ *****************************************************************************
*** 2.1.8 ***
+- FIX: Fixed error in STM32 ADC driver macro names (bug 3160306)(backported
+ to 2.0.11).
- FIX: Fixed IAR Cortex-Mx port memory organization problem (bug 3158776).
- FIX: Fixed STM32F103 demo's incorrect clock settings (bug 3153746).
- NEW: Added OTG clock setting to the STM32 HAL.
diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index c0ce8c664..6e765476b 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -23,11 +23,6 @@ #define ADC_GRP1_NUM_CHANNELS 8
#define ADC_GRP1_BUF_DEPTH 16
-/*
- * ADC configuration, empty for STM32, nothing to configure.
- */
-static const ADCConfig adccfg = {};
-
static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
/*
@@ -47,7 +42,7 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { /*
* ADC conversion group.
- * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered.
* Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef.
*/
static const ADCConversionGroup adcgrpcfg = {
@@ -59,10 +54,10 @@ static const ADCConversionGroup adcgrpcfg = { 0,
0,
ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
- ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT),
- ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) |
- ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) |
- ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10)
+ ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT),
+ ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) |
+ ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) |
+ ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10)
};
/*
@@ -97,7 +92,7 @@ int main(void) { chSysInit();
/*
- * Setting up analog inputs used by the demo. + * Setting up analog inputs used by the demo.
*/
palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1),
PAL_MODE_INPUT_ANALOG);
@@ -110,7 +105,7 @@ int main(void) { /*
* Starts an ADC continuous conversion.
*/
- adcStart(&ADCD1, &adccfg);
+ adcStart(&ADCD1, NULL);
adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
/*
|