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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-14 12:34:59 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-14 12:34:59 +0000 |
| commit | 126943984c591c952bd0b9f6b2d36d97be823de3 (patch) | |
| tree | ba80c46171dcc1e34bbd0110edb0cca645bd50ed /os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.h | |
| parent | f0e62eb4b588d8b2fbf858efb7b41226a2424d81 (diff) | |
| download | ChibiOS-126943984c591c952bd0b9f6b2d36d97be823de3.tar.gz ChibiOS-126943984c591c952bd0b9f6b2d36d97be823de3.tar.bz2 ChibiOS-126943984c591c952bd0b9f6b2d36d97be823de3.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5848 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.h')
| -rw-r--r-- | os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.h | 56 |
1 files changed, 32 insertions, 24 deletions
diff --git a/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.h b/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.h index 95c4c72ab..b79e13a8e 100644 --- a/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.h +++ b/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.h @@ -74,6 +74,14 @@ #endif
/**
+ * @brief SPID5 driver enable switch.
+ * @details If set to @p TRUE the support for DSPI4 is included.
+ */
+#if !defined(SPC5_SPI_USE_DSPI4) || defined(__DOXYGEN__)
+#define SPC5_SPI_USE_DSPI4 FALSE
+#endif
+
+/**
* @brief DSPI0 MCR PCS defaults.
*/
#if !defined(SPC5_SPI_DSPI0_MCR) || defined(__DOXYGEN__)
@@ -130,31 +138,17 @@ #endif
/**
- * @brief DSPI0 DMA priority.
- */
-#if !defined(SPC5_SPI_DSPI0_DMA_PRIO) || defined(__DOXYGEN__)
-#define SPC5_SPI_DSPI0_DMA_PRIO 10
-#endif
-
-/**
- * @brief DSPI1 DMA priority.
+ * @brief DSPI4 MCR PCS defaults.
*/
-#if !defined(SPC5_SPI_DSPI1_DMA_PRIO) || defined(__DOXYGEN__)
-#define SPC5_SPI_DSPI1_DMA_PRIO 10
-#endif
-
-/**
- * @brief DSPI2 DMA priority.
- */
-#if !defined(SPC5_SPI_DSPI2_DMA_PRIO) || defined(__DOXYGEN__)
-#define SPC5_SPI_DSPI2_DMA_PRIO 10
-#endif
-
-/**
- * @brief DSPI3 DMA priority.
- */
-#if !defined(SPC5_SPI_DSPI3_DMA_PRIO) || defined(__DOXYGEN__)
-#define SPC5_SPI_DSPI3_DMA_PRIO 10
+#if !defined(SPC5_SPI_DSPI4_MCR) || defined(__DOXYGEN__)
+#define SPC5_SPI_DSPI4_MCR (SPC5_MCR_PCSIS0 | \
+ SPC5_MCR_PCSIS1 | \
+ SPC5_MCR_PCSIS2 | \
+ SPC5_MCR_PCSIS3 | \
+ SPC5_MCR_PCSIS4 | \
+ SPC5_MCR_PCSIS5 | \
+ SPC5_MCR_PCSIS6 | \
+ SPC5_MCR_PCSIS7)
#endif
/**
@@ -186,6 +180,13 @@ #endif
/**
+ * @brief DSPI4 DMA IRQ priority.
+ */
+#if !defined(SPC5_SPI_DSPI4_DMA_IRQ_PRIO) || defined(__DOXYGEN__)
+#define SPC5_SPI_DSPI4_DMA_IRQ_PRIO 10
+#endif
+
+/**
* @brief SPI DMA error hook.
*/
#if !defined(SPC5_SPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
@@ -221,6 +222,13 @@ #endif
/**
+ * @brief DSPI4 DMA priority.
+ */
+#if !defined(SPC5_SPI_DSPI4_IRQ_PRIO) || defined(__DOXYGEN__)
+#define SPC5_SPI_DSPI4_IRQ_PRIO 10
+#endif
+
+/**
* @brief DSPI0 peripheral configuration when started.
* @note The default configuration is 1 (always run) in run mode and
* 2 (only halt) in low power mode. The defaults of the run modes
|