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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-02-19 11:38:40 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-02-19 11:38:40 +0000
commit72858cb49d82d0e04de168f2348c4243c4f50c69 (patch)
treef0abce086476968bb9661179b767753c375b00c1 /os/hal/platforms/SPC560BCxx
parentf6f45f52012c5bd0ab890978737381df08e404a0 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5265 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/SPC560BCxx')
-rw-r--r--os/hal/platforms/SPC560BCxx/hal_lld.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/os/hal/platforms/SPC560BCxx/hal_lld.h b/os/hal/platforms/SPC560BCxx/hal_lld.h
index a0294a731..8c4a9a3b4 100644
--- a/os/hal/platforms/SPC560BCxx/hal_lld.h
+++ b/os/hal/platforms/SPC560BCxx/hal_lld.h
@@ -244,22 +244,6 @@
#endif
/**
- * @brief XOSC divider value.
- * @note The allowed range is 1...32.
- */
-#if !defined(SPC5_XOSCDIV_VALUE) || defined(__DOXYGEN__)
-#define SPC5_XOSCDIV_VALUE 1
-#endif
-
-/**
- * @brief Fast IRC divider value.
- * @note The allowed range is 1...32.
- */
-#if !defined(SPC5_IRCDIV_VALUE) || defined(__DOXYGEN__)
-#define SPC5_IRCDIV_VALUE 1
-#endif
-
-/**
* @brief FMPLL0 IDF divider value.
* @note The default value is calculated for XOSC=8MHz and PHI=64MHz.
*/
@@ -284,6 +268,22 @@
#endif
/**
+ * @brief XOSC divider value.
+ * @note The allowed range is 1...32.
+ */
+#if !defined(SPC5_XOSCDIV_VALUE) || defined(__DOXYGEN__)
+#define SPC5_XOSCDIV_VALUE 1
+#endif
+
+/**
+ * @brief Fast IRC divider value.
+ * @note The allowed range is 1...32.
+ */
+#if !defined(SPC5_IRCDIV_VALUE) || defined(__DOXYGEN__)
+#define SPC5_IRCDIV_VALUE 1
+#endif
+
+/**
* @brief Peripherals Set 1 clock divider value.
* @note Zero means disabled clock.
*/