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authorGiovanni Di Sirio <gdisirio@gmail.com>2015-04-05 10:14:51 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2015-04-05 10:14:51 +0000
commit2381a7019072f8f6983f323a2bc0913ac115aed3 (patch)
tree86418ad601fa8bd20549736d93ea4b4fc46b537d /os/hal/boards/ST_STM32F3_DISCOVERY
parent60d63e9970553058597fd78941a7fa0ecb4f374b (diff)
downloadChibiOS-2381a7019072f8f6983f323a2bc0913ac115aed3.tar.gz
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Board files regenerated with the updated tool. Fixed some errors in demos.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7854 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/boards/ST_STM32F3_DISCOVERY')
-rw-r--r--os/hal/boards/ST_STM32F3_DISCOVERY/board.h222
1 files changed, 111 insertions, 111 deletions
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/board.h b/os/hal/boards/ST_STM32F3_DISCOVERY/board.h
index 63831640d..f0ab43a18 100644
--- a/os/hal/boards/ST_STM32F3_DISCOVERY/board.h
+++ b/os/hal/boards/ST_STM32F3_DISCOVERY/board.h
@@ -32,13 +32,13 @@
* NOTE: LSE not fitted.
*/
#if !defined(STM32_LSECLK)
-#define STM32_LSECLK 0
+#define STM32_LSECLK 0U
#endif
-#define STM32_LSEDRV (3 << 3)
+#define STM32_LSEDRV (3U << 3U)
#if !defined(STM32_HSECLK)
-#define STM32_HSECLK 8000000
+#define STM32_HSECLK 8000000U
#endif
#define STM32_HSE_BYPASS
@@ -51,129 +51,129 @@
/*
* IO pins assignments.
*/
-#define GPIOA_BUTTON 0
-#define GPIOA_PIN1 1
-#define GPIOA_PIN2 2
-#define GPIOA_PIN3 3
-#define GPIOA_PIN4 4
-#define GPIOA_SPI1_SCK 5
-#define GPIOA_SPI1_MISO 6
-#define GPIOA_SPI1_MOSI 7
-#define GPIOA_PIN8 8
-#define GPIOA_PIN9 9
-#define GPIOA_PIN10 10
-#define GPIOA_USB_DM 11
-#define GPIOA_USB_DP 12
-#define GPIOA_SWDIO 13
-#define GPIOA_SWCLK 14
-#define GPIOA_PIN15 15
+#define GPIOA_BUTTON 0U
+#define GPIOA_PIN1 1U
+#define GPIOA_PIN2 2U
+#define GPIOA_PIN3 3U
+#define GPIOA_PIN4 4U
+#define GPIOA_SPI1_SCK 5U
+#define GPIOA_SPI1_MISO 6U
+#define GPIOA_SPI1_MOSI 7U
+#define GPIOA_PIN8 8U
+#define GPIOA_PIN9 9U
+#define GPIOA_PIN10 10U
+#define GPIOA_USB_DM 11U
+#define GPIOA_USB_DP 12U
+#define GPIOA_SWDIO 13U
+#define GPIOA_SWCLK 14U
+#define GPIOA_PIN15 15U
-#define GPIOB_PIN0 0
-#define GPIOB_PIN1 1
-#define GPIOB_PIN2 2
-#define GPIOB_SWO 3
-#define GPIOB_PIN4 4
-#define GPIOB_PIN5 5
-#define GPIOB_I2C1_SCL 6
-#define GPIOB_I2C1_SDA 7
-#define GPIOB_PIN8 8
-#define GPIOB_PIN9 9
-#define GPIOB_PIN10 10
-#define GPIOB_PIN11 11
-#define GPIOB_PIN12 12
-#define GPIOB_PIN13 13
-#define GPIOB_PIN14 14
-#define GPIOB_PIN15 15
+#define GPIOB_PIN0 0U
+#define GPIOB_PIN1 1U
+#define GPIOB_PIN2 2U
+#define GPIOB_SWO 3U
+#define GPIOB_PIN4 4U
+#define GPIOB_PIN5 5U
+#define GPIOB_I2C1_SCL 6U
+#define GPIOB_I2C1_SDA 7U
+#define GPIOB_PIN8 8U
+#define GPIOB_PIN9 9U
+#define GPIOB_PIN10 10U
+#define GPIOB_PIN11 11U
+#define GPIOB_PIN12 12U
+#define GPIOB_PIN13 13U
+#define GPIOB_PIN14 14U
+#define GPIOB_PIN15 15U
-#define GPIOC_PIN0 0
-#define GPIOC_PIN1 1
-#define GPIOC_PIN2 2
-#define GPIOC_PIN3 3
-#define GPIOC_PIN4 4
-#define GPIOC_PIN5 5
-#define GPIOC_PIN6 6
-#define GPIOC_PIN7 7
-#define GPIOC_PIN8 8
-#define GPIOC_PIN9 9
-#define GPIOC_PIN10 10
-#define GPIOC_PIN11 11
-#define GPIOC_PIN12 12
-#define GPIOC_PIN13 13
-#define GPIOC_OSC32_IN 14
-#define GPIOC_OSC32_OUT 15
+#define GPIOC_PIN0 0U
+#define GPIOC_PIN1 1U
+#define GPIOC_PIN2 2U
+#define GPIOC_PIN3 3U
+#define GPIOC_PIN4 4U
+#define GPIOC_PIN5 5U
+#define GPIOC_PIN6 6U
+#define GPIOC_PIN7 7U
+#define GPIOC_PIN8 8U
+#define GPIOC_PIN9 9U
+#define GPIOC_PIN10 10U
+#define GPIOC_PIN11 11U
+#define GPIOC_PIN12 12U
+#define GPIOC_PIN13 13U
+#define GPIOC_OSC32_IN 14U
+#define GPIOC_OSC32_OUT 15U
-#define GPIOD_PIN0 0
-#define GPIOD_PIN1 1
-#define GPIOD_PIN2 2
-#define GPIOD_PIN3 3
-#define GPIOD_PIN4 4
-#define GPIOD_PIN5 5
-#define GPIOD_PIN6 6
-#define GPIOD_PIN7 7
-#define GPIOD_PIN8 8
-#define GPIOD_PIN9 9
-#define GPIOD_PIN10 10
-#define GPIOD_PIN11 11
-#define GPIOD_PIN12 12
-#define GPIOD_PIN13 13
-#define GPIOD_PIN14 14
-#define GPIOD_PIN15 15
+#define GPIOD_PIN0 0U
+#define GPIOD_PIN1 1U
+#define GPIOD_PIN2 2U
+#define GPIOD_PIN3 3U
+#define GPIOD_PIN4 4U
+#define GPIOD_PIN5 5U
+#define GPIOD_PIN6 6U
+#define GPIOD_PIN7 7U
+#define GPIOD_PIN8 8U
+#define GPIOD_PIN9 9U
+#define GPIOD_PIN10 10U
+#define GPIOD_PIN11 11U
+#define GPIOD_PIN12 12U
+#define GPIOD_PIN13 13U
+#define GPIOD_PIN14 14U
+#define GPIOD_PIN15 15U
-#define GPIOE_L3GD20_INT1 0
-#define GPIOE_L3GD20_INT2 1
-#define GPIOE_LSM303_DRDY 2
-#define GPIOE_SPI1_CS 3
-#define GPIOE_LSM303_INT1 4
-#define GPIOE_LSM303_INT2 5
-#define GPIOE_PIN6 6
-#define GPIOE_PIN7 7
-#define GPIOE_LED4_BLUE 8
-#define GPIOE_LED3_RED 9
-#define GPIOE_LED5_ORANGE 10
-#define GPIOE_LED7_GREEN 11
-#define GPIOE_LED9_BLUE 12
-#define GPIOE_LED10_RED 13
-#define GPIOE_LED8_ORANGE 14
-#define GPIOE_LED6_GREEN 15
+#define GPIOE_L3GD20_INT1 0U
+#define GPIOE_L3GD20_INT2 1U
+#define GPIOE_LSM303_DRDY 2U
+#define GPIOE_SPI1_CS 3U
+#define GPIOE_LSM303_INT1 4U
+#define GPIOE_LSM303_INT2 5U
+#define GPIOE_PIN6 6U
+#define GPIOE_PIN7 7U
+#define GPIOE_LED4_BLUE 8U
+#define GPIOE_LED3_RED 9U
+#define GPIOE_LED5_ORANGE 10U
+#define GPIOE_LED7_GREEN 11U
+#define GPIOE_LED9_BLUE 12U
+#define GPIOE_LED10_RED 13U
+#define GPIOE_LED8_ORANGE 14U
+#define GPIOE_LED6_GREEN 15U
-#define GPIOF_OSC_IN 0
-#define GPIOF_OSC_OUT 1
-#define GPIOF_PIN2 2
-#define GPIOF_PIN3 3
-#define GPIOF_PIN4 4
-#define GPIOF_PIN5 5
-#define GPIOF_PIN6 6
-#define GPIOF_PIN7 7
-#define GPIOF_PIN8 8
-#define GPIOF_PIN9 9
-#define GPIOF_PIN10 10
-#define GPIOF_PIN11 11
-#define GPIOF_PIN12 12
-#define GPIOF_PIN13 13
-#define GPIOF_PIN14 14
-#define GPIOF_PIN15 15
+#define GPIOF_OSC_IN 0U
+#define GPIOF_OSC_OUT 1U
+#define GPIOF_PIN2 2U
+#define GPIOF_PIN3 3U
+#define GPIOF_PIN4 4U
+#define GPIOF_PIN5 5U
+#define GPIOF_PIN6 6U
+#define GPIOF_PIN7 7U
+#define GPIOF_PIN8 8U
+#define GPIOF_PIN9 9U
+#define GPIOF_PIN10 10U
+#define GPIOF_PIN11 11U
+#define GPIOF_PIN12 12U
+#define GPIOF_PIN13 13U
+#define GPIOF_PIN14 14U
+#define GPIOF_PIN15 15U
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
-#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
-#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
-#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
-#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
+#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
+#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
+#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
+#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
#define PIN_ODR_LOW(n) (0U << (n))
#define PIN_ODR_HIGH(n) (1U << (n))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
-#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
-#define PIN_OSPEED_25M(n) (1U << ((n) * 2))
-#define PIN_OSPEED_50M(n) (2U << ((n) * 2))
-#define PIN_OSPEED_100M(n) (3U << ((n) * 2))
-#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
-#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
-#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
-#define PIN_AFIO_AF(n, v) ((v##U) << (((n) % 8) * 4))
+#define PIN_OSPEED_2M(n) (0U << ((n) * 2U))
+#define PIN_OSPEED_25M(n) (1U << ((n) * 2U))
+#define PIN_OSPEED_50M(n) (2U << ((n) * 2U))
+#define PIN_OSPEED_100M(n) (3U << ((n) * 2U))
+#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
+#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
+#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
+#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
/*
* GPIOA setup: