diff options
13 files changed, 145 insertions, 238 deletions
diff --git a/demos/STM32/RT-STM32F401RE-NUCLEO64/Makefile b/demos/STM32/RT-STM32F401RE-NUCLEO64/Makefile index 79b22f572..3251b9d72 100644 --- a/demos/STM32/RT-STM32F401RE-NUCLEO64/Makefile +++ b/demos/STM32/RT-STM32F401RE-NUCLEO64/Makefile @@ -18,7 +18,7 @@ ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti
endif
-# Enable this if you want the linker to remove unused code and data
+# Enable this if you want the linker to remove unused code and data.
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
@@ -28,16 +28,11 @@ ifeq ($(USE_LDOPT),) USE_LDOPT =
endif
-# Enable this if you want link time optimizations (LTO)
+# Enable this if you want link time optimizations (LTO).
ifeq ($(USE_LTO),)
USE_LTO = yes
endif
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
- USE_THUMB = yes
-endif
-
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
@@ -74,19 +69,30 @@ ifeq ($(USE_FPU),) USE_FPU = no
endif
+# FPU-related options.
+ifeq ($(USE_FPU_OPT),)
+ USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
+endif
+
#
# Architecture or project specific options
##############################################################################
##############################################################################
-# Project, sources and paths
+# Project, target, sources and paths
#
# Define project name here
PROJECT = ch
-# Imported source files and paths
+# Target settings.
+MCU = cortex-m4
+
+# Imported source files and paths.
CHIBIOS = ../../..
+CONFDIR := ./cfg
+BUILDDIR := ./build
+DEPDIR := ./.dep
# Licensing files.
include $(CHIBIOS)/os/license/license.mk
@@ -100,12 +106,14 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk # RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Auto-build files in ./source recursively.
+include $(CHIBIOS)/tools/mk/autobuild.mk
# Other files (optional).
include $(CHIBIOS)/test/lib/test.mk
include $(CHIBIOS)/test/rt/rt_test.mk
include $(CHIBIOS)/test/oslib/oslib_test.mk
-# Define linker script file here
+# Define linker script file here.
LDSCRIPT= $(STARTUPLD)/STM32F401xE.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
@@ -118,73 +126,23 @@ CSRC = $(ALLCSRC) \ # setting.
CPPSRC = $(ALLCPPSRC)
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACSRC =
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACPPSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCPPSRC =
-
-# List ASM source files here
+# List ASM source files here.
ASMSRC = $(ALLASMSRC)
-ASMXSRC = $(ALLXASMSRC)
-
-INCDIR = $(ALLINC) $(TESTINC)
-#
-# Project, sources and paths
-##############################################################################
-
-##############################################################################
-# Compiler settings
-#
+# List ASM with preprocessor source files here.
+ASMXSRC = $(ALLXASMSRC)
-MCU = cortex-m4
+# Inclusion directories.
+INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-# runtime support makes code size explode.
-LD = $(TRGT)gcc
-#LD = $(TRGT)g++
-CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
-AR = $(TRGT)ar
-OD = $(TRGT)objdump
-SZ = $(TRGT)size
-HEX = $(CP) -O ihex
-BIN = $(CP) -O binary
-
-# ARM-specific options here
-AOPT =
-
-# THUMB-specific options here
-TOPT = -mthumb -DTHUMB
-
-# Define C warning options here
+# Define C warning options here.
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
-# Define C++ warning options here
+# Define C++ warning options here.
CPPWARN = -Wall -Wextra -Wundef
#
-# Compiler settings
+# Project, target, sources and paths
##############################################################################
##############################################################################
@@ -207,8 +165,25 @@ ULIBDIR = ULIBS =
#
-# End of user defines
+# End of user section
+##############################################################################
+
##############################################################################
+# Common rules
+#
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
+include $(RULESPATH)/arm-none-eabi.mk
include $(RULESPATH)/rules.mk
+
+#
+# Common rules
+##############################################################################
+
+##############################################################################
+# Custom rules
+#
+
+#
+# Custom rules
+##############################################################################
diff --git a/demos/STM32/RT-STM32F401RE-NUCLEO64/chconf.h b/demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/chconf.h index 31d86bd5c..31d86bd5c 100644 --- a/demos/STM32/RT-STM32F401RE-NUCLEO64/chconf.h +++ b/demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/chconf.h diff --git a/demos/STM32/RT-STM32F401RE-NUCLEO64/halconf.h b/demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/halconf.h index 6e5569097..6e5569097 100644 --- a/demos/STM32/RT-STM32F401RE-NUCLEO64/halconf.h +++ b/demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/halconf.h diff --git a/demos/STM32/RT-STM32F401RE-NUCLEO64/mcuconf.h b/demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/mcuconf.h index b110fa705..b110fa705 100644 --- a/demos/STM32/RT-STM32F401RE-NUCLEO64/mcuconf.h +++ b/demos/STM32/RT-STM32F401RE-NUCLEO64/cfg/mcuconf.h diff --git a/demos/STM32/RT-STM32L476-DISCOVERY/Makefile b/demos/STM32/RT-STM32L476-DISCOVERY/Makefile index 9c33696ac..881f1aade 100644 --- a/demos/STM32/RT-STM32L476-DISCOVERY/Makefile +++ b/demos/STM32/RT-STM32L476-DISCOVERY/Makefile @@ -33,11 +33,6 @@ ifeq ($(USE_LTO),) USE_LTO = yes
endif
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
- USE_THUMB = yes
-endif
-
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
@@ -76,7 +71,7 @@ endif # FPU-related options.
ifeq ($(USE_FPU_OPT),)
- USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 -fsingle-precision-constant
+ USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
endif
#
@@ -84,13 +79,16 @@ endif ##############################################################################
##############################################################################
-# Project, sources and paths
+# Project, target, sources and paths
#
# Define project name here
PROJECT = ch
-# Imported source files and paths
+# Target settings.
+MCU = cortex-m4
+
+# Imported source files and paths.
CHIBIOS = ../../..
CONFDIR := ./cfg
BUILDDIR := ./build
@@ -115,7 +113,7 @@ include $(CHIBIOS)/test/lib/test.mk include $(CHIBIOS)/test/rt/rt_test.mk
include $(CHIBIOS)/test/oslib/oslib_test.mk
-# Define linker script file here
+# Define linker script file here.
LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
@@ -128,34 +126,23 @@ CSRC = $(ALLCSRC) \ # setting.
CPPSRC = $(ALLCPPSRC)
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACSRC =
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACPPSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCPPSRC =
-
# List ASM source files here.
ASMSRC = $(ALLASMSRC)
+
+# List ASM with preprocessor source files here.
ASMXSRC = $(ALLXASMSRC)
+# Inclusion directories.
INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
+# Define C warning options here.
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here.
+CPPWARN = -Wall -Wextra -Wundef
+
#
-# Project, sources and paths
+# Project, target, sources and paths
##############################################################################
##############################################################################
@@ -182,43 +169,21 @@ ULIBS = ##############################################################################
##############################################################################
-# Compiler settings
+# Common rules
#
-MCU = cortex-m4
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
+include $(RULESPATH)/arm-none-eabi.mk
+include $(RULESPATH)/rules.mk
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-# runtime support makes code size explode.
-LD = $(TRGT)gcc
-#LD = $(TRGT)g++
-CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
-AR = $(TRGT)ar
-OD = $(TRGT)objdump
-SZ = $(TRGT)size
-HEX = $(CP) -O ihex
-BIN = $(CP) -O binary
-
-# ARM-specific options here
-AOPT =
-
-# THUMB-specific options here
-TOPT = -mthumb -DTHUMB
-
-# Define C warning options here
-CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+#
+# Common rules
+##############################################################################
-# Define C++ warning options here
-CPPWARN = -Wall -Wextra -Wundef
+##############################################################################
+# Custom rules
+#
#
-# Compiler settings
+# Custom rules
##############################################################################
-
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
diff --git a/os/common/startup/ARM/compilers/GCC/ld/rules.ld b/os/common/startup/ARM/compilers/GCC/ld/rules.ld index 61a5b6132..c6245820b 100644 --- a/os/common/startup/ARM/compilers/GCC/ld/rules.ld +++ b/os/common/startup/ARM/compilers/GCC/ld/rules.ld @@ -111,7 +111,7 @@ SECTIONS _etext = .;
_textdata = _etext;
- .stacks :
+ .stacks (NOLOAD) :
{
. = ALIGN(8);
__stacks_base__ = .;
@@ -132,7 +132,7 @@ SECTIONS PROVIDE(_edata = .);
} > DATA_RAM AT > flash
- .bss : ALIGN(4)
+ .bss (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld index 5a35f87f2..bc2ca659d 100644 --- a/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld +++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld @@ -111,7 +111,7 @@ SECTIONS _etext = .;
_textdata = _etext;
- .stacks :
+ .stacks (NOLOAD) :
{
. = ALIGN(8);
__stacks_base__ = .;
@@ -132,7 +132,7 @@ SECTIONS PROVIDE(_edata = .);
} > DATA_RAM AT > flash
- .bss : ALIGN(4)
+ .bss (NOLOAD) : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld index 5993da95f..087f913fa 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld @@ -17,7 +17,7 @@ SECTIONS
{
/* Special section for exceptions stack.*/
- .mstack :
+ .mstack (NOLOAD) :
{
. = ALIGN(8);
__main_stack_base__ = .;
@@ -27,7 +27,7 @@ SECTIONS } > MAIN_STACK_RAM
/* Special section for process stack.*/
- .pstack :
+ .pstack (NOLOAD) :
{
__process_stack_base__ = .;
__main_thread_stack_base__ = .;
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk new file mode 100644 index 000000000..5df5fe29c --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk @@ -0,0 +1,23 @@ +##############################################################################
+# Compiler settings
+#
+
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+#
+# Compiler settings
+##############################################################################
diff --git a/os/common/startup/ARMCMx/compilers/GCC/rules.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk index d32a6bb1e..77b7434b0 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/rules.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk @@ -86,24 +86,16 @@ ifdef SREC endif # Source files groups and paths -ifeq ($(USE_THUMB),yes)
- TCSRC += $(CSRC)
- TCPPSRC += $(CPPSRC)
-else
- ACSRC += $(CSRC)
- ACPPSRC += $(CPPSRC)
-endif
-ASRC := $(ACSRC) $(ACPPSRC)
+TCSRC += $(CSRC)
+TCPPSRC += $(CPPSRC)
TSRC := $(TCSRC) $(TCPPSRC)
-SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
+SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(TSRC)))
# Various directories
OBJDIR := $(BUILDDIR)/obj
LSTDIR := $(BUILDDIR)/lst
# Object files groups
-ACOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
-ACPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
@@ -131,36 +123,6 @@ CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<: CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT)
-# Thumb interwork enabled only if needed because it kills performance.
-ifneq ($(strip $(TSRC)),)
- CFLAGS += -DTHUMB_PRESENT
- CPPFLAGS += -DTHUMB_PRESENT
- ASFLAGS += -DTHUMB_PRESENT
- ASXFLAGS += -DTHUMB_PRESENT
- ifneq ($(strip $(ASRC)),)
- # Mixed ARM and THUMB mode.
- CFLAGS += -mthumb-interwork
- CPPFLAGS += -mthumb-interwork
- ASFLAGS += -mthumb-interwork
- ASXFLAGS += -mthumb-interwork
- LDFLAGS += -mthumb-interwork
- else
- # Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
- CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
- ASXFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
- LDFLAGS += -mno-thumb-interwork -mthumb
- endif
-else
- # Pure ARM mode
- CFLAGS += -mno-thumb-interwork
- CPPFLAGS += -mno-thumb-interwork
- ASFLAGS += -mno-thumb-interwork
- ASXFLAGS += -mno-thumb-interwork
- LDFLAGS += -mno-thumb-interwork
-endif
-
# Generate dependency information
ASFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d
@@ -199,40 +161,22 @@ $(LSTDIR): $(DEPDIR):
@mkdir -p $(DEPDIR)
-$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
- $(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ACOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+ $(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
else
@echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+ @$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
endif
$(TCOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)
ifeq ($(USE_VERBOSE_COMPILE),yes)
@echo
- $(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+ $(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
else
@echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+ @$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
endif
$(ASMOBJS) : $(OBJDIR)/%.o : %.s $(MAKEFILE_LIST)
diff --git a/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld b/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld index d76932870..e6cc68ea1 100644 --- a/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld +++ b/os/common/startup/e200/compilers/GCC/ld/rules_z0.ld @@ -23,12 +23,12 @@ ENTRY(_reset_address) SECTIONS
{
. = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
+ .boot0 : ALIGN(16)
{
KEEP(*(.boot))
} > flash
- .boot1 : ALIGN(16) SUBALIGN(16)
+ .boot1 : ALIGN(16)
{
KEEP(*(.handlers))
KEEP(*(.crt0))
@@ -41,7 +41,7 @@ SECTIONS KEEP(*(.ivors))
} > flash
- constructors : ALIGN(4) SUBALIGN(4)
+ constructors : ALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@@ -49,7 +49,7 @@ SECTIONS PROVIDE(__init_array_end = .);
} > flash
- destructors : ALIGN(4) SUBALIGN(4)
+ destructors : ALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
@@ -57,21 +57,21 @@ SECTIONS PROVIDE(__fini_array_end = .);
} > flash
- .text_vle : ALIGN(16) SUBALIGN(16)
+ .text_vle : ALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
- .text : ALIGN(16) SUBALIGN(16)
+ .text : ALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
- .rodata : ALIGN(16) SUBALIGN(16)
+ .rodata : ALIGN(16)
{
*(.glue_7t)
*(.glue_7)
@@ -81,7 +81,7 @@ SECTIONS *(.rodata1)
} > flash
- .sdata2 : ALIGN(16) SUBALIGN(16)
+ .sdata2 : ALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
@@ -102,12 +102,12 @@ SECTIONS *(.eh_frame)
} > flash
- .romdata : ALIGN(16) SUBALIGN(16)
+ .romdata : ALIGN(16)
{
__romdata_start__ = .;
} > flash
- .stacks : ALIGN(16) SUBALIGN(16)
+ .stacks (NOLOAD) : ALIGN(16)
{
. = ALIGN(8);
__irq_stack_base__ = .;
@@ -136,7 +136,7 @@ SECTIONS __data_end__ = .;
} > ram
- .sbss :
+ .sbss (NOLOAD) :
{
__bss_start__ = .;
*(.sbss)
@@ -145,7 +145,7 @@ SECTIONS *(.scommon)
} > ram
- .bss :
+ .bss (NOLOAD) :
{
*(.bss)
*(.bss.*)
diff --git a/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld b/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld index bb4c6ecb3..cda44ab1d 100644 --- a/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld +++ b/os/common/startup/e200/compilers/GCC/ld/rules_z3.ld @@ -23,13 +23,13 @@ ENTRY(_reset_address) SECTIONS
{
. = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
+ .boot0 : ALIGN(16)
{
__ivpr_base__ = .;
KEEP(*(.boot))
} > flash
- .boot1 : ALIGN(16) SUBALIGN(16)
+ .boot1 : ALIGN(16)
{
KEEP(*(.handlers))
KEEP(*(.crt0))
@@ -38,7 +38,7 @@ SECTIONS KEEP(*(.vectors))
} > flash
- constructors : ALIGN(4) SUBALIGN(4)
+ constructors : ALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@@ -46,7 +46,7 @@ SECTIONS PROVIDE(__init_array_end = .);
} > flash
- destructors : ALIGN(4) SUBALIGN(4)
+ destructors : ALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
@@ -54,21 +54,21 @@ SECTIONS PROVIDE(__fini_array_end = .);
} > flash
- .text_vle : ALIGN(16) SUBALIGN(16)
+ .text_vle : ALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
- .text : ALIGN(16) SUBALIGN(16)
+ .text : ALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
- .rodata : ALIGN(16) SUBALIGN(16)
+ .rodata : ALIGN(16)
{
*(.glue_7t)
*(.glue_7)
@@ -78,7 +78,7 @@ SECTIONS *(.rodata1)
} > flash
- .sdata2 : ALIGN(16) SUBALIGN(16)
+ .sdata2 : ALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
@@ -99,12 +99,12 @@ SECTIONS *(.eh_frame)
} > flash
- .romdata : ALIGN(16) SUBALIGN(16)
+ .romdata : ALIGN(16)
{
__romdata_start__ = .;
} > flash
- .stacks : ALIGN(16) SUBALIGN(16)
+ .stacks (NOLOAD) : ALIGN(16)
{
. = ALIGN(8);
__irq_stack_base__ = .;
@@ -133,7 +133,7 @@ SECTIONS __data_end__ = .;
} > ram
- .sbss :
+ .sbss (NOLOAD) :
{
__bss_start__ = .;
*(.sbss)
@@ -142,7 +142,7 @@ SECTIONS *(.scommon)
} > ram
- .bss :
+ .bss (NOLOAD) :
{
*(.bss)
*(.bss.*)
diff --git a/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld b/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld index bb4c6ecb3..cda44ab1d 100644 --- a/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld +++ b/os/common/startup/e200/compilers/GCC/ld/rules_z4.ld @@ -23,13 +23,13 @@ ENTRY(_reset_address) SECTIONS
{
. = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
+ .boot0 : ALIGN(16)
{
__ivpr_base__ = .;
KEEP(*(.boot))
} > flash
- .boot1 : ALIGN(16) SUBALIGN(16)
+ .boot1 : ALIGN(16)
{
KEEP(*(.handlers))
KEEP(*(.crt0))
@@ -38,7 +38,7 @@ SECTIONS KEEP(*(.vectors))
} > flash
- constructors : ALIGN(4) SUBALIGN(4)
+ constructors : ALIGN(4)
{
PROVIDE(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
@@ -46,7 +46,7 @@ SECTIONS PROVIDE(__init_array_end = .);
} > flash
- destructors : ALIGN(4) SUBALIGN(4)
+ destructors : ALIGN(4)
{
PROVIDE(__fini_array_start = .);
KEEP(*(.fini_array))
@@ -54,21 +54,21 @@ SECTIONS PROVIDE(__fini_array_end = .);
} > flash
- .text_vle : ALIGN(16) SUBALIGN(16)
+ .text_vle : ALIGN(16)
{
*(.text_vle)
*(.text_vle.*)
*(.gnu.linkonce.t_vle.*)
} > flash
- .text : ALIGN(16) SUBALIGN(16)
+ .text : ALIGN(16)
{
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > flash
- .rodata : ALIGN(16) SUBALIGN(16)
+ .rodata : ALIGN(16)
{
*(.glue_7t)
*(.glue_7)
@@ -78,7 +78,7 @@ SECTIONS *(.rodata1)
} > flash
- .sdata2 : ALIGN(16) SUBALIGN(16)
+ .sdata2 : ALIGN(16)
{
__sdata2_start__ = . + 0x8000;
*(.sdata2)
@@ -99,12 +99,12 @@ SECTIONS *(.eh_frame)
} > flash
- .romdata : ALIGN(16) SUBALIGN(16)
+ .romdata : ALIGN(16)
{
__romdata_start__ = .;
} > flash
- .stacks : ALIGN(16) SUBALIGN(16)
+ .stacks (NOLOAD) : ALIGN(16)
{
. = ALIGN(8);
__irq_stack_base__ = .;
@@ -133,7 +133,7 @@ SECTIONS __data_end__ = .;
} > ram
- .sbss :
+ .sbss (NOLOAD) :
{
__bss_start__ = .;
*(.sbss)
@@ -142,7 +142,7 @@ SECTIONS *(.scommon)
} > ram
- .bss :
+ .bss (NOLOAD) :
{
*(.bss)
*(.bss.*)
|