Splitted the ARM starup tree. Created an ARMCAx-TZ specific tree.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11005 35acf78f-673a-0410-8e92-d51de3d6d3f4

7 files changed, 927 insertions, 0 deletions

diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/crt0.S b/os/common/startup/ARMCAx-TZ/compilers/GCC/crt0.S
new file mode 100644
index 000000000..43cb723ab
--- /dev/null
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/crt0.S
@@ -0,0 +1,152 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    crt0.S

+ * @brief   Generic ARM startup file.

+ *

+ * @addtogroup ARM_GCC_STARTUP

+ * @{

+ */

+

+#if !defined(__DOXYGEN__)

+

+                .set    MODE_USR, 0x10

+                .set    MODE_FIQ, 0x11

+                .set    MODE_IRQ, 0x12

+                .set    MODE_SVC, 0x13

+                .set    MODE_ABT, 0x17

+                .set    MODE_UND, 0x1B

+                .set    MODE_SYS, 0x1F

+

+                .set    I_BIT, 0x80

+                .set    F_BIT, 0x40

+

+                .text

+                .code   32

+                .balign 4

+

+/*

+ * Reset handler.

+ */

+                .global Reset_Handler

+Reset_Handler:

+                /*

+                 * Stack pointers initialization.

+                 */

+                ldr     r0, =__stacks_end__

+                /* Undefined */

+                msr     CPSR_c, #MODE_UND | I_BIT | F_BIT

+                mov     sp, r0

+                ldr     r1, =__und_stack_size__

+                sub     r0, r0, r1

+                /* Abort */

+                msr     CPSR_c, #MODE_ABT | I_BIT | F_BIT

+                mov     sp, r0

+                ldr     r1, =__abt_stack_size__

+                sub     r0, r0, r1

+                /* FIQ */

+                msr     CPSR_c, #MODE_FIQ | I_BIT | F_BIT

+                mov     sp, r0

+                ldr     r1, =__fiq_stack_size__

+                sub     r0, r0, r1

+                /* IRQ */

+                msr     CPSR_c, #MODE_IRQ | I_BIT | F_BIT

+                mov     sp, r0

+                ldr     r1, =__irq_stack_size__

+                sub     r0, r0, r1

+                /* Supervisor */

+                msr     CPSR_c, #MODE_SVC | I_BIT | F_BIT

+                mov     sp, r0

+                ldr     r1, =__svc_stack_size__

+                sub     r0, r0, r1

+                /* System */

+                msr     CPSR_c, #MODE_SYS | I_BIT | F_BIT

+                mov     sp, r0

+//                ldr     r1, =__sys_stack_size__

+//                sub     r0, r0, r1

+                /*

+                 * Early initialization.

+                 */

+#if !defined(THUMB_NO_INTERWORKING)

+                bl      __early_init

+#else /* defined(THUMB_NO_INTERWORKING) */

+                add     r0, pc, #1

+                bx      r0

+                .code   16

+                bl      __early_init

+                mov     r0, pc

+                bx      r0

+                .code   32

+#endif /* defined(THUMB_NO_INTERWORKING) */

+

+                /*

+                 * Data initialization.

+                 * NOTE: It assumes that the DATA size is a multiple of 4.

+                 */

+                ldr     r1, =_textdata

+                ldr     r2, =_data

+                ldr     r3, =_edata

+dataloop:

+                cmp     r2, r3

+                ldrlo   r0, [r1], #4

+                strlo   r0, [r2], #4

+                blo     dataloop

+                /*

+                 * BSS initialization.

+                 * NOTE: It assumes that the BSS size is a multiple of 4.

+                 */

+                mov     r0, #0

+                ldr     r1, =_bss_start

+                ldr     r2, =_bss_end

+bssloop:

+                cmp     r1, r2

+                strlo   r0, [r1], #4

+                blo     bssloop

+                /*

+                 * Late initialization.

+                 */

+#if !defined(THUMB_NO_INTERWORKING)

+                bl      __late_init

+#else /* defined(THUMB_NO_INTERWORKING) */

+                add     r0, pc, #1

+                bx      r0

+                .code   16

+                bl      __late_init

+                mov     r0, pc

+                bx      r0

+                .code   32

+#endif /* defined(THUMB_NO_INTERWORKING) */

+

+                /*

+                 * Main program invocation.

+                 */

+#if defined(THUMB_NO_INTERWORKING)

+                add     r0, pc, #1

+                bx      r0

+                .code   16

+                bl      main

+                ldr     r1, =__default_exit

+                bx      r1

+                .code   32

+#else /* !defined(THUMB_NO_INTERWORKING) */

+                bl      main

+                b       __default_exit

+#endif /* !defined(THUMB_NO_INTERWORKING) */

+

+#endif /* !defined(__DOXYGEN__) */

+

+/** @} */

diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/crt1.c b/os/common/startup/ARMCAx-TZ/compilers/GCC/crt1.c
new file mode 100644
index 000000000..dd08df45d
--- /dev/null
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/crt1.c
@@ -0,0 +1,72 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    ARMCMx/compilers/GCC/crt1.c

+ * @brief   Startup stub functions.

+ *

+ * @addtogroup ARMCMx_GCC_STARTUP

+ * @{

+ */

+

+#include <stdbool.h>

+

+/**

+ * @brief   Early initialization.

+ * @details This hook is invoked immediately after the stack initialization

+ *          and before the DATA and BSS segments initialization. The

+ *          default behavior is to do nothing.

+ * @note    This function is a weak symbol.

+ */

+#if !defined(__DOXYGEN__)

+__attribute__((weak))

+#endif

+/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/

+void __early_init(void) {}

+/*lint -restore*/

+

+/**

+ * @brief   Late initialization.

+ * @details This hook is invoked after the DATA and BSS segments

+ *          initialization and before any static constructor. The

+ *          default behavior is to do nothing.

+ * @note    This function is a weak symbol.

+ */

+#if !defined(__DOXYGEN__)

+__attribute__((weak))

+#endif

+/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/

+void __late_init(void) {}

+/*lint -restore*/

+

+/**

+ * @brief   Default @p main() function exit handler.

+ * @details This handler is invoked or the @p main() function exit. The

+ *          default behavior is to enter an infinite loop.

+ * @note    This function is a weak symbol.

+ */

+#if !defined(__DOXYGEN__)

+__attribute__((noreturn, weak))

+#endif

+/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/

+void __default_exit(void) {

+/*lint -restore*/

+

+  while (true) {

+  }

+}

+

+/** @} */

diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/SAMA5D2.ld b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/SAMA5D2.ld
new file mode 100755
index 000000000..aacf3aa5c
--- /dev/null
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/SAMA5D2.ld
@@ -0,0 +1,43 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/*

+ * SAMA5D2 memory setup in trusted mode.

+ */

+MEMORY

+{

+    flash : org = 0x00200000, len = 64k

+    ram0  : org = 0x00210000, len = 64k

+    ram1  : org = 0x00000000, len = 0

+    ram2  : org = 0x00000000, len = 0

+    ram3  : org = 0x00000000, len = 0

+    ram4  : org = 0x00000000, len = 0

+    ram5  : org = 0x00000000, len = 0

+    ram6  : org = 0x00000000, len = 0

+    ram7  : org = 0x00000000, len = 0

+}

+

+/* RAM region to be used for stacks. This stack accommodates the processing

+   of all exceptions and interrupts*/

+REGION_ALIAS("STACKS_RAM", ram0);

+

+/* RAM region to be used for data segment.*/

+REGION_ALIAS("DATA_RAM", ram0);

+

+/* RAM region to be used for BSS segment.*/

+REGION_ALIAS("BSS_RAM", ram0);

+

+INCLUDE rules.ld

diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld
new file mode 100644
index 000000000..ac4e969bd
--- /dev/null
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/ld/rules.ld
@@ -0,0 +1,223 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+__stacks_total_size__	    = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;

+

+__ram0_start__          = ORIGIN(ram0);

+__ram0_size__           = LENGTH(ram0);

+__ram0_end__            = __ram0_start__ + __ram0_size__;

+__ram1_start__          = ORIGIN(ram1);

+__ram1_size__           = LENGTH(ram1);

+__ram1_end__            = __ram1_start__ + __ram1_size__;

+__ram2_start__          = ORIGIN(ram2);

+__ram2_size__           = LENGTH(ram2);

+__ram2_end__            = __ram2_start__ + __ram2_size__;

+__ram3_start__          = ORIGIN(ram3);

+__ram3_size__           = LENGTH(ram3);

+__ram3_end__            = __ram3_start__ + __ram3_size__;

+__ram4_start__          = ORIGIN(ram4);

+__ram4_size__           = LENGTH(ram4);

+__ram4_end__            = __ram4_start__ + __ram4_size__;

+__ram5_start__          = ORIGIN(ram5);

+__ram5_size__           = LENGTH(ram5);

+__ram5_end__            = __ram5_start__ + __ram5_size__;

+__ram6_start__          = ORIGIN(ram6);

+__ram6_size__           = LENGTH(ram6);

+__ram6_end__            = __ram6_start__ + __ram6_size__;

+__ram7_start__          = ORIGIN(ram7);

+__ram7_size__           = LENGTH(ram7);

+__ram7_end__            = __ram7_start__ + __ram7_size__;

+

+ENTRY(Reset_Handler)

+

+SECTIONS

+{

+    . = 0;

+    _text = .;

+

+    startup : ALIGN(16) SUBALIGN(16)

+    {

+        KEEP(*(.vectors))

+        KEEP(*(.boot))

+    } > flash

+

+    constructors : ALIGN(4) SUBALIGN(4)

+    {

+        PROVIDE(__init_array_start = .);

+        KEEP(*(SORT(.init_array.*)))

+        KEEP(*(.init_array))

+        PROVIDE(__init_array_end = .);

+    } > flash

+

+    destructors : ALIGN(4) SUBALIGN(4)

+    {

+        PROVIDE(__fini_array_start = .);

+        KEEP(*(.fini_array))

+        KEEP(*(SORT(.fini_array.*)))

+        PROVIDE(__fini_array_end = .);

+    } > flash

+

+    .text : ALIGN(16) SUBALIGN(16)

+    {

+        *(.text)

+        *(.text.*)

+        *(.rodata)

+        *(.rodata.*)

+        *(.glue_7t)

+        *(.glue_7)

+        *(.gcc*)

+    } > flash

+

+    .ARM.extab :

+    {

+        *(.ARM.extab* .gnu.linkonce.armextab.*)

+    } > flash

+

+    .ARM.exidx : {

+        PROVIDE(__exidx_start = .);

+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)

+        PROVIDE(__exidx_end = .);

+     } > flash

+

+    .eh_frame_hdr :

+    {

+        *(.eh_frame_hdr)

+    } > flash

+

+    .eh_frame : ONLY_IF_RO

+    {

+        *(.eh_frame)

+    } > flash

+    

+    .textalign : ONLY_IF_RO

+    {

+        . = ALIGN(8);

+    } > flash

+

+    . = ALIGN(4);

+    _etext = .;

+    _textdata = _etext;

+

+    .stacks :

+    {

+        . = ALIGN(8);

+        __stacks_base__ = .;

+        __main_thread_stack_base__ = .;

+        . += __stacks_total_size__;

+        . = ALIGN(8);

+        __stacks_end__ = .;

+    } > STACKS_RAM

+

+    .data : ALIGN(4)

+    {

+        . = ALIGN(4);

+        PROVIDE(_data = .);

+        *(.data)

+        *(.data.*)

+        *(.ramtext)

+        . = ALIGN(4);

+        PROVIDE(_edata = .);

+    } > DATA_RAM AT > flash

+

+    .bss : ALIGN(4)

+    {

+        . = ALIGN(4);

+        PROVIDE(_bss_start = .);

+        *(.bss)

+        *(.bss.*)

+        *(COMMON)

+        . = ALIGN(4);

+        PROVIDE(_bss_end = .);

+        PROVIDE(end = .);

+    } > BSS_RAM    

+

+    .ram0 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram0)

+        *(.ram0.*)

+        . = ALIGN(4);

+        __ram0_free__ = .;

+    } > ram0

+

+    .ram1 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram1)

+        *(.ram1.*)

+        . = ALIGN(4);

+        __ram1_free__ = .;

+    } > ram1

+

+    .ram2 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram2)

+        *(.ram2.*)

+        . = ALIGN(4);

+        __ram2_free__ = .;

+    } > ram2

+

+    .ram3 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram3)

+        *(.ram3.*)

+        . = ALIGN(4);

+        __ram3_free__ = .;

+    } > ram3

+

+    .ram4 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram4)

+        *(.ram4.*)

+        . = ALIGN(4);

+        __ram4_free__ = .;

+    } > ram4

+

+    .ram5 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram5)

+        *(.ram5.*)

+        . = ALIGN(4);

+        __ram5_free__ = .;

+    } > ram5

+

+    .ram6 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram6)

+        *(.ram6.*)

+        . = ALIGN(4);

+        __ram6_free__ = .;

+    } > ram6

+

+    .ram7 (NOLOAD) : ALIGN(4)

+    {

+        . = ALIGN(4);

+        *(.ram7)

+        *(.ram7.*)

+        . = ALIGN(4);

+        __ram7_free__ = .;

+    } > ram7

+}

+

+/* Heap default boundaries, it is defaulted to be the non-used part

+   of ram0 region.*/

+__heap_base__   = __ram0_free__;

+__heap_end__    = __ram0_end__;

diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/mk/startup_sama5d2.mk b/os/common/startup/ARMCAx-TZ/compilers/GCC/mk/startup_sama5d2.mk
new file mode 100644
index 000000000..cafddb6b1
--- /dev/null
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/mk/startup_sama5d2.mk
@@ -0,0 +1,11 @@
+# List of the ChibiOS generic SAMA5D2 file.

+STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC/crt1.c

+

+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/boot.S \

+             $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC/vectors.S \

+             $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC/crt0.S

+

+STARTUPINC = ${CHIBIOS}/os/common/startup/ARMCAx-TZ/devices/SAMA5D2 \

+             $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core_A/Include 

+

+STARTUPLD  = ${CHIBIOS}/os/common/startup/ARMCAx-TZ/compilers/GCC/ld

diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/rules.mk b/os/common/startup/ARMCAx-TZ/compilers/GCC/rules.mk
new file mode 100644
index 000000000..0b98a5334
--- /dev/null
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/rules.mk
@@ -0,0 +1,322 @@
+# ARM Cortex-Mx common makefile scripts and rules.

+

+##############################################################################

+# Processing options coming from the upper Makefile.

+#

+

+# Compiler options

+OPT = $(USE_OPT)

+COPT = $(USE_COPT)

+CPPOPT = $(USE_CPPOPT)

+

+# Garbage collection

+ifeq ($(USE_LINK_GC),yes)

+  OPT += -ffunction-sections -fdata-sections -fno-common

+  LDOPT := ,--gc-sections

+else

+  LDOPT :=

+endif

+

+# Linker extra options

+ifneq ($(USE_LDOPT),)

+  LDOPT := $(LDOPT),$(USE_LDOPT)

+endif

+

+# Link time optimizations

+ifeq ($(USE_LTO),yes)

+  OPT += -flto

+endif

+

+# Undefined state stack size

+ifeq ($(USE_UND_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__und_stack_size__=8

+else

+  LDOPT := $(LDOPT),--defsym=__und_stack_size__=$(USE_UND_STACKSIZE)

+endif

+

+# Abort stack size

+ifeq ($(USE_ABT_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__abt_stack_size__=8

+else

+  LDOPT := $(LDOPT),--defsym=__abt_stack_size__=$(USE_ABT_STACKSIZE)

+endif

+

+# FIQ stack size

+ifeq ($(USE_FIQ_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__fiq_stack_size__=64

+else

+  LDOPT := $(LDOPT),--defsym=__fiq_stack_size__=$(USE_FIQ_STACKSIZE)

+endif

+

+# IRQ stack size

+ifeq ($(USE_IRQ_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__irq_stack_size__=0x400

+else

+  LDOPT := $(LDOPT),--defsym=__irq_stack_size__=$(USE_IRQ_STACKSIZE)

+endif

+

+# Supervisor stack size

+ifeq ($(USE_SUPERVISOR_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__svc_stack_size__=8

+else

+  LDOPT := $(LDOPT),--defsym=__svc_stack_size__=$(USE_SUPERVISOR_STACKSIZE)

+endif

+

+# System stack size

+ifeq ($(USE_SYSTEM_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__sys_stack_size__=0x400

+else

+  LDOPT := $(LDOPT),--defsym=__sys_stack_size__=$(USE_SYSTEM_STACKSIZE)

+endif

+

+# Output directory and files

+ifeq ($(BUILDDIR),)

+  BUILDDIR = build

+endif

+ifeq ($(BUILDDIR),.)

+  BUILDDIR = build

+endif

+

+# Dependencies directory

+ifeq ($(DEPDIR),)

+  DEPDIR = .dep

+endif

+ifeq ($(DEPDIR),.)

+  DEPDIR = .dep

+endif

+

+OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \

+           $(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp \

+           $(BUILDDIR)/$(PROJECT).list

+

+# Source files groups and paths

+ifeq ($(USE_THUMB),yes)

+  TCSRC += $(CSRC)

+  TCPPSRC += $(CPPSRC)

+else

+  ACSRC += $(CSRC)

+  ACPPSRC += $(CPPSRC)

+endif

+ASRC      = $(ACSRC) $(ACPPSRC)

+TSRC      = $(TCSRC) $(TCPPSRC)

+SRCPATHS  = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))

+

+# Various directories

+OBJDIR    = $(BUILDDIR)/obj

+LSTDIR    = $(BUILDDIR)/lst

+

+# Object files groups

+ACOBJS    = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))

+ACPPOBJS  = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))

+TCOBJS    = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))

+TCPPOBJS  = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))

+ASMOBJS   = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))

+ASMXOBJS  = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))

+OBJS      = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)

+

+# Paths

+IINCDIR   = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))

+LLIBDIR   = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))

+

+# Macros

+DEFS      = $(DDEFS) $(UDEFS)

+ADEFS     = $(DADEFS) $(UADEFS)

+

+# Libs

+LIBS      = $(DLIBS) $(ULIBS)

+

+# Various settings

+MCFLAGS   = -mcpu=$(MCU)

+ODFLAGS   = -x --syms

+ASFLAGS   = $(MCFLAGS) $(OPT) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)

+ASXFLAGS  = $(MCFLAGS) $(OPT) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)

+CFLAGS    = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)

+CPPFLAGS  = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)

+LDFLAGS   = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT)

+

+# Thumb interwork enabled only if needed because it kills performance.

+ifneq ($(strip $(TSRC)),)

+  CFLAGS   += -DTHUMB_PRESENT

+  CPPFLAGS += -DTHUMB_PRESENT

+  ASFLAGS  += -DTHUMB_PRESENT

+  ASXFLAGS += -DTHUMB_PRESENT

+  ifneq ($(strip $(ASRC)),)

+    # Mixed ARM and THUMB mode.

+    CFLAGS   += -mthumb-interwork

+    CPPFLAGS += -mthumb-interwork

+    ASFLAGS  += -mthumb-interwork

+    ASXFLAGS += -mthumb-interwork

+    LDFLAGS  += -mthumb-interwork

+  else

+    # Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.

+    CFLAGS   += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING

+    CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING

+    ASFLAGS  += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb

+    ASXFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb

+    LDFLAGS  += -mno-thumb-interwork -mthumb

+  endif

+else

+  # Pure ARM mode

+  CFLAGS   += -mno-thumb-interwork

+  CPPFLAGS += -mno-thumb-interwork

+  ASFLAGS  += -mno-thumb-interwork

+  ASXFLAGS += -mno-thumb-interwork

+  LDFLAGS  += -mno-thumb-interwork

+endif

+

+# Generate dependency information

+ASFLAGS  += -MD -MP -MF $(DEPDIR)/$(@F).d

+ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d

+CFLAGS   += -MD -MP -MF $(DEPDIR)/$(@F).d

+CPPFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d

+

+# Paths where to search for sources

+VPATH     = $(SRCPATHS)

+

+#

+# Makefile rules

+#

+

+all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK

+

+PRE_MAKE_ALL_RULE_HOOK:

+

+POST_MAKE_ALL_RULE_HOOK:

+

+$(OBJS): | $(BUILDDIR) $(OBJDIR) $(LSTDIR)

+

+$(BUILDDIR):

+ifneq ($(USE_VERBOSE_COMPILE),yes)

+	@echo Compiler Options

+	@echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o

+	@echo

+endif

+	@mkdir -p $(BUILDDIR)

+

+$(OBJDIR):

+	@mkdir -p $(OBJDIR)

+

+$(LSTDIR):

+	@mkdir -p $(LSTDIR)

+

+$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@

+endif

+

+$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@

+endif

+

+$(ACOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@

+endif

+

+$(TCOBJS) : $(OBJDIR)/%.o : %.c $(MAKEFILE_LIST)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@

+endif

+

+$(ASMOBJS) : $(OBJDIR)/%.o : %.s $(MAKEFILE_LIST)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@

+endif

+

+$(ASMXOBJS) : $(OBJDIR)/%.o : %.S $(MAKEFILE_LIST)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@

+endif

+

+$(BUILDDIR)/$(PROJECT).elf: $(OBJS) $(LDSCRIPT)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@

+else

+	@echo Linking $@

+	@$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@

+endif

+

+%.hex: %.elf

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(HEX) $< $@

+else

+	@echo Creating $@

+	@$(HEX) $< $@

+endif

+

+%.bin: %.elf

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(BIN) $< $@

+else

+	@echo Creating $@

+	@$(BIN) $< $@

+endif

+

+%.dmp: %.elf

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(OD) $(ODFLAGS) $< > $@

+	$(SZ) $<

+else

+	@echo Creating $@

+	@$(OD) $(ODFLAGS) $< > $@

+	@echo

+	@$(SZ) $<

+endif

+

+%.list: %.elf

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(OD) -S $< > $@

+else

+	@echo Creating $@

+	@$(OD) -S $< > $@

+	@echo

+	@echo Done

+endif

+

+lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a

+

+$(BUILDDIR)/lib$(PROJECT).a: $(OBJS)

+	@$(AR) -r $@ $^

+	@echo

+	@echo Done

+

+clean: CLEAN_RULE_HOOK

+	@echo Cleaning

+	-rm -fR $(DEPDIR) $(BUILDDIR)

+	@echo

+	@echo Done

+

+CLEAN_RULE_HOOK:

+

+#

+# Include the dependency files, should be the last of the makefile

+#

+-include $(shell mkdir $(DEPDIR) 2>/dev/null) $(wildcard $(DEPDIR)/*)

+

+# *** EOF ***

diff --git a/os/common/startup/ARMCAx-TZ/compilers/GCC/vectors.S b/os/common/startup/ARMCAx-TZ/compilers/GCC/vectors.S
new file mode 100644
index 000000000..e582678db
--- /dev/null
+++ b/os/common/startup/ARMCAx-TZ/compilers/GCC/vectors.S
@@ -0,0 +1,104 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    ARM/compilers/GCC/vectors.s

+ * @brief   Interrupt vectors for ARM devices.

+ *

+ * @defgroup ARM_VECTORS ARM Exception Vectors

+ * @{

+ */

+

+#if defined(__DOXYGEN__)

+/**

+ * @brief   Unhandled exceptions handler.

+ * @details Any undefined exception vector points to this function by default.

+ *          This function simply stops the system into an infinite loop.

+ * @note    The default implementation is a weak symbol, the application

+ *          can override the default implementation.

+ *

+ * @notapi

+ */

+void _unhandled_exception(void) {}

+#endif

+

+#if !defined(__DOXYGEN__)

+

+                .section .vectors, "ax"

+                .code   32

+                .balign 4

+

+/*

+ * System entry points.

+ */

+                .global _start

+_start:

+                ldr     pc, _reset

+                ldr     pc, _undefined

+                ldr     pc, _swi

+                ldr     pc, _prefetch

+                ldr     pc, _abort

+                nop

+                ldr     pc, _irq

+                ldr     pc, _fiq

+

+_reset:

+                .word   Boot_Handler

+_undefined:

+                .word   Und_Handler

+_swi:

+                .word   Swi_Handler

+_prefetch:

+                .word   Prefetch_Handler

+_abort:

+                .word   Abort_Handler

+_fiq:

+                .word   Fiq_Handler

+_irq:

+                .word   Irq_Handler

+

+/*

+ * Default exceptions handlers. The handlers are declared weak in order to be

+ * replaced by the real handling code. Everything is defaulted to an infinite

+ * loop.

+ */

+                .weak   Reset_Handler

+Reset_Handler:

+                .weak   Und_Handler

+Und_Handler:

+                .weak   Swi_Handler

+Swi_Handler:

+                .weak   Prefetch_Handler

+Prefetch_Handler:

+                .weak   Abort_Handler

+Abort_Handler:

+                .weak   Fiq_Handler

+Fiq_Handler:

+                .weak   Irq_Handler

+Irq_Handler:

+                .weak   _unhandled_exception

+_unhandled_exception:

+                b       _unhandled_exception

+/*

+ * Default boot handler. Jump to Reset_Handler.

+ */

+                .section .boot, "ax"

+                .weak	Boot_Handler

+Boot_Handler:

+                b       Reset_Handler

+#endif

+

+/** @} */