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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-01-06 09:48:54 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-01-06 09:48:54 +0000
commit6b2d2c0a2c240924afae8d5fa5e48641fb92f0c8 (patch)
treee43029c28d660d62e769e1edf20935ddb1154ca6 /demos
parent0963df484eefb886d1462db9693b76560edf5473 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2589 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos')
-rw-r--r--demos/ARMCM3-STM32F103/Makefile204
-rw-r--r--demos/ARMCM3-STM32F103/ch.ld113
-rw-r--r--demos/ARMCM3-STM32F103/chconf.h507
-rw-r--r--demos/ARMCM3-STM32F103/codeblocks/ch/ch.cbp306
-rw-r--r--demos/ARMCM3-STM32F103/codeblocks/ch/ch.workspace6
-rw-r--r--demos/ARMCM3-STM32F103/halconf.h259
-rw-r--r--demos/ARMCM3-STM32F103/iar/ch.ewp2152
-rw-r--r--demos/ARMCM3-STM32F103/iar/ch.eww10
-rw-r--r--demos/ARMCM3-STM32F103/iar/ch.icf37
-rw-r--r--demos/ARMCM3-STM32F103/keil/ch.uvopt1989
-rw-r--r--demos/ARMCM3-STM32F103/keil/ch.uvproj1040
-rw-r--r--demos/ARMCM3-STM32F103/main.c73
-rw-r--r--demos/ARMCM3-STM32F103/mcuconf.h120
-rw-r--r--demos/ARMCM3-STM32F103/readme.txt28
-rw-r--r--demos/ARMCM3-STM32F103/ride7/ch.rapp140
-rw-r--r--demos/ARMCM3-STM32F103/ride7/ch.rprj4
16 files changed, 6988 insertions, 0 deletions
diff --git a/demos/ARMCM3-STM32F103/Makefile b/demos/ARMCM3-STM32F103/Makefile
new file mode 100644
index 000000000..74f23b072
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/Makefile
@@ -0,0 +1,204 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable register caching optimization (read documentation).
+ifeq ($(USE_CURRP_CACHING),)
+ USE_CURRP_CACHING = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Enable this if you really want to use the STM FWLib.
+ifeq ($(USE_FWLIB),)
+ USE_FWLIB = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT= ch.ld
+
+# Imported source files
+CHIBIOS = ../..
+include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
+include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk
+include $(CHIBIOS)/os/kernel/kernel.mk
+include $(CHIBIOS)/test/test.mk
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ $(TESTSRC) \
+ $(HALSRC) \
+ $(PLATFORMSRC) \
+ $(BOARDSRC) \
+ $(CHIBIOS)/os/various/evtimer.c \
+ $(CHIBIOS)/os/various/syscalls.c \
+ main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
+ $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m3
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+ifeq ($(USE_FWLIB),yes)
+ include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
+ CSRC += $(STM32SRC)
+ INCDIR += $(STM32INC)
+ USE_OPT += -DUSE_STDPERIPH_DRIVER
+endif
+
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/demos/ARMCM3-STM32F103/ch.ld b/demos/ARMCM3-STM32F103/ch.ld
new file mode 100644
index 000000000..44f494121
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/ch.ld
@@ -0,0 +1,113 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * ST32F103 memory setup.
+ */
+__main_stack_size__ = 0x0400;
+__process_stack_size__ = 0x0400;
+__stacks_total_size__ = __main_stack_size__ + __process_stack_size__;
+
+MEMORY
+{
+ flash : org = 0x08000000, len = 128k
+ ram : org = 0x20000000, len = 20k
+}
+
+__ram_start__ = ORIGIN(ram);
+__ram_size__ = LENGTH(ram);
+__ram_end__ = __ram_start__ + __ram_size__;
+
+SECTIONS
+{
+ . = 0;
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ _text = .;
+ KEEP(*(vectors))
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.glue_7t)
+ *(.glue_7)
+ *(.gcc*)
+ } > flash
+
+ .ctors :
+ {
+ PROVIDE(_ctors_start_ = .);
+ KEEP(*(SORT(.ctors.*)))
+ KEEP(*(.ctors))
+ PROVIDE(_ctors_end_ = .);
+ } > flash
+
+ .dtors :
+ {
+ PROVIDE(_dtors_start_ = .);
+ KEEP(*(SORT(.dtors.*)))
+ KEEP(*(.dtors))
+ PROVIDE(_dtors_end_ = .);
+ } > flash
+
+ .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
+
+ __exidx_start = .;
+ .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
+ __exidx_end = .;
+
+ .eh_frame_hdr : {*(.eh_frame_hdr)}
+
+ .eh_frame : ONLY_IF_RO {*(.eh_frame)}
+
+ . = ALIGN(4);
+ _etext = .;
+ _textdata = _etext;
+
+ .data :
+ {
+ _data = .;
+ *(.data)
+ . = ALIGN(4);
+ *(.data.*)
+ . = ALIGN(4);
+ *(.ramtext)
+ . = ALIGN(4);
+ _edata = .;
+ } > ram AT > flash
+
+ .bss :
+ {
+ _bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ *(.bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ _bss_end = .;
+ } > ram
+}
+
+PROVIDE(end = .);
+_end = .;
+
+__heap_base__ = _end;
+__heap_end__ = __ram_end__ - __stacks_total_size__;
diff --git a/demos/ARMCM3-STM32F103/chconf.h b/demos/ARMCM3-STM32F103/chconf.h
new file mode 100644
index 000000000..3353391ca
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/chconf.h
@@ -0,0 +1,507 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/* Kernel parameters. */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 1000
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 20
+#endif
+
+/**
+ * @brief Nested locks.
+ * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
+ * operations is allowed.<br>
+ * For performance and code size reasons the recommended setting
+ * is to leave this option disabled.<br>
+ * You may use this option if you need to merge ChibiOS/RT with
+ * external libraries that require nested lock/unlock operations.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
+#define CH_USE_NESTED_LOCKS FALSE
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_COREMEM.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 0
+#endif
+
+/*===========================================================================*/
+/* Performance options. */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED TRUE
+#endif
+
+/**
+ * @brief Exotic optimization.
+ * @details If defined then a CPU register is used as storage for the global
+ * @p currp variable. Caching this variable in a register greatly
+ * improves both space and time OS efficiency. A side effect is that
+ * one less register has to be saved during the context switch
+ * resulting in lower RAM usage and faster context switch.
+ *
+ * @note This option is only usable with the GCC compiler and is only useful
+ * on processors with many registers like ARM cores.
+ * @note If this option is enabled then ALL the libraries linked to the
+ * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
+ * -ffixed-@<reg@>.
+ * @note This option must be enabled in the Makefile, it is listed here for
+ * documentation only.
+ */
+#if defined(__DOXYGEN__)
+#define CH_CURRP_REGISTER_CACHE "reg"
+#endif
+
+/*===========================================================================*/
+/* Subsystem options. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/*===========================================================================*/
+/* Debug options. */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS FALSE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS FALSE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE FALSE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS FALSE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/*===========================================================================*/
+/* Kernel hooks. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/ARMCM3-STM32F103/codeblocks/ch/ch.cbp b/demos/ARMCM3-STM32F103/codeblocks/ch/ch.cbp
new file mode 100644
index 000000000..b3bffac75
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/codeblocks/ch/ch.cbp
@@ -0,0 +1,306 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
+<CodeBlocks_project_file>
+ <FileVersion major="1" minor="6" />
+ <Project>
+ <Option title="ARMCM3-STM32F103-GCC" />
+ <Option pch_mode="2" />
+ <Option compiler="armelfgcc" />
+ <Build>
+ <Target title="Debug">
+ <Option output="bin\Debug\ch.elf" prefix_auto="0" extension_auto="0" />
+ <Option working_dir="" />
+ <Option object_output="obj\Debug\" />
+ <Option type="5" />
+ <Option compiler="armelfgcc" />
+ </Target>
+ <Target title="Release">
+ <Option output="bin\Release\ch.elf" prefix_auto="0" extension_auto="0" />
+ <Option working_dir="" />
+ <Option object_output="obj\Release\" />
+ <Option type="5" />
+ <Option compiler="armelfgcc" />
+ <Compiler>
+ <Add option="-O2" />
+ </Compiler>
+ </Target>
+ <Environment>
+ <Variable name="NAME" value="cortex-m3" />
+ </Environment>
+ </Build>
+ <Compiler>
+ <Add option="-mthumb" />
+ <Add option="-mno-thumb-interwork" />
+ <Add option="-Wall" />
+ <Add option="-g" />
+ <Add option="-mcpu=cortex-m3" />
+ <Add option="-fomit-frame-pointer" />
+ <Add option="-falign-functions=16" />
+ <Add option="-Wextra" />
+ <Add option="-Wstrict-prototypes" />
+ <Add option="-ffunction-sections" />
+ <Add option="-fdata-sections" />
+ <Add directory="..\..\..\ARMCM3-STM32F103-GCC" />
+ <Add directory="..\..\..\..\os\kernel\include" />
+ <Add directory="..\..\..\..\os\ports\GCC\ARMCMx" />
+ <Add directory="..\..\..\..\os\ports\GCC\ARMCMx\STM32" />
+ <Add directory="..\..\..\..\os\ports\GCC\ARMCMx\cmsis" />
+ <Add directory="..\..\..\..\os\hal\include" />
+ <Add directory="..\..\..\..\os\hal\platforms\STM32" />
+ <Add directory="..\..\..\..\boards\OLIMEX_STM32_P103" />
+ <Add directory="..\..\..\..\test" />
+ </Compiler>
+ <Linker>
+ <Add option="-nostartfiles" />
+ <Add option="-T../../ch.ld" />
+ <Add option="-Wl,-Map=$exe_dir/ch.map,--cref,--no-warn-mismatch,--gc-sections" />
+ </Linker>
+ <ExtraCommands>
+ <Add after="arm-none-eabi-objcopy -O ihex $exe_dir/ch.elf $exe_dir/ch.hex" />
+ <Add after="arm-none-eabi-objcopy -O binary $exe_dir/ch.elf $exe_dir/ch.bin" />
+ <Mode after="always" />
+ </ExtraCommands>
+ <Unit filename="..\..\..\..\boards\OLIMEX_STM32_P103\board.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\boards\OLIMEX_STM32_P103\board.h" />
+ <Unit filename="..\..\main.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\include\adc.h" />
+ <Unit filename="..\..\..\..\os\hal\include\can.h" />
+ <Unit filename="..\..\..\..\os\hal\include\hal.h" />
+ <Unit filename="..\..\..\..\os\hal\include\i2c.h" />
+ <Unit filename="..\..\..\..\os\hal\include\mac.h" />
+ <Unit filename="..\..\..\..\os\hal\include\mii.h" />
+ <Unit filename="..\..\..\..\os\hal\include\mmc_spi.h" />
+ <Unit filename="..\..\..\..\os\hal\include\pal.h" />
+ <Unit filename="..\..\..\..\os\hal\include\pwm.h" />
+ <Unit filename="..\..\..\..\os\hal\include\serial.h" />
+ <Unit filename="..\..\..\..\os\hal\include\spi.h" />
+ <Unit filename="..\..\..\..\os\hal\include\uart.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\adc_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\adc_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\can_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\can_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\hal_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\hal_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\hal_lld_f103.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\hal_lld_f105_f107.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\pal_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\pal_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\pwm_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\pwm_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\serial_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\serial_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\spi_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\spi_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\stm32_dma.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\stm32_dma.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\stm32f10x.h" />
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\uart_lld.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\platforms\STM32\uart_lld.h" />
+ <Unit filename="..\..\..\..\os\hal\src\adc.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\can.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\hal.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\i2c.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\mac.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\mmc_spi.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\pal.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\pwm.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\serial.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\spi.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\hal\src\uart.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\include\ch.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chbsem.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chcond.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chdebug.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chevents.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chfiles.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chheap.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chinline.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chioch.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chlists.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chmboxes.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chmemcore.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chmempools.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chmsg.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chmtx.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chqueues.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chregistry.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chschd.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chsem.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chstreams.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chsys.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chthreads.h" />
+ <Unit filename="..\..\..\..\os\kernel\include\chvt.h" />
+ <Unit filename="..\..\..\..\os\kernel\src\chcond.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chdebug.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chevents.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chheap.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chlists.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chmboxes.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chmemcore.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chmempools.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chmsg.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chmtx.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chqueues.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chregistry.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chschd.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chsem.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chsys.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chthreads.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\kernel\src\chvt.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\STM32\cmparams.h" />
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\STM32\vectors_md.s" />
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\chcore.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\chcore.h" />
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\chcore_v7m.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\chcore_v7m.h" />
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\chtypes.h" />
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\cmsis\core_cm0.h" />
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\crt0_v7m.s" />
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\nvic.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\os\ports\GCC\ARMCMx\nvic.h" />
+ <Unit filename="..\..\..\..\test\test.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\test.dox" />
+ <Unit filename="..\..\..\..\test\test.h" />
+ <Unit filename="..\..\..\..\test\test.mk" />
+ <Unit filename="..\..\..\..\test\testbmk.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testbmk.h" />
+ <Unit filename="..\..\..\..\test\testdyn.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testdyn.h" />
+ <Unit filename="..\..\..\..\test\testevt.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testevt.h" />
+ <Unit filename="..\..\..\..\test\testheap.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testheap.h" />
+ <Unit filename="..\..\..\..\test\testmbox.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testmbox.h" />
+ <Unit filename="..\..\..\..\test\testmsg.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testmsg.h" />
+ <Unit filename="..\..\..\..\test\testmtx.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testmtx.h" />
+ <Unit filename="..\..\..\..\test\testpools.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testpools.h" />
+ <Unit filename="..\..\..\..\test\testqueues.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testqueues.h" />
+ <Unit filename="..\..\..\..\test\testsem.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testsem.h" />
+ <Unit filename="..\..\..\..\test\testthd.c">
+ <Option compilerVar="CC" />
+ </Unit>
+ <Unit filename="..\..\..\..\test\testthd.h" />
+ <Extensions>
+ <code_completion />
+ <debugger>
+ <remote_debugging target="Debug">
+ <options conn_type="0" serial_baud="115200" ip_address="127.0.0.1" ip_port="3333" />
+ </remote_debugging>
+ <remote_debugging target="Release">
+ <options conn_type="0" serial_baud="115200" ip_address="127.0.0.1" ip_port="3333" />
+ </remote_debugging>
+ </debugger>
+ </Extensions>
+ </Project>
+</CodeBlocks_project_file>
diff --git a/demos/ARMCM3-STM32F103/codeblocks/ch/ch.workspace b/demos/ARMCM3-STM32F103/codeblocks/ch/ch.workspace
new file mode 100644
index 000000000..bee5a82f6
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/codeblocks/ch/ch.workspace
@@ -0,0 +1,6 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
+<CodeBlocks_workspace_file>
+ <Workspace title="Workspace">
+ <Project filename="ch.cbp" active="1" />
+ </Workspace>
+</CodeBlocks_workspace_file>
diff --git a/demos/ARMCM3-STM32F103/halconf.h b/demos/ARMCM3-STM32F103/halconf.h
new file mode 100644
index 000000000..890f3896b
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/halconf.h
@@ -0,0 +1,259 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Block size for MMC transfers.
+ */
+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
+#define MMC_SECTOR_SIZE 512
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/**
+ * @brief Number of positive insertion queries before generating the
+ * insertion event.
+ */
+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
+#define MMC_POLLING_INTERVAL 10
+#endif
+
+/**
+ * @brief Interval, in milliseconds, between insertion queries.
+ */
+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
+#define MMC_POLLING_DELAY 10
+#endif
+
+/**
+ * @brief Uses the SPI polled API for small data transfers.
+ * @details Polled transfers usually improve performance because it
+ * saves two context switches and interrupt servicing. Note
+ * that this option has no effect on large transfers which
+ * are always performed using DMAs/IRQs.
+ */
+#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
+#define MMC_USE_SPI_POLLING TRUE
+#endif
+
+/*===========================================================================*/
+/* PAL driver related settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* PWM driver related settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings. */
+/*===========================================================================*/
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/ARMCM3-STM32F103/iar/ch.ewp b/demos/ARMCM3-STM32F103/iar/ch.ewp
new file mode 100644
index 000000000..b5733a58c
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/iar/ch.ewp
@@ -0,0 +1,2152 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>2</fileVersion>
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+ <name>Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
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+ <name>Input description</name>
+ <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+ </option>
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+ <name>Output description</name>
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+ <name>GRuntimeLibSelect</name>
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+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
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+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
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+ <name>OGProductVersion</name>
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+ </option>
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+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Release</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>0</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
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+ <version>18</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>ExePath</name>
+ <state>Release\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>Release\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>Release\List</state>
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+ <option>
+ <name>Variant</name>
+ <version>17</version>
+ <state>37</state>
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+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input variant</name>
+ <version>1</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+ </option>
+ <option>
+ <name>Output variant</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FPU</name>
+ <version>1</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>5.10.0.159</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>6.10.1.52170</state>
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+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32F10xxB ST STM32F10xxB</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>26</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>CCDefines</name>
+ <state>NDEBUG</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>1111111</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state>$PROJ_DIR$\..\</state>
+ <state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
+ <state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
+ <state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
+ <state>$PROJ_DIR$\..\..\..\os\hal\include</state>
+ <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
+ <state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103</state>
+ <state>$PROJ_DIR$\..\..\..\test</state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IInterwork2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>CCPosIndRopi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccLang</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCppDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccExceptions</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccRTTI</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccRelaxedFpPrecision</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>8</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
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+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
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+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>AMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
+ <state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103</state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>2</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>ch.hex</state>
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+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>11</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>ch.out</state>
+ </option>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
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+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
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+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
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+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
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+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
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+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
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+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
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+ <option>
+ <name>IlinkMapFile</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLogFile</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLogModule</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLogSection</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\ch.icf</state>
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+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
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+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
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+ <name>IlinkTreatAsRem</name>
+ <state></state>
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+ <name>IlinkTreatAsWarn</name>
+ <state></state>
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+ <name>IlinkTreatAsErr</name>
+ <state></state>
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+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
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+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
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+ <name>DoFill</name>
+ <state>0</state>
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+ <name>FillerByte</name>
+ <state>0xFF</state>
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+ <name>FillerStart</name>
+ <state>0x0</state>
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+ <name>FillerEnd</name>
+ <state>0x0</state>
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+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
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+ <name>CrcAlign</name>
+ <state>1</state>
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+ <name>CrcAlgo</name>
+ <state>1</state>
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+ <name>CrcPoly</name>
+ <state>0x11021</state>
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+ <name>CrcCompl</name>
+ <version>0</version>
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+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
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+ <name>CrcInitialValue</name>
+ <state>0x0</state>
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+ <name>DoCrc</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <group>
+ <name>board</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103\board.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103\board.h</name>
+ </file>
+ </group>
+ <group>
+ <name>os</name>
+ <group>
+ <name>hal</name>
+ <group>
+ <name>include</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\adc.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\can.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\hal.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\i2c.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\mac.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\mii.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\mmc_spi.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\pal.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\pwm.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\serial.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\spi.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\include\uart.h</name>
+ </file>
+ </group>
+ <group>
+ <name>src</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\adc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\can.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\i2c.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\mac.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\pal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\pwm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\serial.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\spi.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\src\uart.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>kernel</name>
+ <group>
+ <name>include</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\ch.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chcond.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chdebug.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chdynamic.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chevents.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chheap.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chinline.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chioch.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chlists.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmboxes.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmemcore.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmempools.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmsg.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chmtx.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chqueues.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chregistry.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chschd.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chsem.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chstreams.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chsys.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chthreads.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\include\chvt.h</name>
+ </file>
+ </group>
+ <group>
+ <name>src</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chcond.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chevents.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chheap.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chlists.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chmtx.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chqueues.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chregistry.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chschd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chsem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chsys.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chthreads.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\kernel\src\chvt.c</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>platform</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\core_cm3.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f100.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f105_f107.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32f10x.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.h</name>
+ </file>
+ </group>
+ <group>
+ <name>port</name>
+ <group>
+ <name>STM32</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\cmparams.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\vectors.s</name>
+ </file>
+ </group>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chtypes.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\cstartup.s</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.h</name>
+ </file>
+ </group>
+ </group>
+ <group>
+ <name>test</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\test.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\test.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testbmk.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testbmk.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testdyn.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testdyn.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testevt.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testevt.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testheap.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testheap.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmbox.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmbox.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmsg.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmsg.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmtx.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testmtx.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testpools.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testpools.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testqueues.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testqueues.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testsem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testsem.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testthd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\test\testthd.h</name>
+ </file>
+ </group>
+ <file>
+ <name>$PROJ_DIR$\..\chconf.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\halconf.h</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\main.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\mcuconf.h</name>
+ </file>
+</project>
+
+
diff --git a/demos/ARMCM3-STM32F103/iar/ch.eww b/demos/ARMCM3-STM32F103/iar/ch.eww
new file mode 100644
index 000000000..f9b3b2000
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/iar/ch.eww
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\ch.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/demos/ARMCM3-STM32F103/iar/ch.icf b/demos/ARMCM3-STM32F103/iar/ch.icf
new file mode 100644
index 000000000..c14393d39
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/iar/ch.icf
@@ -0,0 +1,37 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+/* Size of the Process Stack.*/
+define symbol __ICFEDIT_size_pstack__ = 0x400;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block PSTACK with alignment = 8, size = __ICFEDIT_size_pstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+define block SYSHEAP with alignment = 8, size = 0 { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section .intvec };
+place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { block PSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};
+
+define exported symbol __heap_end__ = end(RAM_region) + 1;
diff --git a/demos/ARMCM3-STM32F103/keil/ch.uvopt b/demos/ARMCM3-STM32F103/keil/ch.uvopt
new file mode 100644
index 000000000..341c325d7
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/keil/ch.uvopt
@@ -0,0 +1,1989 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>Demo</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>8000000</CLKADS>
+ <OPTTT>
+ <gFlags>1</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>1</RunSim>
+ <RunTarget>0</RunTarget>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\lst\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>1</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>255</CpuCode>
+ <Books>
+ <Book>
+ <Number>0</Number>
+ <Title>Reference Manual</Title>
+ <Path>DATASHTS\ST\STM32F10xxx.PDF</Path>
+ </Book>
+ </Books>
+ <DllOpt>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments></SimDllArguments>
+ <SimDlgDllName>DARMSTM.DLL</SimDlgDllName>
+ <SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments></TargetDllArguments>
+ <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName>
+ <TargetDlgDllArguments>-pSTM32F103RB</TargetDlgDllArguments>
+ </DllOpt>
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diff --git a/demos/ARMCM3-STM32F103/keil/ch.uvproj b/demos/ARMCM3-STM32F103/keil/ch.uvproj
new file mode 100644
index 000000000..452c4255f
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/keil/ch.uvproj
@@ -0,0 +1,1040 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+ <SchemaVersion>1.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>Demo</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>STM32F103RB</Device>
+ <Vendor>STMicroelectronics</Vendor>
+ <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile>"STARTUP\ST\STM32F10x.s" ("STM32 Startup Code")</StartupFile>
+ <FlashDriverDll>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</FlashDriverDll>
+ <DeviceId>4231</DeviceId>
+ <RegisterFile>stm32f10x_lib.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile></SFDFile>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath>ST\STM32F10x\</RegisterFilePath>
+ <DBRegisterFilePath>ST\STM32F10x\</DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\obj\</OutputDirectory>
+ <OutputName>ch</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\lst\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
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+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
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+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments></SimDllArguments>
+ <SimDlgDll>DARMSTM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments></TargetDllArguments>
+ <TargetDlgDll>TARMSTM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pSTM32F103RB</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
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+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>0</UseSimulator>
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+ <RunToMain>1</RunToMain>
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+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ </Simulator>
+ <Target>
+ <UseTarget>1</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>8</TargetSelection>
+ <SimDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ <Driver>STLink\ST-LINKIII-KEIL.dll</Driver>
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4100</DriverSelection>
+ </Flash1>
+ <Flash2>STLink\ST-LINKIII-KEIL.dll</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
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+ <AdsLsun>1</AdsLsun>
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+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M3"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
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+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
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+ <uocXRam>0</uocXRam>
+ <RvdsVP>0</RvdsVP>
+ <hadIRAM2>0</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>1</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
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+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
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+ </Ocm2>
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+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
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+ <Cads>
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+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
+ <Undefine></Undefine>
+ <IncludePath>..\..\ARMCM3-STM32F103-GCC;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\test</IncludePath>
+ </VariousControls>
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+ <Define></Define>
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+ <IncludePath>..\..\..\boards\OLIMEX_STM32_P103;..\..\..\os\ports\RVCT\ARMCMx\STM32</IncludePath>
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+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
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+ </File>
+ <File>
+ <FileName>chregistry.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chregistry.h</FilePath>
+ </File>
+ <File>
+ <FileName>chschd.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chschd.h</FilePath>
+ </File>
+ <File>
+ <FileName>chsem.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chsem.h</FilePath>
+ </File>
+ <File>
+ <FileName>chstreams.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chstreams.h</FilePath>
+ </File>
+ <File>
+ <FileName>chsys.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chsys.h</FilePath>
+ </File>
+ <File>
+ <FileName>chthreads.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chthreads.h</FilePath>
+ </File>
+ <File>
+ <FileName>chvt.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\kernel\include\chvt.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>hal</GroupName>
+ <Files>
+ <File>
+ <FileName>adc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\adc.c</FilePath>
+ </File>
+ <File>
+ <FileName>can.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\can.c</FilePath>
+ </File>
+ <File>
+ <FileName>hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\hal.c</FilePath>
+ </File>
+ <File>
+ <FileName>i2c.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\i2c.c</FilePath>
+ </File>
+ <File>
+ <FileName>mac.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\mac.c</FilePath>
+ </File>
+ <File>
+ <FileName>mmc_spi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\mmc_spi.c</FilePath>
+ </File>
+ <File>
+ <FileName>pal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\pal.c</FilePath>
+ </File>
+ <File>
+ <FileName>pwm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\pwm.c</FilePath>
+ </File>
+ <File>
+ <FileName>serial.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\serial.c</FilePath>
+ </File>
+ <File>
+ <FileName>spi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\spi.c</FilePath>
+ </File>
+ <File>
+ <FileName>uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\src\uart.c</FilePath>
+ </File>
+ <File>
+ <FileName>adc.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\adc.h</FilePath>
+ </File>
+ <File>
+ <FileName>can.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\can.h</FilePath>
+ </File>
+ <File>
+ <FileName>hal.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\hal.h</FilePath>
+ </File>
+ <File>
+ <FileName>i2c.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\i2c.h</FilePath>
+ </File>
+ <File>
+ <FileName>mac.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\mac.h</FilePath>
+ </File>
+ <File>
+ <FileName>mii.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\mii.h</FilePath>
+ </File>
+ <File>
+ <FileName>mmc_spi.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\mmc_spi.h</FilePath>
+ </File>
+ <File>
+ <FileName>pal.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\pal.h</FilePath>
+ </File>
+ <File>
+ <FileName>pwm.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\pwm.h</FilePath>
+ </File>
+ <File>
+ <FileName>serial.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\serial.h</FilePath>
+ </File>
+ <File>
+ <FileName>spi.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\spi.h</FilePath>
+ </File>
+ <File>
+ <FileName>uart.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\include\uart.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>platform</GroupName>
+ <Files>
+ <File>
+ <FileName>adc_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>can_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\can_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>hal_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>pal_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>pwm_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>serial_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>spi_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_dma.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.c</FilePath>
+ </File>
+ <File>
+ <FileName>uart_lld.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.c</FilePath>
+ </File>
+ <File>
+ <FileName>adc_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>can_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\can_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>core_cm3.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\core_cm3.h</FilePath>
+ </File>
+ <File>
+ <FileName>hal_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>hal_lld_f103.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</FilePath>
+ </File>
+ <File>
+ <FileName>pal_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>pwm_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>serial_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>spi_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
+ </File>
+ <File>
+ <FileName>stm32_dma.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.h</FilePath>
+ </File>
+ <File>
+ <FileName>stm32f10x.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\stm32f10x.h</FilePath>
+ </File>
+ <File>
+ <FileName>uart_lld.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>test</GroupName>
+ <Files>
+ <File>
+ <FileName>test.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\test.c</FilePath>
+ </File>
+ <File>
+ <FileName>testbmk.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testbmk.c</FilePath>
+ </File>
+ <File>
+ <FileName>testdyn.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testdyn.c</FilePath>
+ </File>
+ <File>
+ <FileName>testevt.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testevt.c</FilePath>
+ </File>
+ <File>
+ <FileName>testheap.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testheap.c</FilePath>
+ </File>
+ <File>
+ <FileName>testmbox.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testmbox.c</FilePath>
+ </File>
+ <File>
+ <FileName>testmsg.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testmsg.c</FilePath>
+ </File>
+ <File>
+ <FileName>testmtx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testmtx.c</FilePath>
+ </File>
+ <File>
+ <FileName>testpools.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testpools.c</FilePath>
+ </File>
+ <File>
+ <FileName>testqueues.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testqueues.c</FilePath>
+ </File>
+ <File>
+ <FileName>testsem.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testsem.c</FilePath>
+ </File>
+ <File>
+ <FileName>testthd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\test\testthd.c</FilePath>
+ </File>
+ <File>
+ <FileName>test.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\test.h</FilePath>
+ </File>
+ <File>
+ <FileName>testbmk.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testbmk.h</FilePath>
+ </File>
+ <File>
+ <FileName>testdyn.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testdyn.h</FilePath>
+ </File>
+ <File>
+ <FileName>testevt.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testevt.h</FilePath>
+ </File>
+ <File>
+ <FileName>testheap.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testheap.h</FilePath>
+ </File>
+ <File>
+ <FileName>testmbox.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testmbox.h</FilePath>
+ </File>
+ <File>
+ <FileName>testmsg.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testmsg.h</FilePath>
+ </File>
+ <File>
+ <FileName>testmtx.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testmtx.h</FilePath>
+ </File>
+ <File>
+ <FileName>testpools.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testpools.h</FilePath>
+ </File>
+ <File>
+ <FileName>testqueues.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testqueues.h</FilePath>
+ </File>
+ <File>
+ <FileName>testsem.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testsem.h</FilePath>
+ </File>
+ <File>
+ <FileName>testthd.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\test\testthd.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>demo</GroupName>
+ <Files>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\main.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
diff --git a/demos/ARMCM3-STM32F103/main.c b/demos/ARMCM3-STM32F103/main.c
new file mode 100644
index 000000000..671124a42
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/main.c
@@ -0,0 +1,73 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+#include "test.h"
+
+/*
+ * Red LED blinker thread, times are in milliseconds.
+ */
+static WORKING_AREA(waThread1, 128);
+static msg_t Thread1(void *arg) {
+
+ (void)arg;
+ while (TRUE) {
+ palClearPad(IOPORT3, GPIOC_LED);
+ chThdSleepMilliseconds(500);
+ palSetPad(IOPORT3, GPIOC_LED);
+ chThdSleepMilliseconds(500);
+ }
+}
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Activates the serial driver 2 using the driver default configuration.
+ */
+ sdStart(&SD2, NULL);
+
+ /*
+ * Creates the blinker thread.
+ */
+ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+
+ /*
+ * Normal main() thread activity, in this demo it does nothing except
+ * sleeping in a loop and check the button state.
+ */
+ while (TRUE) {
+ if (palReadPad(IOPORT1, GPIOA_BUTTON))
+ TestThread(&SD2);
+ chThdSleepMilliseconds(500);
+ }
+}
diff --git a/demos/ARMCM3-STM32F103/mcuconf.h b/demos/ARMCM3-STM32F103/mcuconf.h
new file mode 100644
index 000000000..4e640b93f
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/mcuconf.h
@@ -0,0 +1,120 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * STM32 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV2
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_ADCPRE STM32_ADCPRE_DIV4
+#define STM32_USBPRE STM32_USBPRE_DIV1P5
+#define STM32_MCO STM32_MCO_NOCLOCK
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_ADC1_DMA_PRIORITY 3
+#define STM32_ADC_ADC1_IRQ_PRIORITY 5
+#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt()
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 TRUE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_TIM1 TRUE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM5 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 TRUE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 TRUE
+#define STM32_SPI_USE_SPI2 TRUE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 2
+#define STM32_SPI_SPI2_DMA_PRIORITY 2
+#define STM32_SPI_SPI3_DMA_PRIORITY 2
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt()
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 TRUE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt()
diff --git a/demos/ARMCM3-STM32F103/readme.txt b/demos/ARMCM3-STM32F103/readme.txt
new file mode 100644
index 000000000..5329bfb35
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/readme.txt
@@ -0,0 +1,28 @@
+*****************************************************************************
+** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an Olimex STM32-P103 board.
+
+** The Demo **
+
+The demo flashes the board LED using a thread, by pressing the button located
+on the board the test procedure is activated with output on the serial port
+COM2 (USART2).
+
+** Build Procedure **
+
+The demo has been tested by using the free Codesourcery GCC-based toolchain,
+YAGARTO and an experimental WinARM build including GCC 4.3.0.
+Just modify the TRGT line in the makefile in order to use different GCC ports.
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are copyright of
+ST Microelectronics and are licensed under a different license.
+Also note that not all the files present in the ST library are distribited
+with ChibiOS/RT, you can find the whole library on the ST web site:
+
+ http://www.st.com
diff --git a/demos/ARMCM3-STM32F103/ride7/ch.rapp b/demos/ARMCM3-STM32F103/ride7/ch.rapp
new file mode 100644
index 000000000..e72957e50
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/ride7/ch.rapp
@@ -0,0 +1,140 @@
+
+<ApplicationBuild Header="ch" Extern=".\ch.rapp" Path=".\ch.rapp" OutputFile=".\ch.elf" sate="98" AsyncBuild="" >
+ <Group Header="port" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeASM Path="..\..\..\os\ports\GCC\ARMCMx\crt0_v7m.s" Header="crt0_v7m.s" Marker="-1" AsyncBuild="" OutputFile=".\bin\crt0_v7m.o" sate="0" />
+ <NodeASM Path="..\..\..\os\ports\GCC\ARMCMx\STM32\vectors_md.s" Header="vectors_md.s" Marker="-1" AsyncBuild="" OutputFile=".\bin\vectors_md.o" sate="0" />
+ <NodeC Path="..\..\..\os\ports\GCC\ARMCMx\nvic.c" Header="nvic.c" Marker="-1" AsyncBuild="" OutputFile=".\bin\nvic.o" sate="0" />
+ <NodeC Path="..\..\..\os\ports\GCC\ARMCMx\chcore.c" Header="chcore.c" Marker="-1" AsyncBuild="" OutputFile=".\bin\chcore.o" sate="0" />
+ <NodeC Path="..\..\..\os\ports\GCC\ARMCMx\chcore_v7m.c" Header="chcore_v7m.c" Marker="-1" AsyncBuild="" OutputFile=".\bin\chcore_v7m.o" sate="0" />
+
+ </Group>
+ <Group Header="kernel" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\..\os\kernel\src\chcond.c" Header="chcond.c" Marker="-1" OutputFile=".\bin\chcond.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\kernel\src\chdebug.c" Header="chdebug.c" Marker="-1" OutputFile=".\bin\chdebug.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\kernel\src\chevents.c" Header="chevents.c" Marker="-1" OutputFile=".\bin\chevents.o" sate="0" AsyncBuild="" />
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+ <NodeC Path="..\..\..\os\kernel\src\chregistry.c" Header="chregistry.c" Marker="-1" OutputFile=".\bin\chregistry.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\kernel\src\chschd.c" Header="chschd.c" Marker="-1" OutputFile=".\bin\chschd.o" sate="0" AsyncBuild="" />
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+ <NodeC Path="..\..\..\os\kernel\src\chvt.c" Header="chvt.c" Marker="-1" OutputFile=".\bin\chvt.o" sate="0" AsyncBuild="" />
+
+ </Group>
+ <Group Header="hal" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\..\os\hal\src\adc.c" Header="adc.c" Marker="-1" OutputFile=".\bin\adc.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\can.c" Header="can.c" Marker="-1" OutputFile=".\bin\can.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\hal.c" Header="hal.c" Marker="-1" OutputFile=".\bin\hal.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\mac.c" Header="mac.c" Marker="-1" OutputFile=".\bin\mac.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\mmc_spi.c" Header="mmc_spi.c" Marker="-1" OutputFile=".\bin\mmc_spi.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\pal.c" Header="pal.c" Marker="-1" OutputFile=".\bin\pal.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\pwm.c" Header="pwm.c" Marker="-1" OutputFile=".\bin\pwm.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\serial.c" Header="serial.c" Marker="-1" OutputFile=".\bin\serial.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\src\spi.c" Header="spi.c" Marker="-1" OutputFile=".\bin\spi.o" sate="0" AsyncBuild="" />
+ <Group Header="platform" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
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+ <NodeC Path="..\..\..\os\hal\platforms\STM32\serial_lld.c" Header="serial_lld.c" Marker="-1" OutputFile=".\bin\serial_lld.o" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\..\os\hal\platforms\STM32\spi_lld.c" Header="spi_lld.c" Marker="-1" OutputFile=".\bin\spi_lld.o" sate="0" AsyncBuild="" />
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+
+ </Group>
+
+ </Group>
+ <Group Header="board" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\..\boards\OLIMEX_STM32_P103\board.c" Header="board.c" Marker="-1" OutputFile=".\bin\board.o" sate="0" AsyncBuild="" />
+
+ </Group>
+ <Group Header="test" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\..\test\test.c" Header="test.c" Marker="-1" OutputFile=".\bin\test.o" sate="0" AsyncBuild="" />
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+ <NodeC Path="..\..\..\test\testqueues.c" Header="testqueues.c" Marker="-1" OutputFile=".\bin\testqueues.o" sate="0" AsyncBuild="" />
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+ <NodeC Path="..\..\..\test\testthd.c" Header="testthd.c" Marker="-1" OutputFile=".\bin\testthd.o" sate="0" AsyncBuild="" />
+
+ </Group>
+ <NodeC Path="..\main.c" Header="main.c" Marker="-1" OutputFile=".\bin\main.o" sate="0" AsyncBuild="" />
+ <Options>
+ <Config Header="Standard" >
+ <Set Header="ApplicationBuild" >
+ <Section Header="General" >
+ <Property Header="TargetFamily" Value="ARM" />
+
+ </Section>
+ <Section Header="Directories" >
+ <Property Header="IncDir" Value="..;$(RkitLib)\ARM\include;..\..\..\os\kernel\include;..\..\..\os\ports\GCC\ARMCMx;..\..\..\os\ports\GCC\ARMCMx\cmsis;..\..\..\os\ports\GCC\ARMCMx\STM32;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\test" Removable="1" />
+ <Property Header="ListDir" Value="$(ApplicationDir)\lst" Removable="1" />
+ <Property Header="OutDir" Value="$(ApplicationDir)\bin" Removable="1" />
+ <Property Header="LinkerOutputDir" Value="Application Directory" Removable="1" />
+
+ </Section>
+
+ </Set>
+ <Set Header="Target" >
+ <Section Header="ProcessorARM" >
+ <Property Header="Processor" Value="STM32F103RBT6" />
+
+ </Section>
+ <Section Header="ToolSetARM" >
+ <Property Header="BuildToolSetARM" Value="ARM\GNU.config" Removable="1" />
+
+ </Section>
+ <Section Header="DebugARM" >
+ <Property Header="DebugTool_CORTEX" Value="RLINK_CORTEX" Removable="1" />
+
+ </Section>
+
+ </Set>
+ <Set Header="LD" >
+ <Section Header="Startup" >
+ <Property Header="DEFAULTSTARTUP" Value="No" Removable="1" />
+ <Property Header="File" Value="" Removable="1" />
+
+ </Section>
+ <Section Header="Scripts" >
+ <Property Header="SCRIPTFILES" Value="No" Removable="1" />
+ <Property Header="File" Value="..\ch.ld" Removable="1" />
+
+ </Section>
+ <Section Header="LIB" >
+ <Property Header="UART0PUTC" Value="0" Removable="1" />
+ <Property Header="STM32LIB" Value="0" Removable="1" />
+
+ </Section>
+ <Section Header="More" >
+ <Property Header="More" Value="-Wl,--no-warn-mismatch" />
+
+ </Section>
+
+ </Set>
+ <Set Header="GCC" >
+ <Section Header="OPTIMIZE" >
+ <Property Header="Optimize" Value="-O2" Removable="1" />
+
+ </Section>
+ <Section Header="More" >
+ <Property Header="More" Value="-Wall; -Wextra; -Wstrict-prototypes; -fomit-frame-pointer; -falign-functions=16; -mabi=apcs-gnu" />
+
+ </Section>
+
+ </Set>
+ </Config>
+ </Options>
+</ApplicationBuild> \ No newline at end of file
diff --git a/demos/ARMCM3-STM32F103/ride7/ch.rprj b/demos/ARMCM3-STM32F103/ride7/ch.rprj
new file mode 100644
index 000000000..d9f866c84
--- /dev/null
+++ b/demos/ARMCM3-STM32F103/ride7/ch.rprj
@@ -0,0 +1,4 @@
+
+<Project Header="Project 'ch'" Path=".\ch.rprj" Project="Yes" OutputFile="" sate="96" ActiveApp="ch" AsyncBuild="" >
+ <ApplicationBuild Header="ch" Extern=".\ch.rapp" Path=".\ch.rapp" OutputFile=".\ch.elf" sate="98" AsyncBuild="" />
+</Project> \ No newline at end of file