diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-17 08:39:44 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-17 08:39:44 +0000 |
| commit | 238790de5f6c1cc0c9db3fd83bf22b4e5b49d5f4 (patch) | |
| tree | d85aa3e91c457d8c5f72848a35cdea3918d27fd9 /demos/SPC5/NIL-SPC560D-EVB | |
| parent | 9116939c516b501c0476ffbb51c4d00f236d7419 (diff) | |
| download | ChibiOS-238790de5f6c1cc0c9db3fd83bf22b4e5b49d5f4.tar.gz ChibiOS-238790de5f6c1cc0c9db3fd83bf22b4e5b49d5f4.tar.bz2 ChibiOS-238790de5f6c1cc0c9db3fd83bf22b4e5b49d5f4.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7036 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/SPC5/NIL-SPC560D-EVB')
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/.cproject | 57 | ||||
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/.project | 43 | ||||
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/Makefile | 174 | ||||
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg | 160 | ||||
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/halconf.h | 319 | ||||
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/main.c | 191 | ||||
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/mcuconf.h | 148 | ||||
| -rw-r--r-- | demos/SPC5/NIL-SPC560D-EVB/nilconf.h | 160 |
8 files changed, 1252 insertions, 0 deletions
diff --git a/demos/SPC5/NIL-SPC560D-EVB/.cproject b/demos/SPC5/NIL-SPC560D-EVB/.cproject new file mode 100644 index 000000000..f8050d811 --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/.cproject @@ -0,0 +1,57 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="0.665946016">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.665946016" moduleId="org.eclipse.cdt.core.settings" name="Default">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactName="${ProjName}" buildProperties="" description="" id="0.665946016" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+ <folderInfo id="0.665946016." name="/" resourcePath="">
+ <toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1131493307" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
+ <targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1131493307.1844928918" name=""/>
+ <builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1106552272" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.libs.1064008669" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.2048166271" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1577341141" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.841305605" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.954135725" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.287919901" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1061591135" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <project id="NIL-SPC560D-DISCOVERY.null.2129661677" name="NIL-SPC560D-DISCOVERY"/>
+ </storageModule>
+ <storageModule moduleId="scannerConfiguration">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+ <scannerConfigBuildInfo instanceId="0.665946016">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
+ </scannerConfigBuildInfo>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+ <storageModule moduleId="refreshScope" versionNumber="2">
+ <configuration configurationName="Default">
+ <resource resourceType="PROJECT" workspacePath="/NIL-SPC560D-DISCOVERY"/>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+</cproject>
diff --git a/demos/SPC5/NIL-SPC560D-EVB/.project b/demos/SPC5/NIL-SPC560D-EVB/.project new file mode 100644 index 000000000..3040bcb83 --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/.project @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+ <name>NIL-SPC560D-DISCOVERY</name>
+ <comment></comment>
+ <projects>
+ </projects>
+ <buildSpec>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+ <triggers>clean,full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+ <triggers>full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ </buildSpec>
+ <natures>
+ <nature>org.eclipse.cdt.core.cnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+ </natures>
+ <linkedResources>
+ <link>
+ <name>board</name>
+ <type>2</type>
+ <locationURI>CHIBIOS/os/hal/boards/ST_EVB_SPC560D</locationURI>
+ </link>
+ <link>
+ <name>os</name>
+ <type>2</type>
+ <locationURI>CHIBIOS/os</locationURI>
+ </link>
+ <link>
+ <name>test</name>
+ <type>2</type>
+ <locationURI>CHIBIOS/test</locationURI>
+ </link>
+ </linkedResources>
+</projectDescription>
diff --git a/demos/SPC5/NIL-SPC560D-EVB/Makefile b/demos/SPC5/NIL-SPC560D-EVB/Makefile new file mode 100644 index 000000000..3e96e763a --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/Makefile @@ -0,0 +1,174 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mno-spe -msoft-float
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data.
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+ USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+ USE_LTO = no
+endif
+
+# If enabled, this option allows to compile the application in VLE mode.
+ifeq ($(USE_VLE),)
+ USE_VLE = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+ USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the optional exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+ USE_EXCEPTIONS_STACKSIZE = 0
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../..
+#include $(CHIBIOS)/os/hal/hal.mk
+#include $(CHIBIOS)/os/hal/boards/ST_EVB_SPC560D/board.mk
+#include $(CHIBIOS)/os/hal/ports/SPC5/SPC560Dxx/platform.mk
+#include $(CHIBIOS)/os/hal/osal/nil/osal.mk
+include $(CHIBIOS)/os/nil/nil.mk
+include $(CHIBIOS)/os/nil/ports/e200/compilers/GCC/mk/port_spc560dxx.mk
+#include $(CHIBIOS)/test/nil/test.mk
+
+# Define linker script file here
+LDSCRIPT= $(PORTLD)/SPC560D40.ld
+
+# C sources here.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ $(TESTSRC) \
+ $(HALSRC) \
+ $(OSALSRC) \
+ $(PLATFORMSRC) \
+ $(BOARDSRC) \
+ $(CHIBIOS)/os/various/chprintf.c \
+ $(CHIBIOS)/os/various/shell.c \
+ main.c
+
+# C++ sources here.
+CPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ $(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \
+ $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames
+MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames
+
+#TRGT = powerpc-eabi-
+TRGT = ppc-vle-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+MOT = $(CP) -O srec
+BIN = $(CP) -O binary
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/ports/e200/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg b/demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg new file mode 100644 index 000000000..ca4a75aa0 --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg @@ -0,0 +1,160 @@ +[Main]
+Signature=UDE_TARGINFO_2.0
+Description=STM XPC560B Mini Module with SPC560D40 (Jtag)
+Description1=PLL set for 48MHz
+Description2=FLASH programming prepared but not enabled
+Description3=Write Filter for BAM Module
+MCUs=Controller0
+Architecture=PowerPC
+Vendor=STM
+Board=XPC560B Mini Module
+
+[Controller0]
+Family=PowerPC
+Type=SPC560D40
+Enabled=1
+IntClock=48000
+MemDevs=BAMWriteFilter
+ExtClock=8000
+
+[Controller0.Core]
+Protocol=PPCJTAG
+Enabled=1
+
+[Controller0.Core.LoadedAddOn]
+UDEMemtool=1
+
+[Controller0.Core.PpcJtagTargIntf]
+PortType=FTDI
+ResetWaitTime=50
+MaxJtagClk=2500
+DoSramInit=1
+UseNexus=1
+AdaptiveJtagPhaseShift=1
+ConnOption=Default
+ChangeJtagClk=10000
+HaltAfterReset=1
+SimioAddr=g_JtagSimioAccess
+FreezeTimers=1
+InvalidTlbOnReset=0
+InvalidateCache=0
+ForceCacheFlush=0
+IgnoreLockedLines=0
+ExecInitCmds=1
+JtagTapNumber=0
+JtagNumOfTaps=1
+JtagNumIrBefore=0
+JtagNumIrAfter=0
+
+SimioAddr=g_JtagSimioAccess
+
+FlushCache=0
+AllowMmuSetup=1
+UseExtReset=1
+HandleWdtBug=0
+ForceEndOfReset=0
+JtagViaPod=0
+AllowResetOnCheck=0
+ChangeMsr=0
+ChangeMsrValue=0x0
+ExecOnStartCmds=0
+ExecOnHaltCmds=0
+TargetPort=Default
+EnableProgramTimeMeasurement=0
+UseHwResetMode=0
+HandleNexusAccessBug=0
+DoNotEnableTrapSwBrp=0
+CommDevSel=PortType=USB,Type=FTDI
+BootPasswd0=0xFEEDFACE
+BootPasswd1=0xCAFEBEEF
+BootPasswd2=0xFFFFFFFF
+BootPasswd3=0xFFFFFFFF
+BootPasswd4=0xFFFFFFFF
+BootPasswd5=0xFFFFFFFF
+BootPasswd6=0xFFFFFFFF
+BootPasswd7=0xFFFFFFFF
+JtagIoType=Jtag
+ExecOnHaltCmdsWhileHalted=0
+TimerForPTM=Default
+AllowBreakOnUpdateBreakpoints=0
+ClearDebugStatusOnHalt=1
+HwResetMode=Simulate
+UseMasterNexusIfResetState=1
+UseLocalAddressTranslation=1
+Use64BitNexus=0
+InitSramOnlyWhenNotInitialized=0
+AllowHarrForUpdateDebugRegs=0
+DisableE2EECC=0
+UseCore0ForNexusMemoryAccessWhileRunning=0
+
+[Controller0.Core.PpcJtagTargIntf.InitScript]
+// setup IVOPR
+// points to internal memory at 0x40000000
+SETSPR 0x3F 0x40000000 0xFFFFFFFF
+
+// disable watchdog
+SET SWT_SR 0xC520
+SET SWT_SR 0xD928
+SET SWT_CR 0xFF00000A
+
+// Oscillator select
+SET CGM_OCDS_SC 0x1000000
+SET CGM_OC_EN 0x1
+
+// enable all modes
+SET ME_MER 0x5FF
+
+// run mode
+SET ME_DRUN_MC 0x1F0032
+SET ME_RUN_PC0 0xFE
+
+// enable peripherals in run and low power modes
+SET ME_LP_PC0 0x500
+
+// enable clocks
+SET8 CGM_SC_DC0 0x80
+SET8 CGM_SC_DC1 0x80
+SET8 CGM_SC_DC2 0x80
+
+// setup clock monitor
+SET CMU_CSR 0x6
+SET CMU_LFREFR 0x1
+SET CMU_HFREFR 0xFFE
+
+// Make DRUN configuration active
+SET ME_MCTL 0x30005AF0
+SET ME_MCTL 0x3000A50F
+WAIT 0x5
+
+// setup pll to 48MHz
+SET FMPLL_CR 0x5300041 0xFFFFFFFF
+// run mode
+SET ME_DRUN_MC 0x1F00F4
+
+// Make DRUN configuration active
+SET ME_MCTL 0x30005AF0
+SET ME_MCTL 0x3000A50F
+WAIT 0x5
+
+// setup SSCM erro cfg for debug
+SET16 SSCM_ERROR 0x3 0x3
+
+[Controller0.BAMWriteFilter]
+Description=BAM WriteAccess Filter
+Range0Start=0xFFFFC000
+Range0Size=0x4000
+Enabled=1
+Handler=AccessFilter
+Mode=ReadOnly
+
+[Controller0.PFLASH]
+Enabled=1
+EnableMemtoolByDefault=1
+
+[Controller0.DFLASH]
+Enabled=1
+EnableMemtoolByDefault=1
+
+[Controller0.Core.PpcJtagTargIntf.OnStartScript]
+
+[Controller0.Core.PpcJtagTargIntf.OnHaltScript]
diff --git a/demos/SPC5/NIL-SPC560D-EVB/halconf.h b/demos/SPC5/NIL-SPC560D-EVB/halconf.h new file mode 100644 index 000000000..bd95f138f --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/halconf.h @@ -0,0 +1,319 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the TM subsystem.
+ */
+#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
+#define HAL_USE_TM FALSE
+#endif
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/SPC5/NIL-SPC560D-EVB/main.c b/demos/SPC5/NIL-SPC560D-EVB/main.c new file mode 100644 index 000000000..46d96b5ee --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/main.c @@ -0,0 +1,191 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+#include "test.h"
+#include "shell.h"
+#include "chprintf.h"
+
+#if 0
+#define SHELL_WA_SIZE THD_WORKING_AREA_SIZE(1024)
+#define TEST_WA_SIZE THD_WORKING_AREA_SIZE(256)
+
+static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {
+ size_t n, size;
+
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: mem\r\n");
+ return;
+ }
+ n = chHeapStatus(NULL, &size);
+ chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus());
+ chprintf(chp, "heap fragments : %u\r\n", n);
+ chprintf(chp, "heap free total : %u bytes\r\n", size);
+}
+
+static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {
+ static const char *states[] = {CH_STATE_NAMES};
+ thread_t *tp;
+
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: threads\r\n");
+ return;
+ }
+ chprintf(chp, " addr stack prio refs state time\r\n");
+ tp = chRegFirstThread();
+ do {
+ chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s\r\n",
+ (uint32_t)tp, (uint32_t)tp->p_ctx.sp,
+ (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),
+ states[tp->p_state]);
+ tp = chRegNextThread(tp);
+ } while (tp != NULL);
+}
+
+static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {
+ thread_t *tp;
+
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: test\r\n");
+ return;
+ }
+ tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(),
+ TestThread, chp);
+ if (tp == NULL) {
+ chprintf(chp, "out of memory\r\n");
+ return;
+ }
+ chThdWait(tp);
+}
+
+static const ShellCommand commands[] = {
+ {"mem", cmd_mem},
+ {"threads", cmd_threads},
+ {"test", cmd_test},
+ {NULL, NULL}
+};
+
+static const ShellConfig shell_cfg1 = {
+ (BaseSequentialStream *)&SD1,
+ commands
+};
+#endif
+
+/*
+ * LEDs blinker thread, times are in milliseconds.
+ */
+static THD_WORKING_AREA(waThread1, 128);
+static msg_t Thread1(void *arg) {
+
+ (void)arg;
+
+ while (TRUE) {
+#if 0
+ unsigned i;
+
+ for (i = 0; i < 4; i++) {
+ palClearPad(PORT_E, PE_LED1);
+ chThdSleepMilliseconds(100);
+ palClearPad(PORT_E, PE_LED2);
+ chThdSleepMilliseconds(100);
+ palClearPad(PORT_E, PE_LED3);
+ chThdSleepMilliseconds(100);
+ palClearPad(PORT_E, PE_LED4);
+ chThdSleepMilliseconds(100);
+ palSetPad(PORT_E, PE_LED1);
+ chThdSleepMilliseconds(100);
+ palSetPad(PORT_E, PE_LED2);
+ chThdSleepMilliseconds(100);
+ palSetPad(PORT_E, PE_LED3);
+ chThdSleepMilliseconds(100);
+ palSetPad(PORT_E, PE_LED4);
+ chThdSleepMilliseconds(300);
+ }
+
+ for (i = 0; i < 4; i++) {
+ palTogglePort(PORT_E, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED2) |
+ PAL_PORT_BIT(PE_LED3) | PAL_PORT_BIT(PE_LED4));
+ chThdSleepMilliseconds(500);
+ palTogglePort(PORT_E, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED2) |
+ PAL_PORT_BIT(PE_LED3) | PAL_PORT_BIT(PE_LED4));
+ chThdSleepMilliseconds(500);
+ }
+
+ for (i = 0; i < 4; i++) {
+ palTogglePad(PORT_E, PE_LED1);
+ chThdSleepMilliseconds(250);
+ palTogglePad(PORT_E, PE_LED1);
+ palTogglePad(PORT_E, PE_LED2);
+ chThdSleepMilliseconds(250);
+ palTogglePad(PORT_E, PE_LED2);
+ palTogglePad(PORT_E, PE_LED3);
+ chThdSleepMilliseconds(250);
+ palTogglePad(PORT_E, PE_LED3);
+ palTogglePad(PORT_E, PE_LED4);
+ chThdSleepMilliseconds(250);
+ palTogglePad(PORT_E, PE_LED4);
+ }
+
+ for (i = 0; i < 4; i++) {
+ palClearPort(PORT_E, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED3));
+ palSetPort(PORT_E, PAL_PORT_BIT(PE_LED2) | PAL_PORT_BIT(PE_LED4));
+ chThdSleepMilliseconds(500);
+ palClearPort(PORT_E, PAL_PORT_BIT(PE_LED2) | PAL_PORT_BIT(PE_LED4));
+ palSetPort(PORT_E, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED3));
+ chThdSleepMilliseconds(500);
+ }
+
+ palSetPort(PORT_E, PAL_PORT_BIT(PE_LED1) | PAL_PORT_BIT(PE_LED2) |
+ PAL_PORT_BIT(PE_LED3) | PAL_PORT_BIT(PE_LED4));
+#endif
+ chThdSleepMilliseconds(500);
+ }
+}
+
+/*
+ * Threads static table, one entry per thread. The number of entries must
+ * match NIL_CFG_NUM_THREADS.
+ */
+THD_TABLE_BEGIN
+ THD_TABLE_ENTRY(waThread1, "blinker", Thread1, NULL)
+THD_TABLE_END
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /* This is now the idle thread loop, you may perform here a low priority
+ task but you must never try to sleep or wait in this loop. Note that
+ this tasks runs at the lowest priority level so any instruction added
+ here will be executed after all other tasks have been started.*/
+ while (true) {
+ }
+}
diff --git a/demos/SPC5/NIL-SPC560D-EVB/mcuconf.h b/demos/SPC5/NIL-SPC560D-EVB/mcuconf.h new file mode 100644 index 000000000..871368763 --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/mcuconf.h @@ -0,0 +1,148 @@ +/*
+ SPC5 HAL - Copyright (C) 2013 STMicroelectronics
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * SPC560B/Cxx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 1...15 Lowest...Highest.
+ * DMA priorities:
+ * 0...15 Highest...Lowest.
+ */
+
+#define SPC560Dxx_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define SPC5_NO_INIT FALSE
+#define SPC5_ALLOW_OVERCLOCK FALSE
+#define SPC5_DISABLE_WATCHDOG TRUE
+#define SPC5_FMPLL0_IDF_VALUE 1
+#define SPC5_FMPLL0_NDIV_VALUE 48
+#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV8
+#define SPC5_XOSCDIV_VALUE 1
+#define SPC5_IRCDIV_VALUE 1
+#define SPC5_PERIPHERAL1_CLK_DIV_VALUE 2
+#define SPC5_PERIPHERAL2_CLK_DIV_VALUE 2
+#define SPC5_PERIPHERAL3_CLK_DIV_VALUE 2
+#define SPC5_CLOCK_FAILURE_HOOK() osalSysHalt("clock failure")
+
+#define SPC5_EMIOS0_GPRE_VALUE 20
+
+/*
+ * EDMA driver settings.
+ */
+#define SPC5_EDMA_CR_SETTING (EDMA_CR_EMLM)
+#define SPC5_EDMA_GROUP0_PRIORITIES 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
+#define SPC5_EDMA_ERROR_IRQ_PRIO 12
+#define SPC5_EDMA_ERROR_HANDLER() osalSysHalt("DMA failure")
+
+/*
+ * SERIAL driver system settings.
+ */
+#define SPC5_SERIAL_USE_LINFLEX0 TRUE
+#define SPC5_SERIAL_USE_LINFLEX1 FALSE
+#define SPC5_SERIAL_USE_LINFLEX2 FALSE
+#define SPC5_SERIAL_LINFLEX0_PRIORITY 8
+#define SPC5_SERIAL_LINFLEX1_PRIORITY 8
+#define SPC5_SERIAL_LINFLEX2_PRIORITY 8
+
+/*
+ * SPI driver system settings.
+ */
+#define SPC5_SPI_USE_DSPI0 FALSE
+#define SPC5_SPI_USE_DSPI1 FALSE
+#define SPC5_SPI_DMA_MODE SPC5_SPI_DMA_RX_ONLY
+#define SPC5_SPI_DSPI0_MCR (0 | SPC5_MCR_PCSIS0 | SPC5_MCR_PCSIS1 | SPC5_MCR_PCSIS2 | SPC5_MCR_PCSIS3 | SPC5_MCR_PCSIS4 | SPC5_MCR_PCSIS5)
+#define SPC5_SPI_DSPI1_MCR (0 | SPC5_MCR_PCSIS0 | SPC5_MCR_PCSIS1 | SPC5_MCR_PCSIS2 | SPC5_MCR_PCSIS3 | SPC5_MCR_PCSIS4)
+#define SPC5_SPI_DSPI0_TX1_DMA_CH_ID 4
+#define SPC5_SPI_DSPI0_TX2_DMA_CH_ID 5
+#define SPC5_SPI_DSPI0_RX_DMA_CH_ID 6
+#define SPC5_SPI_DSPI1_TX1_DMA_CH_ID 7
+#define SPC5_SPI_DSPI1_TX2_DMA_CH_ID 8
+#define SPC5_SPI_DSPI1_RX_DMA_CH_ID 9
+#define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10
+#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10
+#define SPC5_SPI_DSPI0_IRQ_PRIO 10
+#define SPC5_SPI_DSPI1_IRQ_PRIO 10
+#define SPC5_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DSPI DMA failure")
+
+/*
+ * ICU-PWM driver system settings.
+ */
+#define SPC5_ICU_USE_EMIOS0_CH0 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH1 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH2 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH3 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH4 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH5 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH6 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH7 FALSE
+#define SPC5_ICU_USE_EMIOS0_CH24 FALSE
+
+#define SPC5_PWM_USE_EMIOS0_GROUP0 FALSE
+#define SPC5_PWM_USE_EMIOS0_GROUP1 FALSE
+
+#define SPC5_EMIOS0_GFR_F0F1_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F2F3_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F4F5_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F6F7_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F8F9_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F10F11_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F12F13_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F14F15_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F16F17_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F18F19_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F20F21_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F22F23_PRIORITY 8
+#define SPC5_EMIOS0_GFR_F24F25_PRIORITY 8
+
+#define SPC5_EMIOS0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
+ SPC5_ME_PCTL_LP(2))
+#define SPC5_EMIOS0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
+ SPC5_ME_PCTL_LP(0))
+
+/*
+ * CAN driver system settings.
+ */
+#define SPC5_CAN_USE_FILTERS FALSE
+
+#define SPC5_CAN_USE_FLEXCAN0 FALSE
+#define SPC5_CAN_FLEXCAN0_USE_EXT_CLK FALSE
+#define SPC5_CAN_FLEXCAN0_PRIORITY 12
+#define SPC5_CAN_FLEXCAN0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
+ SPC5_ME_PCTL_LP(2))
+#define SPC5_CAN_FLEXCAN0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
+ SPC5_ME_PCTL_LP(0))
+
+/*
+* ADC driver system settings.
+*/
+#define SPC5_ADC_USE_ADC1 FALSE
+#define SPC5_ADC_ADC1_CLK_FREQUENCY HALF_PERIPHERAL_SET_CLOCK_FREQUENCY
+#define SPC5_ADC_ADC1_AUTO_CLOCK_OFF FALSE
+#define SPC5_ADC_ADC1_WD_PRIORITY 12
+#define SPC5_ADC_ADC1_DMA_CH_ID 2
+#define SPC5_ADC_ADC1_DMA_IRQ_PRIO 12
+#define SPC5_ADC_ADC1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
+ SPC5_ME_PCTL_LP(2))
+#define SPC5_ADC_ADC1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
+ SPC5_ME_PCTL_LP(0))
diff --git a/demos/SPC5/NIL-SPC560D-EVB/nilconf.h b/demos/SPC5/NIL-SPC560D-EVB/nilconf.h new file mode 100644 index 000000000..54fb32ca4 --- /dev/null +++ b/demos/SPC5/NIL-SPC560D-EVB/nilconf.h @@ -0,0 +1,160 @@ +/*
+ ChibiOS/NIL - Copyright (C) 2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file nilconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _NILCONF_H_
+#define _NILCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Number of user threads in the application.
+ * @note This number is not inclusive of the idle thread which is
+ * Implicitly handled.
+ */
+#define NIL_CFG_NUM_THREADS 3
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System timer settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define NIL_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ */
+#define NIL_CFG_ST_FREQUENCY 50000
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define NIL_CFG_ST_TIMEDELTA 2
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define NIL_CFG_USE_EVENTS TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System assertions.
+ */
+#define NIL_CFG_ENABLE_ASSERTS FALSE
+
+/**
+ * @brief Stack check.
+ */
+#define NIL_CFG_ENABLE_STACK_CHECK FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define NIL_CFG_THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ */
+#define NIL_CFG_THREAD_EXT_INIT_HOOK(tr) { \
+ /* Add custom threads initialization code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define NIL_CFG_IDLE_ENTER_HOOK() { \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define NIL_CFG_IDLE_LEAVE_HOOK() { \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in nilcore.h). */
+/*===========================================================================*/
+
+#endif /* _NILCONF_H_ */
+
+/** @} */
|