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Diffstat (limited to 'demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg')
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diff --git a/demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg b/demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg
new file mode 100644
index 000000000..ca4a75aa0
--- /dev/null
+++ b/demos/SPC5/NIL-SPC560D-EVB/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg
@@ -0,0 +1,160 @@
+[Main]
+Signature=UDE_TARGINFO_2.0
+Description=STM XPC560B Mini Module with SPC560D40 (Jtag)
+Description1=PLL set for 48MHz
+Description2=FLASH programming prepared but not enabled
+Description3=Write Filter for BAM Module
+MCUs=Controller0
+Architecture=PowerPC
+Vendor=STM
+Board=XPC560B Mini Module
+
+[Controller0]
+Family=PowerPC
+Type=SPC560D40
+Enabled=1
+IntClock=48000
+MemDevs=BAMWriteFilter
+ExtClock=8000
+
+[Controller0.Core]
+Protocol=PPCJTAG
+Enabled=1
+
+[Controller0.Core.LoadedAddOn]
+UDEMemtool=1
+
+[Controller0.Core.PpcJtagTargIntf]
+PortType=FTDI
+ResetWaitTime=50
+MaxJtagClk=2500
+DoSramInit=1
+UseNexus=1
+AdaptiveJtagPhaseShift=1
+ConnOption=Default
+ChangeJtagClk=10000
+HaltAfterReset=1
+SimioAddr=g_JtagSimioAccess
+FreezeTimers=1
+InvalidTlbOnReset=0
+InvalidateCache=0
+ForceCacheFlush=0
+IgnoreLockedLines=0
+ExecInitCmds=1
+JtagTapNumber=0
+JtagNumOfTaps=1
+JtagNumIrBefore=0
+JtagNumIrAfter=0
+
+SimioAddr=g_JtagSimioAccess
+
+FlushCache=0
+AllowMmuSetup=1
+UseExtReset=1
+HandleWdtBug=0
+ForceEndOfReset=0
+JtagViaPod=0
+AllowResetOnCheck=0
+ChangeMsr=0
+ChangeMsrValue=0x0
+ExecOnStartCmds=0
+ExecOnHaltCmds=0
+TargetPort=Default
+EnableProgramTimeMeasurement=0
+UseHwResetMode=0
+HandleNexusAccessBug=0
+DoNotEnableTrapSwBrp=0
+CommDevSel=PortType=USB,Type=FTDI
+BootPasswd0=0xFEEDFACE
+BootPasswd1=0xCAFEBEEF
+BootPasswd2=0xFFFFFFFF
+BootPasswd3=0xFFFFFFFF
+BootPasswd4=0xFFFFFFFF
+BootPasswd5=0xFFFFFFFF
+BootPasswd6=0xFFFFFFFF
+BootPasswd7=0xFFFFFFFF
+JtagIoType=Jtag
+ExecOnHaltCmdsWhileHalted=0
+TimerForPTM=Default
+AllowBreakOnUpdateBreakpoints=0
+ClearDebugStatusOnHalt=1
+HwResetMode=Simulate
+UseMasterNexusIfResetState=1
+UseLocalAddressTranslation=1
+Use64BitNexus=0
+InitSramOnlyWhenNotInitialized=0
+AllowHarrForUpdateDebugRegs=0
+DisableE2EECC=0
+UseCore0ForNexusMemoryAccessWhileRunning=0
+
+[Controller0.Core.PpcJtagTargIntf.InitScript]
+// setup IVOPR
+// points to internal memory at 0x40000000
+SETSPR 0x3F 0x40000000 0xFFFFFFFF
+
+// disable watchdog
+SET SWT_SR 0xC520
+SET SWT_SR 0xD928
+SET SWT_CR 0xFF00000A
+
+// Oscillator select
+SET CGM_OCDS_SC 0x1000000
+SET CGM_OC_EN 0x1
+
+// enable all modes
+SET ME_MER 0x5FF
+
+// run mode
+SET ME_DRUN_MC 0x1F0032
+SET ME_RUN_PC0 0xFE
+
+// enable peripherals in run and low power modes
+SET ME_LP_PC0 0x500
+
+// enable clocks
+SET8 CGM_SC_DC0 0x80
+SET8 CGM_SC_DC1 0x80
+SET8 CGM_SC_DC2 0x80
+
+// setup clock monitor
+SET CMU_CSR 0x6
+SET CMU_LFREFR 0x1
+SET CMU_HFREFR 0xFFE
+
+// Make DRUN configuration active
+SET ME_MCTL 0x30005AF0
+SET ME_MCTL 0x3000A50F
+WAIT 0x5
+
+// setup pll to 48MHz
+SET FMPLL_CR 0x5300041 0xFFFFFFFF
+// run mode
+SET ME_DRUN_MC 0x1F00F4
+
+// Make DRUN configuration active
+SET ME_MCTL 0x30005AF0
+SET ME_MCTL 0x3000A50F
+WAIT 0x5
+
+// setup SSCM erro cfg for debug
+SET16 SSCM_ERROR 0x3 0x3
+
+[Controller0.BAMWriteFilter]
+Description=BAM WriteAccess Filter
+Range0Start=0xFFFFC000
+Range0Size=0x4000
+Enabled=1
+Handler=AccessFilter
+Mode=ReadOnly
+
+[Controller0.PFLASH]
+Enabled=1
+EnableMemtoolByDefault=1
+
+[Controller0.DFLASH]
+Enabled=1
+EnableMemtoolByDefault=1
+
+[Controller0.Core.PpcJtagTargIntf.OnStartScript]
+
+[Controller0.Core.PpcJtagTargIntf.OnHaltScript]