diff options
| author | areviu <areviu.info@gmail.com> | 2018-03-19 19:40:09 +0000 |
|---|---|---|
| committer | areviu <areviu.info@gmail.com> | 2018-03-19 19:40:09 +0000 |
| commit | d82f92151f7d0fbc6b34aad78e0e02da0a619057 (patch) | |
| tree | 97211273ae990a3ab60852e023960039ae6ae109 | |
| parent | badec871127cc434bdb83a54c2a4d7dde26b073f (diff) | |
| download | ChibiOS-d82f92151f7d0fbc6b34aad78e0e02da0a619057.tar.gz ChibiOS-d82f92151f7d0fbc6b34aad78e0e02da0a619057.tar.bz2 ChibiOS-d82f92151f7d0fbc6b34aad78e0e02da0a619057.zip | |
update hal crypto sha lld, added integration with wolfcrypt
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11824 110e8d01-0319-4d1e-a829-52ad28d1bb01
54 files changed, 5950 insertions, 736 deletions
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.cproject b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.cproject new file mode 100644 index 000000000..7b9aba018 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.cproject @@ -0,0 +1,53 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="0.114656749">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.114656749" moduleId="org.eclipse.cdt.core.settings" name="Default">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactName="${ProjName}" buildProperties="" description="" id="0.114656749" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+ <folderInfo id="0.114656749." name="/" resourcePath="">
+ <toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1182750861" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
+ <targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1182750861.169007201" name=""/>
+ <builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.579570726" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.libs.2143276802" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1873650595" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1337802279" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1707090075" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.338985256" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1165165914" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.714476670" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ <sourceEntries>
+ <entry excluding="wolfssl/wolfcrypt/test" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+ </sourceEntries>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <project id="RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO.null.1703860681" name="RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO"/>
+ </storageModule>
+ <storageModule moduleId="scannerConfiguration">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+ <scannerConfigBuildInfo instanceId="0.114656749">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
+ </scannerConfigBuildInfo>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+ <storageModule moduleId="refreshScope"/>
+</cproject>
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project new file mode 100644 index 000000000..3292de249 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project @@ -0,0 +1,96 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+ <name>RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO</name>
+ <comment></comment>
+ <projects>
+ </projects>
+ <buildSpec>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+ <triggers>clean,full,incremental,</triggers>
+ <arguments>
+ <dictionary>
+ <key>?name?</key>
+ <value></value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.append_environment</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.autoBuildTarget</key>
+ <value>all</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildArguments</key>
+ <value>-j1</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildCommand</key>
+ <value>make</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
+ <value>clean</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.contents</key>
+ <value>org.eclipse.cdt.make.core.activeConfigSettings</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableAutoBuild</key>
+ <value>false</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableCleanBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableFullBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.fullBuildTarget</key>
+ <value>all</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.stopOnError</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
+ <value>true</value>
+ </dictionary>
+ </arguments>
+ </buildCommand>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+ <triggers>full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ </buildSpec>
+ <natures>
+ <nature>org.eclipse.cdt.core.cnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+ <nature>org.eclipse.cdt.core.ccnature</nature>
+ </natures>
+ <linkedResources>
+ <link>
+ <name>board</name>
+ <type>2</type>
+ <locationURI>CHIBIOS/os/hal/boards/ATSAMA5D2_XULT</locationURI>
+ </link>
+ <link>
+ <name>os</name>
+ <type>2</type>
+ <locationURI>CHIBIOS/os</locationURI>
+ </link>
+ <link>
+ <name>wolfssl</name>
+ <type>2</type>
+ <locationURI>CHIBIOS/ext/wolfssl</locationURI>
+ </link>
+ </linkedResources>
+</projectDescription>
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile new file mode 100644 index 000000000..b4602a9f1 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile @@ -0,0 +1,249 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT = -DWOLFSSL_USER_SETTINGS
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+ USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+ USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = no
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+ USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the ARM System/User stack. This
+# stack is the stack used by the main() thread.
+ifeq ($(USE_SYSTEM_STACKSIZE),)
+ USE_SYSTEM_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the ARM IRQ stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+ USE_IRQ_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the ARM FIQ stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_FIQ_STACKSIZE),)
+ USE_FIQ_STACKSIZE = 64
+endif
+
+# Stack size to the allocated to the ARM Supervisor stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_SUPERVISOR_STACKSIZE),)
+ USE_SUPERVISOR_STACKSIZE = 8
+endif
+
+# Stack size to the allocated to the ARM Undefined stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_UND_STACKSIZE),)
+ USE_UND_STACKSIZE = 8
+endif
+
+# Stack size to the allocated to the ARM Abort stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_ABT_STACKSIZE),)
+ USE_ABT_STACKSIZE = 8
+endif
+
+# Enables the use of FPU.
+ifeq ($(USE_FPU),)
+ USE_FPU = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+CONFDIR := ./cfg
+
+# Imported source files and paths
+CHIBIOS = ../../..
+# Licensing files.
+include $(CHIBIOS)/os/license/license.mk
+# Startup files.
+include $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC/mk/startup_sama5d2.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/platform.mk
+include $(CHIBIOS)/os/hal/boards/ATSAMA5D2_XULT/board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk
+# Other files (optional).
+include $(CHIBIOS)/os/hal/lib/streams/streams.mk
+
+include cfg/wolfssl.mk
+
+# Define linker script file here
+#LDSCRIPT= $(STARTUPLD)/SAMA5D2.ld
+LDSCRIPT= $(STARTUPLD)/SAMA5D2ddr.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(ALLCSRC) \
+ $(LWSRC) \
+ $(CHIBIOS)/os/various/evtimer.c \
+ wolfssl_chibios.c main.c $(WOLFSSL)/wolfcrypt/src/testwolf.c
+
+CSRC += $(CHIBIOS)/os/various/syscalls.c
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC = $(ALLCPPSRC)
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(ALLASMSRC)
+ASMXSRC = $(ALLXASMSRC)
+
+INCDIR = $(ALLINC) \
+ $(LWINC) $(STREAMSINC) \
+ $(CHIBIOS)/os/various $(WOLFINC) $(CONFDIR)
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-a5
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra -Wundef
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS = -DPLATFORM_CRY_USE_CRY1=1 -DSAMA_DMA_REQUIRED
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC
+include $(RULESPATH)/rules.mk
+
+##############################################################################
+# MISRA check rule, requires PCLint and the setup files, not provided.
+#
+misra:
+ @lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(CSRC) &> misra.txt
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chconf.h new file mode 100644 index 000000000..8093b6f33 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chconf.h @@ -0,0 +1,615 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY 1000
+
+/**
+ * @brief Time intervals data size.
+ * @note Allowed values are 16, 32 or 64 bits.
+ */
+#define CH_CFG_INTERVALS_SIZE 32
+
+/**
+ * @brief Time types data size.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_TIME_TYPES_SIZE 32
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define CH_CFG_ST_TIMEDELTA 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ * @note The round robin preemption is not supported in tickless mode and
+ * must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM 0
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE 0
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread. The application @p main()
+ * function becomes the idle thread and must implement an
+ * infinite loop.
+ */
+#define CH_CFG_NO_IDLE_THREAD FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM FALSE
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY TRUE
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT TRUE
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES TRUE
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES TRUE
+
+/**
+ * @brief Enables recursive behavior on mutexes.
+ * @note Recursive mutexes are heavier and have an increased
+ * memory footprint.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS TRUE
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS TRUE
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES TRUE
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES TRUE
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE TRUE
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ * @p CH_CFG_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP TRUE
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS TRUE
+
+/**
+ * @brief Objects FIFOs APIs.
+ * @details If enabled then the objects FIFOs APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_OBJ_FIFOS TRUE
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_WAITEXIT.
+ * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Objects factory options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Objects Factory APIs.
+ * @details If enabled then the objects factory APIs are included in the
+ * kernel.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_CFG_USE_FACTORY TRUE
+
+/**
+ * @brief Maximum length for object names.
+ * @details If the specified length is zero then the name is stored by
+ * pointer but this could have unintended side effects.
+ */
+#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
+
+/**
+ * @brief Enables the registry of generic objects.
+ */
+#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
+
+/**
+ * @brief Enables factory for generic buffers.
+ */
+#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
+
+/**
+ * @brief Enables factory for semaphores.
+ */
+#define CH_CFG_FACTORY_SEMAPHORES TRUE
+
+/**
+ * @brief Enables factory for mailboxes.
+ */
+#define CH_CFG_FACTORY_MAILBOXES TRUE
+
+/**
+ * @brief Enables factory for objects FIFOs.
+ */
+#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, kernel statistics.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS FALSE
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS TRUE
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS TRUE
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the trace buffer is activated.
+ *
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
+
+/**
+ * @brief Trace buffer entries.
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_BUFFER_SIZE 128
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_FILL_THREADS FALSE
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p FALSE.
+ * @note This debug option is not currently compatible with the
+ * tickless mode.
+ */
+#define CH_DBG_THREADS_PROFILING FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System structure extension.
+ * @details User fields added to the end of the @p ch_system_t structure.
+ */
+#define CH_CFG_SYSTEM_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief System initialization hook.
+ * @details User initialization code added to the @p chSysInit() function
+ * just before interrupts are enabled globally.
+ */
+#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p _thread_init() function.
+ *
+ * @note It is invoked from within @p _thread_init() and implicitly from all
+ * the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* Context switch code here.*/ \
+}
+
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() { \
+ /* Idle-enter code here.*/ \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() { \
+ /* Idle-leave code here.*/ \
+}
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() { \
+ /* System tick event code here.*/ \
+}
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
+ /* System halt code here.*/ \
+}
+
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+/**
+ * @brief Trust zone configuration.
+ * @details If enabled the kernel is configured for the secure world
+ * and can access specific devices.
+ */
+#define CH_CFG_SEC_WORLD TRUE
+
+#endif /* CHCONF_H */
+
+/** @} */
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chibioshal.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chibioshal.h new file mode 100644 index 000000000..6ef23e9dc --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chibioshal.h @@ -0,0 +1,11 @@ +#ifndef CFG_CHIBIOSHAL_H_
+#define CFG_CHIBIOSHAL_H_
+
+
+#if HAL_USE_CRY == TRUE
+#define _SAMA5D2_AES_COMPONENT_
+#include "hal.h"
+#endif
+
+
+#endif /* CFG_CHIBIOSHAL_H_ */
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/halconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/halconf.h new file mode 100644 index 000000000..c9e38322e --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/halconf.h @@ -0,0 +1,437 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef HALCONF_H
+#define HALCONF_H
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the cryptographic subsystem.
+ */
+#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
+#define HAL_USE_CRY TRUE
+#endif
+
+/**
+ * @brief Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC TRUE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the QSPI subsystem.
+ */
+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
+#define HAL_USE_QSPI FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/**
+ * @brief Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG FALSE
+#endif
+
+/*===========================================================================*/
+/* PAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
+#define PAL_USE_CALLBACKS FALSE
+#endif
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
+#define PAL_USE_WAIT FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* CRY driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the SW fall-back of the cryptographic driver.
+ * @details When enabled, this option, activates a fall-back software
+ * implementation for algorithms not supported by the underlying
+ * hardware.
+ * @note Fall-back implementations may not be present for all algorithms.
+ */
+#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_USE_FALLBACK FALSE
+#endif
+
+/**
+ * @brief Makes the driver forcibly use the fall-back implementations.
+ */
+#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_ENFORCE_FALLBACK FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 16 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting. */
+/*===========================================================================*/
+
+/**
+ * @brief Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ * the USB data endpoint maximum packet size.
+ * @note The default is 256 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE 256
+#endif
+
+/**
+ * @brief Serial over USB number of buffers.
+ * @note The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER 2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT FALSE
+#endif
+
+/**
+ * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT FALSE
+#endif
+
+#endif /* HALCONF_H */
+
+/** @} */
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/lwip.mk b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/lwip.mk new file mode 100644 index 000000000..18ad2ead1 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/lwip.mk @@ -0,0 +1,20 @@ +# List of the required lwIP files.
+LWIPDIR = $(CHIBIOS)/ext/lwip/src
+
+# The various blocks of files are outlined in Filelists.mk.
+include $(LWIPDIR)/Filelists.mk
+
+LWBINDSRC = \
+ $(CHIBIOS)/os/various/lwip_bindings/arch/sys_arch.c
+
+
+# Add blocks of files from Filelists.mk as required for enabled options
+LWSRC = $(COREFILES) $(CORE4FILES) $(APIFILES) $(LWBINDSRC) $(NETIFFILES) $(HTTPDFILES)
+
+LWINC = \
+ $(CHIBIOS)/os/various/lwip_bindings \
+ $(LWIPDIR)/include
+
+# Shared variables
+ALLCSRC += $(LWIPSRC)
+ALLINC += $(LWIPINC)
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/mcuconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/mcuconf.h new file mode 100644 index 000000000..2faf9952f --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/mcuconf.h @@ -0,0 +1,144 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+#define SAMA5D2x_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define SAMA_HAL_IS_SECURE TRUE
+#define SAMA_NO_INIT TRUE
+#define SAMA_MOSCRC_ENABLED FALSE
+#define SAMA_MOSCXT_ENABLED TRUE
+#define SAMA_MOSC_SEL SAMA_MOSC_MOSCXT
+#define SAMA_OSC_SEL SAMA_OSC_OSCXT
+#define SAMA_MCK_SEL SAMA_MCK_PLLA_CLK
+#define SAMA_MCK_PRES_VALUE 1
+#define SAMA_MCK_MDIV_VALUE 3
+#define SAMA_PLLA_MUL_VALUE 83
+#define SAMA_PLLADIV2_EN TRUE
+#define SAMA_H64MX_H32MX_RATIO 2
+
+/*
+ * SPI driver system settings.
+ */
+#define SAMA_SPI_USE_SPI0 FALSE
+#define SAMA_SPI_USE_SPI1 FALSE
+#define SAMA_SPI_USE_FLEXCOM0 FALSE
+#define SAMA_SPI_USE_FLEXCOM1 FALSE
+#define SAMA_SPI_USE_FLEXCOM2 FALSE
+#define SAMA_SPI_USE_FLEXCOM3 FALSE
+#define SAMA_SPI_USE_FLEXCOM4 FALSE
+#define SAMA_SPI_SPI0_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_SPI1_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+#define SPI_SELECT_MODE SPI_SELECT_MODE_NONE
+
+/*
+ * SECUMOD driver system settings.
+ */
+#define HAL_USE_SECUMOD FALSE
+
+/*
+ * SDMMC driver system settings.
+ */
+#define HAL_USE_SDMMC FALSE
+
+/*
+ * SERIAL driver system settings.
+ */
+#define SAMA_SERIAL_USE_UART0 FALSE
+#define SAMA_SERIAL_USE_UART1 TRUE
+#define SAMA_SERIAL_USE_UART2 FALSE
+#define SAMA_SERIAL_USE_UART3 FALSE
+#define SAMA_SERIAL_USE_UART4 FALSE
+#define SAMA_SERIAL_USE_UART5 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM0 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM1 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM2 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM3 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM4 FALSE
+#define SAMA_SERIAL_UART0_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART1_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART2_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART3_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART4_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM0_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM1_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM2_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM3_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM4_IRQ_PRIORITY 4
+
+/*
+ * ST driver settings.
+ */
+#define SAMA_ST_USE_PIT FALSE
+#define SAMA_ST_USE_TC0 FALSE
+#define SAMA_ST_USE_TC1 TRUE
+
+/*
+ * TC driver system settings.
+ */
+#define HAL_USE_TC FALSE
+#define SAMA_USE_TC0 FALSE
+#define SAMA_USE_TC1 FALSE
+#define SAMA_TC0_IRQ_PRIORITY 2
+#define SAMA_TC1_IRQ_PRIORITY 2
+
+/*
+ * UART driver system settings.
+ */
+#define SAMA_UART_USE_UART0 FALSE
+#define SAMA_UART_USE_UART1 FALSE
+#define SAMA_UART_USE_UART2 FALSE
+#define SAMA_UART_USE_UART3 FALSE
+#define SAMA_UART_USE_UART4 FALSE
+#define SAMA_UART_USE_FLEXCOM0 FALSE
+#define SAMA_UART_USE_FLEXCOM1 FALSE
+#define SAMA_UART_USE_FLEXCOM2 FALSE
+#define SAMA_UART_USE_FLEXCOM3 FALSE
+#define SAMA_UART_USE_FLEXCOM4 FALSE
+#define SAMA_UART_UART0_IRQ_PRIORITY 4
+#define SAMA_UART_UART1_IRQ_PRIORITY 4
+#define SAMA_UART_UART2_IRQ_PRIORITY 4
+#define SAMA_UART_UART3_IRQ_PRIORITY 4
+#define SAMA_UART_UART4_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM0_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM1_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM2_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM3_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM4_IRQ_PRIORITY 4
+#define SAMA_UART_UART0_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART1_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART2_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART3_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART4_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM0_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM1_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM2_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM3_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM4_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+#endif /* MCUCONF_H */
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/user_settings.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/user_settings.h new file mode 100644 index 000000000..8a00e7a97 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/user_settings.h @@ -0,0 +1,104 @@ +#include "chtypes.h" +#include "halconf.h" +/* Configuration */ + +#define CRY_DRV CRYD1 +#define CRYD_KEY 0 +#define HAL_CRY_WOLF_SHABUFF_SIZE 2*128 + + +#define WOLFSSL_GENERAL_ALIGNMENT 4 +#define HAVE_TM_TYPE + +/* ChibiOS + Lwip */ +#define HAVE_LWIP_NATIVE +#define WOLFSSL_CHIBIOS + +#define USER_TICKS +#define WOLFSSL_USER_CURRTIME +#define XMALLOC_OVERRIDE +#define USE_WOLF_TIME_T +#define XTIME(tl) (LowResTimer()) + +//#define WOLFCRYPT_ONLY + +/* ARM */ + +#define RSA_LOW_MEM +#define NO_OLD_RNGNAME +#define NO_OLD_WC_NAMES +#define SMALL_SESSION_CACHE +#define WOLFSSL_SMALL_STACK + +#define TFM_ARM +#define SINGLE_THREADED +#define NO_SIG_WRAPPER + +/* Cipher features */ +#define HAVE_AES_ECB +#define WOLFSSL_AES_DIRECT +#define HAVE_AES_DECRYPT +#define WOLFSSL_SHA512 + +//#define USE_FAST_MATH +//#define ALT_ECC_SIZE + +//#define HAVE_FFDHE_2048 +//#define HAVE_CHACHA +//#define HAVE_POLY1305 +//#define HAVE_ECC +//#define HAVE_CURVE25519 +//#define CURVED25519_SMALL +//#define HAVE_ONE_TIME_AUTH +//#define WOLFSSL_DH_CONST + +/* HW RNG support */ + +//unsigned int chibios_rand_generate(void); +//int custom_rand_generate_block(unsigned char* output, unsigned int sz); + +//#define CUSTOM_RAND_GENERATE chibios_rand_generate +//#define CUSTOM_RAND_TYPE uint32_t + +//#define HAVE_ED25519 +//#define HAVE_POLY1305 +#define HAVE_SHA512 +#define WOLFSSL_SHA512 + +/* Size/speed config */ +//#define USE_SLOW_SHA2 + +/* Robustness */ +#define TFM_TIMING_RESISTANT +#define ECC_TIMING_RESISTANT +#define WC_RSA_BLINDING + +/* Remove Features */ +#define NO_WRITEV +//#define NO_DEV_RANDOM +#define NO_FILESYSTEM +#define NO_MAIN_DRIVER +#define NO_MD4 +#define NO_RABBIT +#define NO_HC128 +#define NO_DSA +#define NO_PWDBASED +#define NO_PSK +#define NO_64BIT +#define NO_DH +#define NO_RC4 +#define NO_HMAC +//test purpose +#define NO_RSA +#define NO_CODING +#define NO_ASN +#define NO_MD5 +#define NO_MD4 +#define NO_OLD_TLS +#define NO_CERTS +#define WOLFSSL_DH_CONST + +/* Realloc (to use without USE_FAST_MATH) */ + +void *chHeapRealloc (void *addr, uint32_t size); +#define XREALLOC(p,n,h,t) chHeapRealloc( (p) , (n) ) diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/wolfssl.mk b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/wolfssl.mk new file mode 100644 index 000000000..c18944845 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/wolfssl.mk @@ -0,0 +1,96 @@ +# List of the required lwIP files. +WOLFSSL = $(CHIBIOS)/ext/wolfssl + +WOLFBINDSRC = \ + +WOLFCRYPTSRC = \ + $(WOLFSSL)/wolfcrypt/src/sha.c \ + $(WOLFSSL)/wolfcrypt/src/ge_low_mem.c \ + $(WOLFSSL)/wolfcrypt/src/compress.c \ + $(WOLFSSL)/wolfcrypt/src/chacha20_poly1305.c \ + $(WOLFSSL)/wolfcrypt/src/des3.c \ + $(WOLFSSL)/wolfcrypt/src/fe_low_mem.c \ + $(WOLFSSL)/wolfcrypt/src/hmac.c \ + $(WOLFSSL)/wolfcrypt/src/asm.c \ + $(WOLFSSL)/wolfcrypt/src/camellia.c \ + $(WOLFSSL)/wolfcrypt/src/ecc.c \ + $(WOLFSSL)/wolfcrypt/src/ecc_fp.c \ + $(WOLFSSL)/wolfcrypt/src/ripemd.c \ + $(WOLFSSL)/wolfcrypt/src/rsa.c \ + $(WOLFSSL)/wolfcrypt/src/wc_port.c \ + $(WOLFSSL)/wolfcrypt/src/arc4.c \ + $(WOLFSSL)/wolfcrypt/src/srp.c \ + $(WOLFSSL)/wolfcrypt/src/random.c \ + $(WOLFSSL)/wolfcrypt/src/idea.c \ + $(WOLFSSL)/wolfcrypt/src/blake2b.c \ + $(WOLFSSL)/wolfcrypt/src/error.c \ + $(WOLFSSL)/wolfcrypt/src/dh.c \ + $(WOLFSSL)/wolfcrypt/src/asn.c \ + $(WOLFSSL)/wolfcrypt/src/cmac.c \ + $(WOLFSSL)/wolfcrypt/src/signature.c \ + $(WOLFSSL)/wolfcrypt/src/pwdbased.c \ + $(WOLFSSL)/wolfcrypt/src/chacha.c \ + $(WOLFSSL)/wolfcrypt/src/md5.c \ + $(WOLFSSL)/wolfcrypt/src/aes.c \ + $(WOLFSSL)/wolfcrypt/src/wolfmath.c \ + $(WOLFSSL)/wolfcrypt/src/memory.c \ + $(WOLFSSL)/wolfcrypt/src/logging.c \ + $(WOLFSSL)/wolfcrypt/src/tfm.c \ + $(WOLFSSL)/wolfcrypt/src/coding.c \ + $(WOLFSSL)/wolfcrypt/src/rabbit.c \ + $(WOLFSSL)/wolfcrypt/src/pkcs12.c \ + $(WOLFSSL)/wolfcrypt/src/md2.c \ + $(WOLFSSL)/wolfcrypt/src/ge_operations.c \ + $(WOLFSSL)/wolfcrypt/src/sha512.c \ + $(WOLFSSL)/wolfcrypt/src/sha3.c \ + $(WOLFSSL)/wolfcrypt/src/port/nrf51.c \ + $(WOLFSSL)/wolfcrypt/src/port/pic32/pic32mz-crypt.c \ + $(WOLFSSL)/wolfcrypt/src/port/atmel/atmel.c \ + $(WOLFSSL)/wolfcrypt/src/port/nxp/ksdk_port.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-des3.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-ccm.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-hash.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-aes.c \ + $(WOLFSSL)/wolfcrypt/src/port/arm/armv8-aes.c \ + $(WOLFSSL)/wolfcrypt/src/port/arm/armv8-sha256.c \ + $(WOLFSSL)/wolfcrypt/src/port/xilinx/xil-aesgcm.c \ + $(WOLFSSL)/wolfcrypt/src/port/xilinx/xil-sha3.c \ + $(WOLFSSL)/wolfcrypt/src/hash.c \ + $(WOLFSSL)/wolfcrypt/src/curve25519.c \ + $(WOLFSSL)/wolfcrypt/src/integer.c \ + $(WOLFSSL)/wolfcrypt/src/wolfevent.c \ + $(WOLFSSL)/wolfcrypt/src/dsa.c \ + $(WOLFSSL)/wolfcrypt/src/pkcs7.c \ + $(WOLFSSL)/wolfcrypt/src/wc_encrypt.c \ + $(WOLFSSL)/wolfcrypt/src/cpuid.c \ + $(WOLFSSL)/wolfcrypt/src/sha256.c \ + $(WOLFSSL)/wolfcrypt/src/md4.c \ + $(WOLFSSL)/wolfcrypt/src/fe_operations.c \ + $(WOLFSSL)/wolfcrypt/src/ed25519.c \ + $(WOLFSSL)/wolfcrypt/src/poly1305.c \ + $(WOLFSSL)/wolfcrypt/src/hc128.c + +WOLFSSLSRC = + +# $(WOLFSSL)/src/internal.c \ +# $(WOLFSSL)/src/tls.c \ +# $(WOLFSSL)/src/keys.c \ +# $(WOLFSSL)/src/crl.c \ +# $(WOLFSSL)/src/ssl.c \ +# $(WOLFSSL)/src/wolfio.c \ +# $(WOLFSSL)/src/sniffer.c \ +# $(WOLFSSL)/src/ocsp.c \ +# $(WOLFSSL)/src/tls13.c + + +WOLFSRC = $(WOLFBINDSRC) $(WOLFCRYPTSRC) $(WOLFSSLSRC) + +WOLFINC = \ + $(WOLFSSL)/wolfcrypt/include \ + $(WOLFSSL)/wolfssl/include \ + $(WOLFSSL) + +# Shared variables +ALLCSRC += $(WOLFSRC) +ALLINC += $(WOLFINC) + diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c new file mode 100644 index 000000000..48525faea --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c @@ -0,0 +1,85 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+
+BaseSequentialStream *serialp;
+
+extern void wolfCrypt_Init(void);
+extern void wolfcrypt_test(void);
+/*
+ * Green LED blinker thread, times are in milliseconds.
+ */
+static THD_WORKING_AREA(waThread1, 128);
+static THD_FUNCTION(Thread1, arg) {
+
+ (void)arg;
+ chRegSetThreadName("blinker");
+ while (TRUE) {
+ palClearLine(LINE_LED_BLUE);
+ chThdSleepMilliseconds(500);
+ palSetLine(LINE_LED_BLUE);
+ chThdSleepMilliseconds(500);
+ }
+}
+
+static const SerialConfig sdcfg = { 115200, 0,UART_MR_PAR_NO };
+static const CRYConfig cryptoconf = {
+ TRANSFER_POLLING,
+ AES_CFBS_128, //cfbs
+};
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ sdStart(&SD1, &sdcfg);
+
+ serialp =(BaseSequentialStream *)&SD1;
+
+ /* Redirecting UART0 RX on PD2 and UART0 TX on PD3. */
+ palSetGroupMode(PIOD, PAL_PORT_BIT(2) | PAL_PORT_BIT(3), 0U,
+ PAL_SAMA_FUNC_PERIPH_A | PAL_MODE_SECURE);
+
+ cryStart(&CRYD1, &cryptoconf);
+ /*
+ * Creates the blinker thread.
+ */
+ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+
+ wolfCrypt_Init();
+ wolfcrypt_test();
+ /*
+ * Normal main() thread activity, in this demo it does nothing except
+ * sleeping in a loop and check the button state.
+ */
+ while (true) {
+ chThdSleepMilliseconds(500);
+ }
+}
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/readme.txt b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/readme.txt new file mode 100644 index 000000000..a1d3961ac --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/readme.txt @@ -0,0 +1,39 @@ +***************************************************************************** +** ChibiOS/RT port for ARM-Cortex-M7 STM32F746. ** +***************************************************************************** + +** TARGET ** + +The demo runs on SAMA5D2-XPLAINED + +** The Demo ** + +The demo flashes a LED to indicate that is running properly. + +An example HTTPS server is implemented to serve "GET /" requests at address +192.168.0.5 on port 443. + +Use curl command line to verify DEMO +>>curl -k https://192.168.0.5 + +SSL certificate and server key that are compiled in are the example keys +taken from the wolfSSL repository. To use different keys, regenerate cert.c +using "xxd -i" from your certificate and keys. + + +** Build Procedure ** + +This build has been tested using arm-none-eabi-gcc and make. +Just type 'make' from this directory to create the image. + + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com + +WolfSSL is Copyright (c) by WolfSSL Inc. diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/cert.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/cert.c new file mode 100644 index 000000000..63941a373 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/cert.c @@ -0,0 +1,83 @@ +const unsigned char server_cert[] = { + 0x30, 0x82, 0x03, 0x10, 0x30, 0x82, 0x02, 0xb5, 0xa0, 0x03, 0x02, 0x01, + 0x02, 0x02, 0x09, 0x00, 0xef, 0x46, 0xc7, 0xa4, 0x9b, 0xbb, 0x60, 0xd3, + 0x30, 0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x04, 0x03, 0x02, + 0x30, 0x81, 0x8f, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, + 0x13, 0x02, 0x55, 0x53, 0x31, 0x13, 0x30, 0x11, 0x06, 0x03, 0x55, 0x04, + 0x08, 0x0c, 0x0a, 0x57, 0x61, 0x73, 0x68, 0x69, 0x6e, 0x67, 0x74, 0x6f, + 0x6e, 0x31, 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x07, + 0x53, 0x65, 0x61, 0x74, 0x74, 0x6c, 0x65, 0x31, 0x10, 0x30, 0x0e, 0x06, + 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x07, 0x45, 0x6c, 0x69, 0x70, 0x74, 0x69, + 0x63, 0x31, 0x0c, 0x30, 0x0a, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x03, + 0x45, 0x43, 0x43, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, 0x04, 0x03, + 0x0c, 0x0f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, + 0x6c, 0x2e, 0x63, 0x6f, 0x6d, 0x31, 0x1f, 0x30, 0x1d, 0x06, 0x09, 0x2a, + 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x09, 0x01, 0x16, 0x10, 0x69, 0x6e, + 0x66, 0x6f, 0x40, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, 0x2e, 0x63, + 0x6f, 0x6d, 0x30, 0x1e, 0x17, 0x0d, 0x31, 0x36, 0x30, 0x38, 0x31, 0x31, + 0x32, 0x30, 0x30, 0x37, 0x33, 0x38, 0x5a, 0x17, 0x0d, 0x31, 0x39, 0x30, + 0x35, 0x30, 0x38, 0x32, 0x30, 0x30, 0x37, 0x33, 0x38, 0x5a, 0x30, 0x81, + 0x8f, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02, + 0x55, 0x53, 0x31, 0x13, 0x30, 0x11, 0x06, 0x03, 0x55, 0x04, 0x08, 0x0c, + 0x0a, 0x57, 0x61, 0x73, 0x68, 0x69, 0x6e, 0x67, 0x74, 0x6f, 0x6e, 0x31, + 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x07, 0x53, 0x65, + 0x61, 0x74, 0x74, 0x6c, 0x65, 0x31, 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, + 0x04, 0x0a, 0x0c, 0x07, 0x45, 0x6c, 0x69, 0x70, 0x74, 0x69, 0x63, 0x31, + 0x0c, 0x30, 0x0a, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x03, 0x45, 0x43, + 0x43, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x0f, + 0x77, 0x77, 0x77, 0x2e, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, 0x2e, + 0x63, 0x6f, 0x6d, 0x31, 0x1f, 0x30, 0x1d, 0x06, 0x09, 0x2a, 0x86, 0x48, + 0x86, 0xf7, 0x0d, 0x01, 0x09, 0x01, 0x16, 0x10, 0x69, 0x6e, 0x66, 0x6f, + 0x40, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, 0x2e, 0x63, 0x6f, 0x6d, + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x02, + 0x01, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0xbb, 0x33, 0xac, 0x4c, 0x27, 0x50, 0x4a, 0xc6, 0x4a, + 0xa5, 0x04, 0xc3, 0x3c, 0xde, 0x9f, 0x36, 0xdb, 0x72, 0x2d, 0xce, 0x94, + 0xea, 0x2b, 0xfa, 0xcb, 0x20, 0x09, 0x39, 0x2c, 0x16, 0xe8, 0x61, 0x02, + 0xe9, 0xaf, 0x4d, 0xd3, 0x02, 0x93, 0x9a, 0x31, 0x5b, 0x97, 0x92, 0x21, + 0x7f, 0xf0, 0xcf, 0x18, 0xda, 0x91, 0x11, 0x02, 0x34, 0x86, 0xe8, 0x20, + 0x58, 0x33, 0x0b, 0x80, 0x34, 0x89, 0xd8, 0xa3, 0x81, 0xf7, 0x30, 0x81, + 0xf4, 0x30, 0x1d, 0x06, 0x03, 0x55, 0x1d, 0x0e, 0x04, 0x16, 0x04, 0x14, + 0x5d, 0x5d, 0x26, 0xef, 0xac, 0x7e, 0x36, 0xf9, 0x9b, 0x76, 0x15, 0x2b, + 0x4a, 0x25, 0x02, 0x23, 0xef, 0xb2, 0x89, 0x30, 0x30, 0x81, 0xc4, 0x06, + 0x03, 0x55, 0x1d, 0x23, 0x04, 0x81, 0xbc, 0x30, 0x81, 0xb9, 0x80, 0x14, + 0x5d, 0x5d, 0x26, 0xef, 0xac, 0x7e, 0x36, 0xf9, 0x9b, 0x76, 0x15, 0x2b, + 0x4a, 0x25, 0x02, 0x23, 0xef, 0xb2, 0x89, 0x30, 0xa1, 0x81, 0x95, 0xa4, + 0x81, 0x92, 0x30, 0x81, 0x8f, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, + 0x04, 0x06, 0x13, 0x02, 0x55, 0x53, 0x31, 0x13, 0x30, 0x11, 0x06, 0x03, + 0x55, 0x04, 0x08, 0x0c, 0x0a, 0x57, 0x61, 0x73, 0x68, 0x69, 0x6e, 0x67, + 0x74, 0x6f, 0x6e, 0x31, 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x04, 0x07, + 0x0c, 0x07, 0x53, 0x65, 0x61, 0x74, 0x74, 0x6c, 0x65, 0x31, 0x10, 0x30, + 0x0e, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x07, 0x45, 0x6c, 0x69, 0x70, + 0x74, 0x69, 0x63, 0x31, 0x0c, 0x30, 0x0a, 0x06, 0x03, 0x55, 0x04, 0x0b, + 0x0c, 0x03, 0x45, 0x43, 0x43, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, + 0x04, 0x03, 0x0c, 0x0f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x6f, 0x6c, 0x66, + 0x73, 0x73, 0x6c, 0x2e, 0x63, 0x6f, 0x6d, 0x31, 0x1f, 0x30, 0x1d, 0x06, + 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x09, 0x01, 0x16, 0x10, + 0x69, 0x6e, 0x66, 0x6f, 0x40, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, + 0x2e, 0x63, 0x6f, 0x6d, 0x82, 0x09, 0x00, 0xef, 0x46, 0xc7, 0xa4, 0x9b, + 0xbb, 0x60, 0xd3, 0x30, 0x0c, 0x06, 0x03, 0x55, 0x1d, 0x13, 0x04, 0x05, + 0x30, 0x03, 0x01, 0x01, 0xff, 0x30, 0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, + 0xce, 0x3d, 0x04, 0x03, 0x02, 0x03, 0x49, 0x00, 0x30, 0x46, 0x02, 0x21, + 0x00, 0xf1, 0xd0, 0xa6, 0x3e, 0x83, 0x33, 0x24, 0xd1, 0x7a, 0x05, 0x5f, + 0x1e, 0x0e, 0xbd, 0x7d, 0x6b, 0x33, 0xe9, 0xf2, 0x86, 0xf3, 0xf3, 0x3d, + 0xa9, 0xef, 0x6a, 0x87, 0x31, 0xb3, 0xb7, 0x7e, 0x50, 0x02, 0x21, 0x00, + 0xf0, 0x60, 0xdd, 0xce, 0xa2, 0xdb, 0x56, 0xec, 0xd9, 0xf4, 0xe4, 0xe3, + 0x25, 0xd4, 0xb0, 0xc9, 0x25, 0x7d, 0xca, 0x7a, 0x5d, 0xba, 0xc4, 0xb2, + 0xf6, 0x7d, 0x04, 0xc7, 0xbd, 0x62, 0xc9, 0x20 +}; +unsigned int server_cert_len = 788; +const unsigned char server_key[] = { + 0x30, 0x77, 0x02, 0x01, 0x01, 0x04, 0x20, 0x45, 0xb6, 0x69, 0x02, 0x73, + 0x9c, 0x6c, 0x85, 0xa1, 0x38, 0x5b, 0x72, 0xe8, 0xe8, 0xc7, 0xac, 0xc4, + 0x03, 0x8d, 0x53, 0x35, 0x04, 0xfa, 0x6c, 0x28, 0xdc, 0x34, 0x8d, 0xe1, + 0xa8, 0x09, 0x8c, 0xa0, 0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, + 0x03, 0x01, 0x07, 0xa1, 0x44, 0x03, 0x42, 0x00, 0x04, 0xbb, 0x33, 0xac, + 0x4c, 0x27, 0x50, 0x4a, 0xc6, 0x4a, 0xa5, 0x04, 0xc3, 0x3c, 0xde, 0x9f, + 0x36, 0xdb, 0x72, 0x2d, 0xce, 0x94, 0xea, 0x2b, 0xfa, 0xcb, 0x20, 0x09, + 0x39, 0x2c, 0x16, 0xe8, 0x61, 0x02, 0xe9, 0xaf, 0x4d, 0xd3, 0x02, 0x93, + 0x9a, 0x31, 0x5b, 0x97, 0x92, 0x21, 0x7f, 0xf0, 0xcf, 0x18, 0xda, 0x91, + 0x11, 0x02, 0x34, 0x86, 0xe8, 0x20, 0x58, 0x33, 0x0b, 0x80, 0x34, 0x89, + 0xd8 +}; +unsigned int server_key_len = 121; diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.c new file mode 100644 index 000000000..a8a6385fc --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.c @@ -0,0 +1,217 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * This file is a modified version of the lwIP web server demo. The original
+ * author is unknown because the file didn't contain any license information.
+ *
+ * The HTTPS version is Copyright (C) 2017 - WolfSSL Inc. and is based on the
+ * demo HTTP code of ChibiOS.
+ */
+
+
+/**
+ * @file web.c
+ * @brief HTTPS server wrapper thread code.
+ * @addtogroup WEB_THREAD
+ * @{
+ */
+
+#include <ctype.h>
+
+#include "ch.h"
+
+#include "lwip/opt.h"
+#include "lwip/arch.h"
+#include "lwip/api.h"
+
+#include "wolfssl_chibios.h"
+#include "web.h"
+
+#if LWIP_NETCONN
+
+static char url_buffer[WEB_MAX_PATH_SIZE];
+extern unsigned char server_cert[];
+extern unsigned int server_cert_len;
+extern unsigned char server_key[];
+extern unsigned int server_key_len;
+
+#define HEXTOI(x) (isdigit(x) ? (x) - '0' : (x) - 'a' + 10)
+
+/**
+ * @brief Decodes an URL sting.
+ * @note The string is terminated by a zero or a separator.
+ *
+ * @param[in] url encoded URL string
+ * @param[out] buf buffer for the processed string
+ * @param[in] max max number of chars to copy into the buffer
+ * @return The conversion status.
+ * @retval false string converted.
+ * @retval true the string was not valid or the buffer overflowed
+ *
+ * @notapi
+ */
+static bool decode_url(const char *url, char *buf, size_t max) {
+
+ while (true) {
+ int h, l;
+ unsigned c = *url++;
+
+ switch (c) {
+ case 0:
+ case '\r':
+ case '\n':
+ case '\t':
+ case ' ':
+ case '?':
+ *buf = 0;
+ return false;
+ case '.':
+ if (max <= 1)
+ return true;
+
+ h = *(url + 1);
+ if (h == '.')
+ return true;
+
+ break;
+ case '%':
+ if (max <= 1)
+ return true;
+
+ h = tolower((int)*url++);
+ if (h == 0)
+ return true;
+ if (!isxdigit(h))
+ return true;
+
+ l = tolower((int)*url++);
+ if (l == 0)
+ return true;
+ if (!isxdigit(l))
+ return true;
+
+ c = (char)((HEXTOI(h) << 4) | HEXTOI(l));
+ break;
+ default:
+ if (max <= 1)
+ return true;
+
+ if (!isalnum(c) && (c != '_') && (c != '-') && (c != '+') &&
+ (c != '/'))
+ return true;
+
+ break;
+ }
+
+ *buf++ = c;
+ max--;
+ }
+}
+
+
+#define MAX_HTTPREQ_SIZE 256
+static const char http_html_hdr[] = "HTTP/1.1 200 OK\r\nContent-type: text/html\r\n\r\n";
+static const char http_index_html[] = "<html><head><title>Congrats!</title></head><body><h1>Welcome to chibiOS HTTPS server!</h1><p>Powered by LwIP + WolfSSL</body></html>";
+
+static char inbuf[MAX_HTTPREQ_SIZE];
+static void https_server_serve(sslconn *sc)
+{
+ int ret;
+
+ /* Read the data from the port, blocking if nothing yet there.
+ We assume the request (the part we care about) is in one netbuf.*/
+ ret = wolfSSL_read(sc->ssl, inbuf, MAX_HTTPREQ_SIZE);
+ if (ret >= 5 &&
+ inbuf[0] == 'G' &&
+ inbuf[1] == 'E' &&
+ inbuf[2] == 'T' &&
+ inbuf[3] == ' ' &&
+ inbuf[4] == '/') {
+
+ if (decode_url(inbuf + 4, url_buffer, WEB_MAX_PATH_SIZE)) {
+ /* Invalid URL handling.*/
+ return;
+ }
+
+ /* Send the HTML header
+ * subtract 1 from the size, since we dont send the \0 in the string
+ * NETCONN_NOCOPY: our data is const static, so no need to copy it
+ */
+ wolfSSL_write(sc->ssl, http_html_hdr, sizeof(http_html_hdr)-1);
+
+ /* Send our HTML page */
+ wolfSSL_write(sc->ssl, http_index_html, sizeof(http_index_html)-1);
+ }
+}
+
+/**
+ * @brief Stack area for the http thread.
+ */
+THD_WORKING_AREA(wa_https_server, WEB_THREAD_STACK_SIZE);
+
+/**
+ * @brssl HTTPS server thread.
+ */
+THD_FUNCTION(https_server, p) {
+ sslconn *sc, *newsc;
+ (void)p;
+ chRegSetThreadName("https");
+
+ /* Initialize wolfSSL */
+ wolfSSL_Init();
+
+ /* Create a new SSL connection handle */
+ sc = sslconn_new(NETCONN_TCP, wolfTLSv1_2_server_method());
+ if (!sc) {
+ while(1) {}
+ }
+
+ /* Load certificate file for the HTTPS server */
+ if (wolfSSL_CTX_use_certificate_buffer(sc->ctx, server_cert,
+ server_cert_len, SSL_FILETYPE_ASN1 ) != SSL_SUCCESS)
+ while(1) {}
+
+ /* Load the private key */
+ if (wolfSSL_CTX_use_PrivateKey_buffer(sc->ctx, server_key,
+ server_key_len, SSL_FILETYPE_ASN1 ) != SSL_SUCCESS)
+ while(1) {}
+
+ /* Bind to port 443 (HTTPS) with default IP address */
+ netconn_bind(sc->conn, NULL, WEB_THREAD_PORT);
+
+ /* Put the connection into LISTEN state */
+ netconn_listen(sc->conn);
+
+ /* Goes to the final priority after initialization.*/
+ chThdSetPriority(WEB_THREAD_PRIORITY);
+
+ /* Listening loop */
+ while (true) {
+ newsc = sslconn_accept(sc);
+ if (!newsc) {
+ chThdSleepMilliseconds(500);
+ continue;
+ }
+ /* New connection: a new SSL connector is spawned */
+ https_server_serve(newsc);
+ sslconn_close(newsc);
+ }
+}
+
+#endif /* LWIP_NETCONN */
+
+/** @} */
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.h new file mode 100644 index 000000000..e43139d11 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.h @@ -0,0 +1,55 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file web.h
+ * @brief HTTP server wrapper thread macros and structures.
+ * @addtogroup WEB_THREAD
+ * @{
+ */
+
+#ifndef WEB_H
+#define WEB_H
+
+#if !defined(WEB_THREAD_STACK_SIZE)
+#define WEB_THREAD_STACK_SIZE (16 * 1024)
+#endif
+
+#if !defined(WEB_THREAD_PORT)
+#define WEB_THREAD_PORT 443
+#endif
+
+#if !defined(WEB_THREAD_PRIORITY)
+#define WEB_THREAD_PRIORITY (LOWPRIO + 2)
+#endif
+
+#if !defined(WEB_MAX_PATH_SIZE)
+#define WEB_MAX_PATH_SIZE 128
+#endif
+
+extern THD_WORKING_AREA(wa_https_server, WEB_THREAD_STACK_SIZE);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ THD_FUNCTION(https_server, p);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* WEB_H */
+
+/** @} */
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.c new file mode 100644 index 000000000..831b423b7 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.c @@ -0,0 +1,116 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+/*
+ * **** This file incorporates work covered by the following copyright and ****
+ * **** permission notice: ****
+ *
+ * Copyright (C) 2006-2017 wolfSSL Inc.
+ *
+ * This file is part of wolfSSL.
+ *
+ * wolfSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * wolfSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
+ *
+ */
+
+#include "ch.h"
+#include "wolfssl_chibios.h"
+#include <string.h>
+
+
+
+#ifndef ST2S
+# define ST2S(n) (((n) + CH_CFG_ST_FREQUENCY - 1UL) / CH_CFG_ST_FREQUENCY)
+#endif
+
+#ifndef ST2MS
+#define ST2MS(n) (((n) * 1000UL + CH_CFG_ST_FREQUENCY - 1UL) / CH_CFG_ST_FREQUENCY)
+#endif
+
+
+word32 LowResTimer(void)
+{
+ systime_t t = chVTGetSystemTimeX();
+ return ST2S(t);
+}
+
+uint32_t TimeNowInMilliseconds(void)
+{
+ systime_t t = chVTGetSystemTimeX();
+ return ST2MS(t);
+}
+
+void *chHeapRealloc (void *addr, uint32_t size)
+{
+ union heap_header *hp;
+ uint32_t prev_size, new_size;
+
+ void *ptr;
+
+ if(addr == NULL) {
+ return chHeapAlloc(NULL, size);
+ }
+
+ /* previous allocated segment is preceded by an heap_header */
+ hp = addr - sizeof(union heap_header);
+ prev_size = hp->used.size; /* size is always multiple of 8 */
+
+ /* check new size memory alignment */
+ if(size % 8 == 0) {
+ new_size = size;
+ }
+ else {
+ new_size = ((int) (size / 8)) * 8 + 8;
+ }
+
+ if(prev_size >= new_size) {
+ return addr;
+ }
+
+ ptr = chHeapAlloc(NULL, size);
+ if(ptr == NULL) {
+ return NULL;
+ }
+
+ memcpy(ptr, addr, prev_size);
+
+ chHeapFree(addr);
+
+ return ptr;
+}
+
+void *chibios_alloc(void *heap, int size)
+{
+ return chHeapAlloc(heap, size);
+}
+
+void chibios_free(void *ptr)
+{
+ if (ptr)
+ chHeapFree(ptr);
+}
+
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.h new file mode 100644 index 000000000..e67d8f14c --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.h @@ -0,0 +1,57 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+/*
+ * **** This file incorporates work covered by the following copyright and ****
+ * **** permission notice: ****
+ *
+ * Copyright (C) 2006-2017 wolfSSL Inc.
+ *
+ * This file is part of wolfSSL.
+ *
+ * wolfSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * wolfSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
+ *
+ */
+#ifndef WOLFSSL_SK_H
+#define WOLFSSL_SK_H
+#include "wolfssl/ssl.h"
+#include "wolfssl/wolfcrypt/types.h"
+
+#include "user_settings.h"
+#define XMALLOC(s,h,t) chibios_alloc(h,s)
+#define XFREE(p,h,t) chibios_free(p)
+
+
+
+int wolfssl_send_cb(WOLFSSL* ssl, char *buf, int sz, void *ctx);
+int wolfssl_recv_cb(WOLFSSL *ssl, char *buf, int sz, void *ctx);
+
+void *chibios_alloc(void *heap, int size);
+void chibios_free(void *ptr);
+word32 LowResTimer(void);
+
+#endif
diff --git a/ext/wolfssl-3.12.2-patched-halcrypto.7z b/ext/wolfssl-3.12.2-patched-halcrypto.7z Binary files differnew file mode 100644 index 000000000..09cf48197 --- /dev/null +++ b/ext/wolfssl-3.12.2-patched-halcrypto.7z diff --git a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/sama5d2x.h b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/sama5d2x.h index 335ce8164..81bb6a7fe 100644 --- a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/sama5d2x.h +++ b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/sama5d2x.h @@ -62,12 +62,6 @@ #error "Please select first the target SAMA5D2x device used in your application (in sama5d2x.h file)"
#endif
-/**@} */
-/*
- * Wrapper for WOLFSSL
- * TODO: to remove
- */
-#define Aes wc_Aes
/**
* @brief SAMA5D2 Family
* @{
diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_aes_lld.c b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_aes_lld.c index b490b05bc..0ed4af4a2 100644 --- a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_aes_lld.c +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_aes_lld.c @@ -12,7 +12,7 @@ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-*/
+ */
#include "hal.h"
#if (HAL_USE_CRY == TRUE) || defined(__DOXYGEN__)
@@ -83,11 +83,9 @@ void sama_aes_lld_set_input(uint32_t* data) { uint8_t size = 4;
if ((AES->AES_MR & AES_MR_OPMOD_Msk) == AES_MR_OPMOD_CFB) {
- if ((AES->AES_MR & AES_MR_CFBS_Msk) ==
- AES_MR_CFBS_SIZE_128BIT)
+ if ((AES->AES_MR & AES_MR_CFBS_Msk) == AES_MR_CFBS_SIZE_128BIT)
size = 4;
- else if ((AES->AES_MR & AES_MR_CFBS_Msk) ==
- AES_MR_CFBS_SIZE_64BIT)
+ else if ((AES->AES_MR & AES_MR_CFBS_Msk) == AES_MR_CFBS_SIZE_64BIT)
size = 2;
else
size = 1;
@@ -113,13 +111,13 @@ cryerror_t sama_aes_lld_process_polling(CRYDriver *cryp, aesparams *params, cryerror_t ret;
osalMutexLock(&cryp->mutex);
-//AES soft reset
+ //AES soft reset
AES->AES_CR = AES_CR_SWRST;
-//AES set op mode
+ //AES set op mode
AES->AES_MR |= ((AES_MR_OPMOD_Msk & (params->mode)) | AES_MR_CKEY_PASSWD);
-//AES set key size
+ //AES set key size
ret = sama_aes_lld_set_key_size(cryp->key0_size);
if (ret == CRY_NOERROR) {
@@ -137,10 +135,9 @@ cryerror_t sama_aes_lld_process_polling(CRYDriver *cryp, aesparams *params, else
AES->AES_MR &= ~AES_MR_CIPHER;
- AES->AES_MR |= (((AES_MR_SMOD_Msk & (AES_MR_SMOD_MANUAL_START)))
- | AES_MR_CKEY_PASSWD);
+ AES->AES_MR |= (((AES_MR_SMOD_Msk & (AES_MR_SMOD_MANUAL_START))) | AES_MR_CKEY_PASSWD);
-//Enable aes interrupt
+ //Enable aes interrupt
AES->AES_IER = AES_IER_DATRDY;
for (i = 0; i < indata_len; i += params->block_size) {
@@ -149,8 +146,7 @@ cryerror_t sama_aes_lld_process_polling(CRYDriver *cryp, aesparams *params, AES->AES_CR = AES_CR_START;
- while ((AES->AES_ISR & AES_ISR_DATRDY) != AES_ISR_DATRDY)
- ;
+ while ((AES->AES_ISR & AES_ISR_DATRDY) != AES_ISR_DATRDY);
sama_aes_lld_get_output((uint32_t *) ((out) + i));
}
@@ -165,7 +161,7 @@ cryerror_t sama_aes_lld_process_polling(CRYDriver *cryp, aesparams *params, cryerror_t sama_aes_lld_process_dma(CRYDriver *cryp, aesparams *params,
const uint8_t *in, uint8_t *out, size_t indata_len) {
-
+#if defined(SAMA_DMA_REQUIRED)
cryerror_t ret;
osalDbgAssert(cryp->thread == NULL, "already waiting");
@@ -187,26 +183,26 @@ cryerror_t sama_aes_lld_process_dma(CRYDriver *cryp, aesparams *params, cryp->dmawith = DMA_DATA_WIDTH_BYTE;
cryp->rxdmamode = XDMAC_CC_TYPE_PER_TRAN |
- XDMAC_CC_PROT_SEC |
- XDMAC_CC_MBSIZE_SINGLE |
- XDMAC_CC_DSYNC_PER2MEM | XDMAC_CC_CSIZE(cryp->dmachunksize) |
- XDMAC_CC_DWIDTH(cryp->dmawith) |
- XDMAC_CC_SIF_AHB_IF1 |
- XDMAC_CC_DIF_AHB_IF0 |
- XDMAC_CC_SAM_FIXED_AM |
- XDMAC_CC_DAM_INCREMENTED_AM |
- XDMAC_CC_PERID(PERID_AES_RX);
+ XDMAC_CC_PROT_SEC |
+ XDMAC_CC_MBSIZE_SINGLE |
+ XDMAC_CC_DSYNC_PER2MEM | XDMAC_CC_CSIZE(cryp->dmachunksize) |
+ XDMAC_CC_DWIDTH(cryp->dmawith) |
+ XDMAC_CC_SIF_AHB_IF1 |
+ XDMAC_CC_DIF_AHB_IF0 |
+ XDMAC_CC_SAM_FIXED_AM |
+ XDMAC_CC_DAM_INCREMENTED_AM |
+ XDMAC_CC_PERID(PERID_AES_RX);
cryp->txdmamode = XDMAC_CC_TYPE_PER_TRAN |
- XDMAC_CC_PROT_SEC |
- XDMAC_CC_MBSIZE_SINGLE |
- XDMAC_CC_DSYNC_MEM2PER | XDMAC_CC_CSIZE(cryp->dmachunksize) |
- XDMAC_CC_DWIDTH(cryp->dmawith) |
- XDMAC_CC_SIF_AHB_IF0 |
- XDMAC_CC_DIF_AHB_IF1 |
- XDMAC_CC_SAM_INCREMENTED_AM |
- XDMAC_CC_DAM_FIXED_AM |
- XDMAC_CC_PERID(PERID_AES_TX);
+ XDMAC_CC_PROT_SEC |
+ XDMAC_CC_MBSIZE_SINGLE |
+ XDMAC_CC_DSYNC_MEM2PER | XDMAC_CC_CSIZE(cryp->dmachunksize) |
+ XDMAC_CC_DWIDTH(cryp->dmawith) |
+ XDMAC_CC_SIF_AHB_IF0 |
+ XDMAC_CC_DIF_AHB_IF1 |
+ XDMAC_CC_SAM_INCREMENTED_AM |
+ XDMAC_CC_DAM_FIXED_AM |
+ XDMAC_CC_PERID(PERID_AES_TX);
dmaChannelSetMode(cryp->dmarx, cryp->rxdmamode);
dmaChannelSetMode(cryp->dmatx, cryp->txdmamode);
@@ -223,10 +219,10 @@ cryerror_t sama_aes_lld_process_dma(CRYDriver *cryp, aesparams *params, dmaChannelSetTransactionSize(cryp->dmarx, ( indata_len / DMA_DATA_WIDTH_TO_BYTE(cryp->dmawith)));
//AES soft reset
- AES->AES_CR = AES_CR_SWRST;
+ AES->AES_CR = AES_CR_SWRST;
//AES set op mode
- AES->AES_MR |= ((AES_MR_OPMOD_Msk & (params->mode)) | AES_MR_CKEY_PASSWD);
+ AES->AES_MR |= ((AES_MR_OPMOD_Msk & (params->mode)) | AES_MR_CKEY_PASSWD);
//AES set key size
ret = sama_aes_lld_set_key_size(cryp->key0_size);
@@ -260,7 +256,7 @@ cryerror_t sama_aes_lld_process_dma(CRYDriver *cryp, aesparams *params, osalSysUnlock();
osalMutexUnlock(&cryp->mutex);
-
+#endif //#if defined(SAMA_DMA_REQUIRED)
return CRY_NOERROR;
}
diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h index b7a1a9fae..029a209ac 100644 --- a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_crypto_lld.h @@ -42,6 +42,21 @@ extern void samaCryptoDriverDisable(CRYDriver *cryp); #define DMA_DATA_WIDTH_TO_BYTE(w) (1 << w)
+#ifndef SAMA_CRY_CRYD1_DMA_IRQ_PRIORITY
+#define SAMA_CRY_CRYD1_DMA_IRQ_PRIORITY 4
+#endif
+
+#ifndef SAMA_CRY_CRYD1_IRQ_PRIORITY
+#define SAMA_CRY_CRYD1_IRQ_PRIORITY 4
+#endif
+
+#ifndef SAMA_CRY_DMA_ERROR_HOOK
+#define SAMA_CRY_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
+#endif
+
+#ifndef SAMA_CRY_SHA_UPDATE_LEN_MAX
+#define SAMA_CRY_SHA_UPDATE_LEN_MAX 128*1024
+#endif
#include "sama_aes_lld.h"
diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.c b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.c index 79432e008..a2c925cd5 100644 --- a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.c +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.c @@ -12,7 +12,7 @@ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-*/
+ */
#include "hal.h"
#include <string.h>
#if (HAL_USE_CRY == TRUE) || defined(__DOXYGEN__)
@@ -24,14 +24,7 @@ static inline uint32_t min_u32(uint32_t a, uint32_t b) {
return a < b ? a : b;
}
-struct sha_data {
- uint32_t remaining;
- uint32_t processed;
- uint32_t block_size;
- uint32_t output_size;
- shadalgo_t algo;
- uint8_t hmac;
-};
+
static uint32_t shaOutputSize(shadalgo_t algo);
@@ -39,11 +32,11 @@ static uint32_t shadPaddedMessSize(uint8_t mode, uint32_t len); uint8_t shaBlockSize(shadalgo_t algo);
static void loadData(const uint8_t* data, int len);
static void readData(const uint8_t* data, int len);
-static uint32_t processBlockPolling(CRYDriver *cryp, uint32_t len, uint32_t block_size);
-static uint32_t processBlockDMA(CRYDriver *cryp, uint32_t len, uint32_t block_size);
+static uint32_t processBlockPolling(const uint8_t *data,uint32_t len, uint32_t block_size);
+static uint32_t processBlockDMA(CRYDriver *cryp,const uint8_t *data, uint32_t len, uint32_t block_size);
static void update(CRYDriver *cryp,struct sha_data *shadata,const uint8_t* data, uint32_t data_size);
-static uint32_t fillPadding(struct sha_data *shadata, uint32_t len, uint8_t* buffer);
+static uint32_t fillPadding(struct sha_data *shadata, uint32_t len, uint8_t* buffer,size_t buffer_size);
@@ -53,62 +46,99 @@ uint8_t shaDigestSize(shadalgo_t algo) {
switch(algo)
{
- case CRY_SHA_1:
- return 20;
- break;
- case CRY_SHA_224:
- return 28;
- break;
- case CRY_SHA_256:
- return 32;
- break;
- case CRY_SHA_384:
- return 48;
- break;
- case CRY_SHA_512:
- return 64;
- break;
- default:
- return 0;
+ case CRY_SHA_1:
+ return 20;
+ break;
+ case CRY_SHA_224:
+ return 28;
+ break;
+ case CRY_SHA_256:
+ return 32;
+ break;
+ case CRY_SHA_384:
+ return 48;
+ break;
+ case CRY_SHA_512:
+ return 64;
+ break;
+ default:
+ return 0;
}
}
-int sha_finish(CRYDriver *cryp,struct sha_data *shadata,const uint8_t* buffer,uint32_t buffer_size)
+static cryerror_t sha_finish(CRYDriver *cryp,struct sha_data *shadata,const uint8_t* buffer,uint32_t buffer_size)
{
uint32_t padding_len=0;
+
if (buffer_size < shadata->output_size)
- return -1;
+ return CRY_ERR_INV_ALGO;
//pad data for the end of the buffer
- padding_len = fillPadding(shadata,
- shadata->processed + shadata->remaining,
- &cryp->sha_buffer[shadata->remaining]
- );
+ padding_len = fillPadding(shadata,shadata->processed + shadata->remaining,&shadata->sha_buffer[shadata->remaining],shadata->sha_buffer_size - shadata->remaining);
if (cryp->config->transfer_mode == TRANSFER_POLLING)
- processBlockPolling(cryp, shadata->remaining + padding_len, shadata->block_size);
+ processBlockPolling(shadata->sha_buffer,shadata->remaining + padding_len, shadata->block_size);
else
- processBlockDMA(cryp, shadata->remaining + padding_len, shadata->block_size);
+ processBlockDMA(cryp,shadata->sha_buffer,shadata->remaining + padding_len, shadata->block_size);
readData(buffer, buffer_size);
+ return CRY_NOERROR;
- return 0;
}
-cryerror_t sama_sha_lld_process(CRYDriver *cryp,
- shaparams_t *params,
- const uint8_t *in,
- uint8_t *out,
- size_t indata_len
- )
+cryerror_t sama_sha_lld_update(CRYDriver *cryp, struct sha_data *sha)
+{
+ uint32_t buf_in_size;
+ uint8_t* p;
+ osalMutexLock(&cryp->mutex);
+
+ p = (uint8_t*)sha->in;
+
+ while (sha->indata_len) {
+ buf_in_size = min_u32(sha->indata_len, SAMA_CRY_SHA_UPDATE_LEN_MAX);
+
+ //First block
+ if (!sha->processed) {
+ SHA->SHA_CR = SHA_CR_FIRST;
+ }
+
+ update(cryp, sha, p, buf_in_size);
+
+ sha->indata_len -= buf_in_size;
+ p += buf_in_size;
+ }
+ osalMutexUnlock(&cryp->mutex);
+
+ return CRY_NOERROR;
+}
+
+cryerror_t sama_sha_lld_final(CRYDriver *cryp, struct sha_data *sha)
+{
+ cryerror_t err = CRY_NOERROR;
+ osalMutexLock(&cryp->mutex);
+
+ if (!sha->processed) {
+ SHA->SHA_CR = SHA_CR_FIRST;
+ }
+
+ err = sha_finish(cryp, sha, sha->out, sha->output_size);
+
+ osalMutexUnlock(&cryp->mutex);
+
+ return err;
+}
+
+
+
+cryerror_t sama_sha_lld_init(CRYDriver *cryp, struct sha_data *sha)
{
uint32_t algoregval;
- struct sha_data shadata;
+ cryerror_t cryerr = CRY_NOERROR;
if (!(cryp->enabledPer & SHA_PER)) {
cryp->enabledPer |= SHA_PER;
@@ -117,17 +147,19 @@ cryerror_t sama_sha_lld_process(CRYDriver *cryp, osalMutexLock(&cryp->mutex);
- shadata.processed = 0;
- shadata.remaining = 0;
- shadata.output_size = shaOutputSize(params->algo);
- shadata.block_size = shaBlockSize(params->algo);
- shadata.algo = params->algo;
- if (shadata.output_size == 0) {
+ sha->processed = 0;
+ sha->remaining = 0;
+ sha->output_size = shaOutputSize(sha->algo);
+ sha->block_size = shaBlockSize(sha->algo);
+
+
+ if (sha->output_size == 0) {
+ osalMutexUnlock(&cryp->mutex);
return CRY_ERR_INV_ALGO;
}
- switch (params->algo) {
+ switch (sha->algo) {
case CRY_SHA_1:
algoregval = SHA_MR_ALGO_SHA1;
break;
@@ -148,12 +180,15 @@ cryerror_t sama_sha_lld_process(CRYDriver *cryp, break;
#endif
default:
+ osalMutexUnlock(&cryp->mutex);
return CRY_ERR_INV_ALGO;
}
+
//soft reset
SHA->SHA_CR = SHA_CR_SWRST;
+
if (cryp->config->transfer_mode == TRANSFER_POLLING) {
algoregval |= SHA_MR_SMOD_MANUAL_START;
} else {
@@ -163,15 +198,15 @@ cryerror_t sama_sha_lld_process(CRYDriver *cryp, cryp->dmachunksize = DMA_CHUNK_SIZE_16;
cryp->txdmamode = XDMAC_CC_TYPE_PER_TRAN |
- XDMAC_CC_PROT_SEC |
- XDMAC_CC_MBSIZE_SINGLE |
- XDMAC_CC_DSYNC_MEM2PER | XDMAC_CC_CSIZE(cryp->dmachunksize) |
- XDMAC_CC_DWIDTH(cryp->dmawith) |
- XDMAC_CC_SIF_AHB_IF0 |
- XDMAC_CC_DIF_AHB_IF1 |
- XDMAC_CC_SAM_INCREMENTED_AM |
- XDMAC_CC_DAM_FIXED_AM |
- XDMAC_CC_PERID(PERID_SHA_TX);
+ XDMAC_CC_PROT_SEC |
+ XDMAC_CC_MBSIZE_SINGLE |
+ XDMAC_CC_DSYNC_MEM2PER | XDMAC_CC_CSIZE(cryp->dmachunksize) |
+ XDMAC_CC_DWIDTH(cryp->dmawith) |
+ XDMAC_CC_SIF_AHB_IF0 |
+ XDMAC_CC_DIF_AHB_IF1 |
+ XDMAC_CC_SAM_INCREMENTED_AM |
+ XDMAC_CC_DAM_FIXED_AM |
+ XDMAC_CC_PERID(PERID_SHA_TX);
cryp->rxdmamode = 0xFFFFFFFF;
@@ -184,31 +219,15 @@ cryerror_t sama_sha_lld_process(CRYDriver *cryp, //enable interrupt
SHA->SHA_IER = SHA_IER_DATRDY;
- uint32_t buf_in_size;
- const uint8_t *p = in;
-
- while (indata_len) {
- buf_in_size = min_u32(indata_len, SHA_UPDATE_LEN);
-
- //First block
- if (!shadata.processed) {
- SHA->SHA_CR = SHA_CR_FIRST;
- }
-
- update(cryp, &shadata, in, buf_in_size);
-
- p += buf_in_size;
- indata_len -= buf_in_size;
- }
- sha_finish(cryp, &shadata, out, shadata.output_size);
osalMutexUnlock(&cryp->mutex);
- return CRY_NOERROR;
+ return cryerr;
}
+
static uint32_t shaOutputSize(shadalgo_t algo)
{
switch (algo) {
@@ -253,7 +272,7 @@ uint8_t shaBlockSize(shadalgo_t algo) return 128;
}
- return 64;
+ return 64;
}
@@ -270,6 +289,7 @@ static void loadData(const uint8_t* data, int len) SHA->SHA_IODATAR[i - 16] = value;
}
}
+
static void readData(const uint8_t* data, int len)
{
int i;
@@ -277,19 +297,20 @@ static void readData(const uint8_t* data, int len) for (i = 0; i < (len / 4) && i < 16; i++) {
value = SHA->SHA_IODATAR[i];
- memcpy(&data[i * 4], &value, 4);
+ memcpy((uint8_t*)&data[i * 4], &value, 4);
}
}
-static uint32_t processBlockPolling(CRYDriver *cryp,uint32_t len, uint32_t block_size)
+static uint32_t processBlockPolling(const uint8_t *data,uint32_t len, uint32_t block_size)
{
uint32_t processed = 0;
+
while ((len - processed) >= block_size) {
// load data in the sha input registers
- loadData(&cryp->sha_buffer[processed], block_size);
+ loadData(&data[processed], block_size);
SHA->SHA_CR = SHA_CR_START;
@@ -302,7 +323,7 @@ static uint32_t processBlockPolling(CRYDriver *cryp,uint32_t len, uint32_t block return processed;
}
-static uint32_t processBlockDMA(CRYDriver *cryp, uint32_t len, uint32_t block_size)
+static uint32_t processBlockDMA(CRYDriver *cryp, const uint8_t *data,uint32_t len, uint32_t block_size)
{
uint32_t processed = 0;
@@ -310,7 +331,7 @@ static uint32_t processBlockDMA(CRYDriver *cryp, uint32_t len, uint32_t block_si // load data in the sha input registers
// Writing channel
- dmaChannelSetSource(cryp->dmatx, &cryp->sha_buffer[processed]);
+ dmaChannelSetSource(cryp->dmatx, &data[processed]);
dmaChannelSetDestination(cryp->dmatx, SHA->SHA_IDATAR);
dmaChannelSetTransactionSize(cryp->dmatx,
(block_size / DMA_DATA_WIDTH_TO_BYTE(cryp->dmawith)));
@@ -338,7 +359,7 @@ static void update(CRYDriver *cryp,struct sha_data *shadata,const uint8_t* data, if (shadata->remaining) {
//complete previous data
uint32_t complement = min_u32(data_size, shadata->block_size - shadata->remaining);
- memcpy(&cryp->sha_buffer[shadata->remaining], data, complement);
+ memcpy(&shadata->sha_buffer[shadata->remaining], data, complement);
shadata->remaining += complement;
data += complement;
data_size -= complement;
@@ -346,9 +367,9 @@ static void update(CRYDriver *cryp,struct sha_data *shadata,const uint8_t* data, //if data is complete process the block
if (shadata->remaining == shadata->block_size) {
if (cryp->config->transfer_mode == TRANSFER_POLLING )
- processBlockPolling(cryp,shadata->remaining, shadata->block_size);
+ processBlockPolling(shadata->sha_buffer,shadata->remaining, shadata->block_size);
else
- processBlockDMA(cryp, shadata->remaining, shadata->block_size);
+ processBlockDMA(cryp, shadata->sha_buffer,shadata->remaining, shadata->block_size);
shadata->processed += shadata->block_size;
shadata->remaining = 0;
@@ -360,9 +381,9 @@ static void update(CRYDriver *cryp,struct sha_data *shadata,const uint8_t* data, // Process blocks
if (cryp->config->transfer_mode == TRANSFER_POLLING )
- processed = processBlockPolling(cryp, data_size, shadata->block_size);
+ processed = processBlockPolling(data,data_size, shadata->block_size);
else
- processed = processBlockDMA(cryp, data_size, shadata->block_size);
+ processed = processBlockDMA(cryp, data,data_size, shadata->block_size);
shadata->processed += processed;
@@ -371,17 +392,20 @@ static void update(CRYDriver *cryp,struct sha_data *shadata,const uint8_t* data, if (shadata->remaining)
{
for (i=0;i<shadata->remaining;i++)
- cryp->sha_buffer[i] = data[processed+i];
+ shadata->sha_buffer[i] = data[processed+i];
}
}
-static uint32_t fillPadding(struct sha_data *shadata, uint32_t len, uint8_t* buffer)
+static uint32_t fillPadding(struct sha_data *shadata, uint32_t len, uint8_t* buffer,size_t buffer_size)
{
- uint32_t padding_len = shadPaddedMessSize(shadata->algo, len) - len;
- uint32_t k = padding_len - 9;
+ uint32_t padding_len,k;
+
+
+ padding_len = shadPaddedMessSize(shadata->algo, len);
+ padding_len -= len;
+ k = padding_len - 9;
- osalDbgAssert( padding_len <= (SHA_MAX_PADDING_LEN - shadata->remaining),
- "invalid buffer size");
+ osalDbgAssert( padding_len <= buffer_size,"invalid buffer size");
// Append "1" bit and seven "0" bits to the end of the message
diff --git a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.h b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.h index bc883aeed..e112e64e9 100644 --- a/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.h +++ b/os/hal/ports/SAMA/LLD/CRYPTOv1/sama_sha_lld.h @@ -17,13 +17,9 @@ #define CRYPTOLIB_LLD_SAMA_SHA_H_
-
-cryerror_t sama_sha_lld_process(CRYDriver *cryp,
- shaparams_t *params,
- const uint8_t *in,
- uint8_t *out,
- size_t indata_len
- );
+cryerror_t sama_sha_lld_init(CRYDriver *cryp, struct sha_data *sha);
+cryerror_t sama_sha_lld_update(CRYDriver *cryp, struct sha_data *sha);
+cryerror_t sama_sha_lld_final(CRYDriver *cryp, struct sha_data *sha);
diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c index 2e8a67309..5f1c62339 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.c @@ -12,7 +12,7 @@ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-*/
+ */
/**
* @file hal_crypto_lld.c
@@ -73,10 +73,11 @@ void cry_lld_init(void) { #endif
}
+
/**
* @brief Configures and activates the crypto peripheral.
*
- * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] cryp pointer to the @p CRYDriver object
*
* @notapi
*/
@@ -85,9 +86,9 @@ void cry_lld_start(CRYDriver *cryp) { if (cryp->state == CRY_STOP) {
//clear key
for (size_t i=0;i<KEY0_BUFFER_SIZE_W;i++)
- {
+ {
cryp->key0_buffer[i] = 0;
- }
+ }
#if PLATFORM_CRY_USE_CRY1
if (&CRYD1 == cryp) {
@@ -119,9 +120,11 @@ void cry_lld_stop(CRYDriver *cryp) { /**
* @brief Initializes the transient key for a specific algorithm.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] keyp pointer to the key data
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] algorithm the algorithm identifier
+ * @param[in] size key size in bytes
+ * @param[in] keyp pointer to the key data
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the specified algorithm is unknown or
* unsupported.
@@ -129,8 +132,11 @@ void cry_lld_stop(CRYDriver *cryp) { *
* @notapi
*/
-cryerror_t cry_lld_loadkey(CRYDriver *cryp, cryalgorithm_t algorithm,
- size_t size, const uint8_t *keyp) {
+cryerror_t cry_lld_loadkey(CRYDriver *cryp,
+ cryalgorithm_t algorithm,
+ size_t size,
+ const uint8_t *keyp) {
+
uint8_t *p = (uint8_t *)cryp->key0_buffer;
@@ -138,27 +144,27 @@ cryerror_t cry_lld_loadkey(CRYDriver *cryp, cryalgorithm_t algorithm, (void)algorithm;
- if (size <= HAL_CRY_MAX_KEY_SIZE)
+ if (size <= HAL_CRY_MAX_KEY_SIZE)
+ {
+ osalMutexLock(&cryp->mutex);
+ //clear key
+ for (size_t i=0;i<KEY0_BUFFER_SIZE_W;i++)
{
- osalMutexLock(&cryp->mutex);
- //clear key
- for (size_t i=0;i<KEY0_BUFFER_SIZE_W;i++)
- {
- cryp->key0_buffer[i] = 0;
- }
-
- for (size_t i=0;i<size;i++)
- {
- p[i] = keyp[i];
- }
- osalMutexUnlock(&cryp->mutex);
+ cryp->key0_buffer[i] = 0;
}
- else
+
+ for (size_t i=0;i<size;i++)
{
- return CRY_ERR_INV_KEY_SIZE;
+ p[i] = keyp[i];
}
+ osalMutexUnlock(&cryp->mutex);
+ }
+ else
+ {
+ return CRY_ERR_INV_KEY_SIZE;
+ }
- return CRY_NOERROR;
+ return CRY_NOERROR;
}
@@ -167,13 +173,13 @@ cryerror_t cry_lld_loadkey(CRYDriver *cryp, cryalgorithm_t algorithm, * @note The implementation of this function must guarantee that it can
* be called from any context.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -183,30 +189,33 @@ cryerror_t cry_lld_loadkey(CRYDriver *cryp, cryalgorithm_t algorithm, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_AES(CRYDriver *cryp, crykey_t key_id,
- const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_encrypt_AES(CRYDriver *cryp,
+ crykey_t key_id,
+ const uint8_t *in,
+ uint8_t *out) {
+
cryerror_t ret = CRY_NOERROR;
- aesparams params;
+ aesparams params;
- if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ if(key_id != 0 )
+ return CRY_ERR_INV_KEY_ID;
- if (!(cryp->enabledPer & AES_PER)) {
- cryp->enabledPer |= AES_PER;
- pmcEnableAES();
- }
+ if (!(cryp->enabledPer & AES_PER)) {
+ cryp->enabledPer |= AES_PER;
+ pmcEnableAES();
+ }
- params.encrypt = 1;
- params.block_size = 16;
- params.mode = 0;
- params.iv = NULL;
+ params.encrypt = 1;
+ params.block_size = 16;
+ params.mode = 0;
+ params.iv = NULL;
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, 16);
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, 16);
- return ret;
+ return ret;
}
/**
@@ -214,13 +223,13 @@ cryerror_t cry_lld_encrypt_AES(CRYDriver *cryp, crykey_t key_id, * @note The implementation of this function must guarantee that it can
* be called from any context.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] in buffer containing the input cyphertext
- * @param[out] out buffer for the output plaintext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] in buffer containing the input cyphertext
+ * @param[out] out buffer for the output plaintext
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -230,30 +239,33 @@ cryerror_t cry_lld_encrypt_AES(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_AES(CRYDriver *cryp, crykey_t key_id,
- const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_decrypt_AES(CRYDriver *cryp,
+ crykey_t key_id,
+ const uint8_t *in,
+ uint8_t *out) {
+
cryerror_t ret = CRY_NOERROR;
- aesparams params;
+ aesparams params;
- if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ if(key_id != 0 )
+ return CRY_ERR_INV_KEY_ID;
- if (!(cryp->enabledPer & AES_PER)) {
- cryp->enabledPer |= AES_PER;
- pmcEnableAES();
- }
+ if (!(cryp->enabledPer & AES_PER)) {
+ cryp->enabledPer |= AES_PER;
+ pmcEnableAES();
+ }
- params.encrypt = 0;
- params.block_size = 16;
- params.mode = 0;
- params.iv = NULL;
+ params.encrypt = 0;
+ params.block_size = 16;
+ params.mode = 0;
+ params.iv = NULL;
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, 16);
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, 16);
- return ret;
+ return ret;
}
/**
@@ -262,15 +274,15 @@ cryerror_t cry_lld_decrypt_AES(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of the selected key size
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of the selected key size
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -280,8 +292,11 @@ cryerror_t cry_lld_decrypt_AES(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_AES_ECB(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_encrypt_AES_ECB(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
@@ -315,15 +330,15 @@ cryerror_t cry_lld_encrypt_AES_ECB(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of the selected key size
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of the selected key size
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -333,13 +348,16 @@ cryerror_t cry_lld_encrypt_AES_ECB(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_AES_ECB(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_decrypt_AES_ECB(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ return CRY_ERR_INV_KEY_ID;
if (!(cryp->enabledPer & AES_PER)) {
cryp->enabledPer |= AES_PER;
@@ -347,15 +365,15 @@ cryerror_t cry_lld_decrypt_AES_ECB(CRYDriver *cryp, crykey_t key_id, }
params.encrypt = 0;
- params.block_size = 16;
- params.mode = AES_MR_OPMOD_ECB;
+ params.block_size = 16;
+ params.mode = AES_MR_OPMOD_ECB;
- if (cryp->config->transfer_mode == TRANSFER_POLLING)
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
- else
- ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
+ if (cryp->config->transfer_mode == TRANSFER_POLLING)
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
+ else
+ ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
@@ -368,16 +386,16 @@ cryerror_t cry_lld_decrypt_AES_ECB(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of the selected key size
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @param[in] iv 128 bits initial vector
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of the selected key size
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @param[in] iv 128 bits initial vector
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -387,13 +405,17 @@ cryerror_t cry_lld_decrypt_AES_ECB(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_encrypt_AES_CBC(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ return CRY_ERR_INV_KEY_ID;
if (!(cryp->enabledPer & AES_PER)) {
cryp->enabledPer |= AES_PER;
@@ -405,10 +427,10 @@ cryerror_t cry_lld_encrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id, params.mode = AES_MR_OPMOD_CBC;
params.iv = iv;
- if (cryp->config->transfer_mode == TRANSFER_POLLING)
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
- else
- ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
+ if (cryp->config->transfer_mode == TRANSFER_POLLING)
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
+ else
+ ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
@@ -421,16 +443,16 @@ cryerror_t cry_lld_encrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of the selected key size
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @param[in] iv 128 bits initial vector
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of the selected key size
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @param[in] iv 128 bits initial vector
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -440,13 +462,17 @@ cryerror_t cry_lld_encrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_decrypt_AES_CBC(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ return CRY_ERR_INV_KEY_ID;
if (!(cryp->enabledPer & AES_PER)) {
cryp->enabledPer |= AES_PER;
@@ -455,13 +481,13 @@ cryerror_t cry_lld_decrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id, }
params.encrypt = 0;
- params.block_size = 16;
- params.mode = AES_MR_OPMOD_CBC;
- params.iv = iv;
- if (cryp->config->transfer_mode == TRANSFER_POLLING)
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
- else
- ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
+ params.block_size = 16;
+ params.mode = AES_MR_OPMOD_CBC;
+ params.iv = iv;
+ if (cryp->config->transfer_mode == TRANSFER_POLLING)
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
+ else
+ ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
@@ -474,16 +500,16 @@ cryerror_t cry_lld_decrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of the selected key size
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @param[in] iv 128 bits initial vector
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of the selected key size
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @param[in] iv 128 bits initial vector
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -493,13 +519,17 @@ cryerror_t cry_lld_decrypt_AES_CBC(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_encrypt_AES_CFB(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ return CRY_ERR_INV_KEY_ID;
if (!(cryp->enabledPer & AES_PER)) {
cryp->enabledPer |= AES_PER;
@@ -507,31 +537,31 @@ cryerror_t cry_lld_encrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id, ;
}
params.encrypt = 1;
- params.block_size = 16;
- switch (cryp->config->cfbs) {
- case AES_CFBS_128:
- params.block_size = 16;
- break;
- case AES_CFBS_64:
- params.block_size = 8;
- break;
- case AES_CFBS_32:
- params.block_size = 4;
- break;
- case AES_CFBS_16:
- params.block_size = 2;
- break;
- case AES_CFBS_8:
- params.block_size = 1;
- break;
- }
- params.mode = AES_MR_OPMOD_CFB;
- params.iv = iv;
-
- if (cryp->config->transfer_mode == TRANSFER_POLLING)
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
- else
- ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
+ params.block_size = 16;
+ switch (cryp->config->cfbs) {
+ case AES_CFBS_128:
+ params.block_size = 16;
+ break;
+ case AES_CFBS_64:
+ params.block_size = 8;
+ break;
+ case AES_CFBS_32:
+ params.block_size = 4;
+ break;
+ case AES_CFBS_16:
+ params.block_size = 2;
+ break;
+ case AES_CFBS_8:
+ params.block_size = 1;
+ break;
+ }
+ params.mode = AES_MR_OPMOD_CFB;
+ params.iv = iv;
+
+ if (cryp->config->transfer_mode == TRANSFER_POLLING)
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
+ else
+ ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
return ret;
@@ -543,16 +573,16 @@ cryerror_t cry_lld_encrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of the selected key size
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @param[in] iv 128 bits initial vector
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of the selected key size
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @param[in] iv 128 bits initial vector
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -562,13 +592,17 @@ cryerror_t cry_lld_encrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_decrypt_AES_CFB(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ return CRY_ERR_INV_KEY_ID;
if (!(cryp->enabledPer & AES_PER)) {
cryp->enabledPer |= AES_PER;
@@ -577,31 +611,31 @@ cryerror_t cry_lld_decrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id, }
params.encrypt = 0;
- params.block_size = 16;
- switch (cryp->config->cfbs) {
- case AES_CFBS_128:
- params.block_size = 16;
- break;
- case AES_CFBS_64:
- params.block_size = 8;
- break;
- case AES_CFBS_32:
- params.block_size = 4;
- break;
- case AES_CFBS_16:
- params.block_size = 2;
- break;
- case AES_CFBS_8:
- params.block_size = 1;
- break;
- }
- params.mode = AES_MR_OPMOD_CFB;
- params.iv = iv;
-
- if (cryp->config->transfer_mode == TRANSFER_POLLING)
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
- else
- ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
+ params.block_size = 16;
+ switch (cryp->config->cfbs) {
+ case AES_CFBS_128:
+ params.block_size = 16;
+ break;
+ case AES_CFBS_64:
+ params.block_size = 8;
+ break;
+ case AES_CFBS_32:
+ params.block_size = 4;
+ break;
+ case AES_CFBS_16:
+ params.block_size = 2;
+ break;
+ case AES_CFBS_8:
+ params.block_size = 1;
+ break;
+ }
+ params.mode = AES_MR_OPMOD_CFB;
+ params.iv = iv;
+
+ if (cryp->config->transfer_mode == TRANSFER_POLLING)
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
+ else
+ ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
@@ -614,17 +648,17 @@ cryerror_t cry_lld_decrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of 16
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @param[in] iv 128 bits initial vector + counter, it contains
- * a 96 bits IV and a 32 bits counter
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of 16
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @param[in] iv 128 bits initial vector + counter, it contains
+ * a 96 bits IV and a 32 bits counter
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -634,13 +668,17 @@ cryerror_t cry_lld_decrypt_AES_CFB(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_AES_CTR(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_encrypt_AES_CTR(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
if(key_id != 0 )
- return CRY_ERR_INV_KEY_ID;
+ return CRY_ERR_INV_KEY_ID;
if (!(cryp->enabledPer & AES_PER)) {
cryp->enabledPer |= AES_PER;
@@ -649,13 +687,13 @@ cryerror_t cry_lld_encrypt_AES_CTR(CRYDriver *cryp, crykey_t key_id, }
params.encrypt = 1;
- params.block_size = 16;
- params.mode = AES_MR_OPMOD_CTR;
- params.iv = iv;
- if (cryp->config->transfer_mode == TRANSFER_POLLING)
- ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
- else
- ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
+ params.block_size = 16;
+ params.mode = AES_MR_OPMOD_CTR;
+ params.iv = iv;
+ if (cryp->config->transfer_mode == TRANSFER_POLLING)
+ ret = sama_aes_lld_process_polling(cryp, ¶ms, in, out, size);
+ else
+ ret = sama_aes_lld_process_dma(cryp, ¶ms, in, out, size);
@@ -668,17 +706,17 @@ cryerror_t cry_lld_encrypt_AES_CTR(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of 16
- * @param[in] in buffer containing the input cyphertext
- * @param[out] out buffer for the output plaintext
- * @param[in] iv 128 bits initial vector + counter, it contains
- * a 96 bits IV and a 32 bits counter
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of 16
+ * @param[in] in buffer containing the input cyphertext
+ * @param[out] out buffer for the output plaintext
+ * @param[in] iv 128 bits initial vector + counter, it contains
+ * a 96 bits IV and a 32 bits counter
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -688,8 +726,12 @@ cryerror_t cry_lld_encrypt_AES_CTR(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_AES_CTR(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_decrypt_AES_CTR(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
aesparams params;
@@ -720,21 +762,22 @@ cryerror_t cry_lld_decrypt_AES_CTR(CRYDriver *cryp, crykey_t key_id, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the text buffers, this number must be a
- * multiple of 16
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @param[in] iv 128 bits initial vector + counter, it contains
- * a 96 bits IV and a 32 bits counter
- * @param[in] aadsize size of the authentication data, this number must be a
- * multiple of 16
- * @param[in] aad buffer containing the authentication data
- * @param[in] authtag 128 bits buffer for the generated authentication tag
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the text buffers, this number must be a
+ * multiple of 16
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @param[in] iv 128 bits initial vector + counter, it contains
+ * a 96 bits IV and a 32 bits counter
+ * @param[in] aadsize size of the authentication data, this number
+ * must be a multiple of 16
+ * @param[in] aad buffer containing the authentication data
+ * @param[in] authtag 128 bits buffer for the generated authentication
+ * tag
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -754,17 +797,17 @@ cryerror_t cry_lld_encrypt_AES_GCM(CRYDriver *cryp, const uint8_t *aad,
uint8_t *authtag) {
- (void)cryp;
- (void)key_id;
- (void)size;
- (void)in;
- (void)out;
- (void)iv;
- (void)aadsize;
- (void)aad;
- (void)authtag;
-
- return CRY_ERR_INV_ALGO;
+ (void)cryp;
+ (void)key_id;
+ (void)size;
+ (void)in;
+ (void)out;
+ (void)iv;
+ (void)aadsize;
+ (void)aad;
+ (void)authtag;
+
+ return CRY_ERR_INV_ALGO;
}
/**
@@ -773,21 +816,22 @@ cryerror_t cry_lld_encrypt_AES_GCM(CRYDriver *cryp, * of an AES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the text buffers, this number must be a
- * multiple of 16
- * @param[in] in buffer for the output cyphertext
- * @param[out] out buffer containing the input plaintext
- * @param[in] iv 128 bits initial vector + counter, it contains
- * a 96 bits IV and a 32 bits counter
- * @param[in] aadsize size of the authentication data, this number must be a
- * multiple of 16
- * @param[in] aad buffer containing the authentication data
- * @param[in] authtag 128 bits buffer for the generated authentication tag
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the text buffers, this number must be a
+ * multiple of 16
+ * @param[in] in buffer for the output cyphertext
+ * @param[out] out buffer containing the input plaintext
+ * @param[in] iv 128 bits initial vector + counter, it contains
+ * a 96 bits IV and a 32 bits counter
+ * @param[in] aadsize size of the authentication data, this number
+ * must be a multiple of 16
+ * @param[in] aad buffer containing the authentication data
+ * @param[in] authtag 128 bits buffer for the generated authentication
+ * tag
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -807,17 +851,17 @@ cryerror_t cry_lld_decrypt_AES_GCM(CRYDriver *cryp, const uint8_t *aad,
uint8_t *authtag) {
- (void)cryp;
- (void)key_id;
- (void)size;
- (void)in;
- (void)out;
- (void)iv;
- (void)aadsize;
- (void)aad;
- (void)authtag;
-
- return CRY_ERR_INV_ALGO;
+ (void)cryp;
+ (void)key_id;
+ (void)size;
+ (void)in;
+ (void)out;
+ (void)iv;
+ (void)aadsize;
+ (void)aad;
+ (void)authtag;
+
+ return CRY_ERR_INV_ALGO;
}
@@ -826,13 +870,13 @@ cryerror_t cry_lld_decrypt_AES_GCM(CRYDriver *cryp, * @note The implementation of this function must guarantee that it can
* be called from any context.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -842,20 +886,28 @@ cryerror_t cry_lld_decrypt_AES_GCM(CRYDriver *cryp, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_DES(CRYDriver *cryp, crykey_t key_id,
- const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_encrypt_DES(CRYDriver *cryp,
+ crykey_t key_id,
+ const uint8_t *in,
+ uint8_t *out) {
cryerror_t ret = CRY_NOERROR;
+ tdes_config_t params = { 0, 0 };
if (key_id != 0)
return CRY_ERR_INV_KEY_ID;
- if ((cryp->config->tdes_algo == TDES_ALGO_SINGLE && cryp->key0_size != 8)
- || (cryp->config->tdes_algo == TDES_ALGO_TRIPLE
- && !(cryp->key0_size == 16 || cryp->key0_size == 24)))
+ if (cryp->key0_size == 8)
+ {
+ params.algo = TDES_ALGO_SINGLE;
+ }
+ else if (cryp->key0_size == 16 || cryp->key0_size == 24)
+ {
+ params.algo = TDES_ALGO_TRIPLE;
+ }
+ else
return CRY_ERR_INV_KEY_SIZE;
- tdes_config_t params = { cryp->config->tdes_algo, 0 };
if (!(cryp->enabledPer & TDES_PER)) {
cryp->enabledPer |= TDES_PER;
@@ -873,13 +925,13 @@ cryerror_t cry_lld_encrypt_DES(CRYDriver *cryp, crykey_t key_id, * be called from any context.
*
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] in buffer containing the input cyphertext
- * @param[out] out buffer for the output plaintext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] in buffer containing the input cyphertext
+ * @param[out] out buffer for the output plaintext
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -889,17 +941,26 @@ cryerror_t cry_lld_encrypt_DES(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_DES(CRYDriver *cryp, crykey_t key_id,
- const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_decrypt_DES(CRYDriver *cryp,
+ crykey_t key_id,
+ const uint8_t *in,
+ uint8_t *out) {
cryerror_t ret = CRY_NOERROR;
- tdes_config_t params = { cryp->config->tdes_algo, 0 };
+ tdes_config_t params = { 0, 0 };
+
if (key_id != 0)
return CRY_ERR_INV_KEY_ID;
- if ((cryp->config->tdes_algo == TDES_ALGO_SINGLE && cryp->key0_size != 8)
- || (cryp->config->tdes_algo == TDES_ALGO_TRIPLE
- && !(cryp->key0_size == 16 || cryp->key0_size == 24)))
+ if (cryp->key0_size == 8)
+ {
+ params.algo = TDES_ALGO_SINGLE;
+ }
+ else if (cryp->key0_size == 16 || cryp->key0_size == 24)
+ {
+ params.algo = TDES_ALGO_TRIPLE;
+ }
+ else
return CRY_ERR_INV_KEY_SIZE;
if (!(cryp->enabledPer & TDES_PER)) {
@@ -918,15 +979,15 @@ cryerror_t cry_lld_decrypt_DES(CRYDriver *cryp, crykey_t key_id, * of an DES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of 8
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of 8
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -936,21 +997,27 @@ cryerror_t cry_lld_decrypt_DES(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_DES_ECB(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_encrypt_DES_ECB(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out) {
cryerror_t ret = CRY_NOERROR;
- tdes_config_t params = { cryp->config->tdes_algo, TDES_MODE_ECB };
-
+ tdes_config_t params = { 0, TDES_MODE_ECB };
if (key_id != 0)
return CRY_ERR_INV_KEY_ID;
- if (cryp->config->tdes_algo == TDES_ALGO_SINGLE && cryp->key0_size != 8) {
- return CRY_ERR_INV_KEY_SIZE;
+ if (cryp->key0_size == 8)
+ {
+ params.algo = TDES_ALGO_SINGLE;
}
- if (cryp->config->tdes_algo == TDES_ALGO_TRIPLE && !(cryp->key0_size == 16 || cryp->key0_size == 24) ) {
- return CRY_ERR_INV_KEY_SIZE;
+ else if (cryp->key0_size == 16 || cryp->key0_size == 24)
+ {
+ params.algo = TDES_ALGO_TRIPLE;
}
+ else
+ return CRY_ERR_INV_KEY_SIZE;
if (!(cryp->enabledPer & TDES_PER)) {
cryp->enabledPer |= TDES_PER;
@@ -970,15 +1037,15 @@ cryerror_t cry_lld_encrypt_DES_ECB(CRYDriver *cryp, crykey_t key_id, * of an DES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of 8
- * @param[in] in buffer containing the input cyphertext
- * @param[out] out buffer for the output plaintext
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of 8
+ * @param[in] in buffer containing the input cyphertext
+ * @param[out] out buffer for the output plaintext
+ * @return T he operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -988,20 +1055,28 @@ cryerror_t cry_lld_encrypt_DES_ECB(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_DES_ECB(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_decrypt_DES_ECB(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out) {
cryerror_t ret = CRY_NOERROR;
- tdes_config_t params = { cryp->config->tdes_algo, TDES_MODE_ECB };
+ tdes_config_t params = { 0, TDES_MODE_ECB };
if (key_id != 0)
return CRY_ERR_INV_KEY_ID;
- if (cryp->config->tdes_algo == TDES_ALGO_SINGLE && cryp->key0_size != 8) {
- return CRY_ERR_INV_KEY_SIZE;
+ if (cryp->key0_size == 8)
+ {
+ params.algo = TDES_ALGO_SINGLE;
}
- if (cryp->config->tdes_algo == TDES_ALGO_TRIPLE && !(cryp->key0_size == 16 || cryp->key0_size == 24) ) {
- return CRY_ERR_INV_KEY_SIZE;
+ else if (cryp->key0_size == 16 || cryp->key0_size == 24)
+ {
+ params.algo = TDES_ALGO_TRIPLE;
}
+ else
+ return CRY_ERR_INV_KEY_SIZE;
+
if (!(cryp->enabledPer & TDES_PER)) {
cryp->enabledPer |= TDES_PER;
pmcEnableDES()
@@ -1022,16 +1097,16 @@ cryerror_t cry_lld_decrypt_DES_ECB(CRYDriver *cryp, crykey_t key_id, * of an DES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of 8
- * @param[in] in buffer containing the input plaintext
- * @param[out] out buffer for the output cyphertext
- * @param[in] iv 64 bits input vector
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of 8
+ * @param[in] in buffer containing the input plaintext
+ * @param[out] out buffer for the output cyphertext
+ * @param[in] iv 64 bits input vector
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -1041,22 +1116,30 @@ cryerror_t cry_lld_decrypt_DES_ECB(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_encrypt_DES_CBC(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_encrypt_DES_CBC(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
- tdes_config_t params = { cryp->config->tdes_algo, TDES_MODE_CBC };
+ tdes_config_t params = { 0, TDES_MODE_CBC };
if (key_id != 0)
return CRY_ERR_INV_KEY_ID;
- if (cryp->config->tdes_algo == TDES_ALGO_SINGLE)
- return CRY_ERR_INV_ALGO;
-
- if (cryp->key0_size != 16 && cryp->key0_size != 24) {
- return CRY_ERR_INV_KEY_SIZE;
- }
+ if (cryp->key0_size == 8)
+ {
+ params.algo = TDES_ALGO_SINGLE;
+ }
+ else if (cryp->key0_size == 16 || cryp->key0_size == 24)
+ {
+ params.algo = TDES_ALGO_TRIPLE;
+ }
+ else
+ return CRY_ERR_INV_KEY_SIZE;
if (!(cryp->enabledPer & TDES_PER)) {
cryp->enabledPer |= TDES_PER;
@@ -1077,16 +1160,16 @@ cryerror_t cry_lld_encrypt_DES_CBC(CRYDriver *cryp, crykey_t key_id, * of an DES block, this means that padding must be done by the
* caller.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] key_id the key to be used for the operation, zero is the
- * transient key, other values are keys stored in an
- * unspecified way
- * @param[in] size size of the plaintext buffer, this number must be a
- * multiple of 8
- * @param[in] in buffer containing the input cyphertext
- * @param[out] out buffer for the output plaintext
- * @param[in] iv 64 bits input vector
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] key_id the key to be used for the operation, zero is
+ * the transient key, other values are keys stored
+ * in an unspecified way
+ * @param[in] size size of the plaintext buffer, this number must
+ * be a multiple of 8
+ * @param[in] in buffer containing the input cyphertext
+ * @param[out] out buffer for the output plaintext
+ * @param[in] iv 64 bits input vector
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
@@ -1096,21 +1179,29 @@ cryerror_t cry_lld_encrypt_DES_CBC(CRYDriver *cryp, crykey_t key_id, *
* @notapi
*/
-cryerror_t cry_lld_decrypt_DES_CBC(CRYDriver *cryp, crykey_t key_id,
- size_t size, const uint8_t *in, uint8_t *out, const uint8_t *iv) {
+cryerror_t cry_lld_decrypt_DES_CBC(CRYDriver *cryp,
+ crykey_t key_id,
+ size_t size,
+ const uint8_t *in,
+ uint8_t *out,
+ const uint8_t *iv) {
cryerror_t ret = CRY_NOERROR;
- tdes_config_t params = { cryp->config->tdes_algo, TDES_MODE_CBC };
+ tdes_config_t params = { 0, TDES_MODE_CBC };
if (key_id != 0)
return CRY_ERR_INV_KEY_ID;
- if (cryp->config->tdes_algo == TDES_ALGO_SINGLE)
- return CRY_ERR_INV_ALGO;
-
- if (cryp->key0_size != 16 && cryp->key0_size != 24) {
- return CRY_ERR_INV_KEY_SIZE;
+ if (cryp->key0_size == 8)
+ {
+ params.algo = TDES_ALGO_SINGLE;
+ }
+ else if (cryp->key0_size == 16 || cryp->key0_size == 24)
+ {
+ params.algo = TDES_ALGO_TRIPLE;
}
+ else
+ return CRY_ERR_INV_KEY_SIZE;
if (!(cryp->enabledPer & TDES_PER)) {
cryp->enabledPer |= TDES_PER;
@@ -1129,97 +1220,188 @@ cryerror_t cry_lld_decrypt_DES_CBC(CRYDriver *cryp, crykey_t key_id, /**
- * @brief Hash using SHA1.
- * @NOTE Use of this algorithm is not recommended because proven weak.
+ * @brief Hash initialization using SHA1.
+ * @note Use of this algorithm is not recommended because proven weak.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] size size of input buffer
- * @param[in] in buffer containing the input text
- * @param[out] out 160 bits output buffer
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[out] sha1ctxp pointer to a SHA1 context to be initialized
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
*
- * @api
+ * @notapi
*/
-cryerror_t cry_lld_SHA1(CRYDriver *cryp, size_t size,
- const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_SHA1_init(CRYDriver *cryp, SHA1Context *sha1ctxp) {
- cryerror_t ret;
+ sha1ctxp->sha.algo = CRY_SHA_1;
- shaparams_t params = {CRY_SHA_1};
+ return sama_sha_lld_init(cryp, &sha1ctxp->sha);
+}
- ret = sama_sha_lld_process(cryp,
- ¶ms,
- in,
- out,
- size
- );
+/**
+ * @brief Hash update using SHA1.
+ * @note Use of this algorithm is not recommended because proven weak.
+ *
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] sha1ctxp pointer to a SHA1 context
+ * @param[in] size size of input buffer
+ * @param[in] in buffer containing the input text
+ * @return The operation status.
+ * @retval CRY_NOERROR if the operation succeeded.
+ * @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
+ * device instance.
+ *
+ * @notapi
+ */
+cryerror_t cry_lld_SHA1_update(CRYDriver *cryp, SHA1Context *sha1ctxp,
+ size_t size, const uint8_t *in) {
- return ret;
+ sha1ctxp->sha.in = in;
+ sha1ctxp->sha.indata_len = size;
+
+ return sama_sha_lld_update(cryp, &sha1ctxp->sha);
}
/**
- * @brief Hash using SHA256.
+ * @brief Hash finalization using SHA1.
+ * @note Use of this algorithm is not recommended because proven weak.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] size size of input buffer
- * @param[in] in buffer containing the input text
- * @param[out] out 256 bits output buffer
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] sha1ctxp pointer to a SHA1 context
+ * @param[out] out 160 bits output buffer
+ * @return The operation status.
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
*
- * @api
+ * @notapi
+ */
+cryerror_t cry_lld_SHA1_final(CRYDriver *cryp,
+ SHA1Context *sha1ctxp,
+ uint8_t *out)
+{
+ sha1ctxp->sha.out = out;
+ return sama_sha_lld_final(cryp, &sha1ctxp->sha);
+}
+
+/**
+ * @brief Hash initialization using SHA256.
+ *
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[out] sha256ctxp pointer to a SHA256 context to be initialized
+ * @retval CRY_NOERROR if the operation succeeded.
+ * @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
+ * device instance.
+ *
+ * @notapi
+ */
+cryerror_t cry_lld_SHA256_init(CRYDriver *cryp, SHA256Context *sha256ctxp) {
+
+ sha256ctxp->sha.algo = CRY_SHA_256;
+
+ return sama_sha_lld_init(cryp, &sha256ctxp->sha);
+}
+
+/**
+ * @brief Hash update using SHA256.
+ *
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] sha256ctxp pointer to a SHA256 context
+ * @param[in] size size of input buffer
+ * @param[in] in buffer containing the input text
+ * @return The operation status.
+ * @retval CRY_NOERROR if the operation succeeded.
+ * @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
+ * device instance.
+ *
+ * @notapi
*/
-cryerror_t cry_lld_SHA256(CRYDriver *cryp, size_t size,
- const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_SHA256_update(CRYDriver *cryp, SHA256Context *sha256ctxp,
+ size_t size, const uint8_t *in) {
- cryerror_t ret;
+ sha256ctxp->sha.in = in;
+ sha256ctxp->sha.indata_len = size;
- shaparams_t params = {CRY_SHA_256};
+ return sama_sha_lld_update(cryp, &sha256ctxp->sha);
+}
- ret = sama_sha_lld_process(cryp,
- ¶ms,
- in,
- out,
- size
- );
+/**
+ * @brief Hash finalization using SHA256.
+ *
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] sha256ctxp pointer to a SHA256 context
+ * @param[out] out 256 bits output buffer
+ * @return The operation status.
+ * @retval CRY_NOERROR if the operation succeeded.
+ * @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
+ * device instance.
+ *
+ * @notapi
+ */
+cryerror_t cry_lld_SHA256_final(CRYDriver *cryp, SHA256Context *sha256ctxp,
+ uint8_t *out) {
- return ret;
+ sha256ctxp->sha.out = out;
+ return sama_sha_lld_final(cryp, &sha256ctxp->sha);
}
/**
- * @brief Hash using SHA512.
+ * @brief Hash initialization using SHA512.
*
- * @param[in] cryp pointer to the @p CRYDriver object
- * @param[in] size size of input buffer
- * @param[in] in buffer containing the input text
- * @param[out] out 512 bits output buffer
- * @return The operation status.
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[out] sha512ctxp pointer to a SHA512 context to be initialized
* @retval CRY_NOERROR if the operation succeeded.
* @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
* device instance.
*
- * @api
+ * @notapi
+ */
+cryerror_t cry_lld_SHA512_init(CRYDriver *cryp, SHA512Context *sha512ctxp) {
+ sha512ctxp->sha.algo = CRY_SHA_512;
+ return sama_sha_lld_init(cryp, &sha512ctxp->sha);
+}
+
+/**
+ * @brief Hash update using SHA512.
+ *
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] sha512ctxp pointer to a SHA512 context
+ * @param[in] size size of input buffer
+ * @param[in] in buffer containing the input text
+ * @return The operation status.
+ * @retval CRY_NOERROR if the operation succeeded.
+ * @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
+ * device instance.
+ *
+ * @notapi
*/
-cryerror_t cry_lld_SHA512(CRYDriver *cryp, size_t size,
- const uint8_t *in, uint8_t *out) {
+cryerror_t cry_lld_SHA512_update(CRYDriver *cryp, SHA512Context *sha512ctxp,
+ size_t size, const uint8_t *in) {
- cryerror_t ret;
+ sha512ctxp->sha.in = in;
+ sha512ctxp->sha.indata_len = size;
- shaparams_t params = {CRY_SHA_512};
+ return sama_sha_lld_update(cryp, &sha512ctxp->sha);
+}
- ret = sama_sha_lld_process(cryp,
- ¶ms,
- in,
- out,
- size
- );
+/**
+ * @brief Hash finalization using SHA512.
+ *
+ * @param[in] cryp pointer to the @p CRYDriver object
+ * @param[in] sha512ctxp pointer to a SHA512 context
+ * @param[out] out 512 bits output buffer
+ * @return The operation status.
+ * @retval CRY_NOERROR if the operation succeeded.
+ * @retval CRY_ERR_INV_ALGO if the operation is unsupported on this
+ * device instance.
+ *
+ * @notapi
+ */
+cryerror_t cry_lld_SHA512_final(CRYDriver *cryp, SHA512Context *sha512ctxp,
+ uint8_t *out) {
- return ret;
+ sha512ctxp->sha.out = out;
+ return sama_sha_lld_final(cryp, &sha512ctxp->sha);
}
/**
diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h index af3985aa2..7087e1ead 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_crypto_lld.h @@ -134,17 +134,28 @@ typedef enum { TDES_ALGO_XTEA
}tdes_algo_t;
+struct sha_data {
+ uint32_t remaining;
+ uint32_t processed;
+ uint32_t block_size;
+ uint32_t output_size;
+ uint32_t sha_buffer_size;
+ const uint8_t *in;
+ uint8_t *out;
+ size_t indata_len;
+ uint8_t *sha_buffer;
+
+ shadalgo_t algo;
+};
+
typedef struct {
crytransfermode_t transfer_mode;
uint32_t cfbs;
- tdes_algo_t tdes_algo;
-
} CRYConfig;
#define KEY0_BUFFER_SIZE_W HAL_CRY_MAX_KEY_SIZE/4
-#define SHA_MAX_PADDING_LEN (2 * 128)
-#define SHA_UPDATE_LEN (128 * 1024)
+
#define CRY_DRIVER_EXT_FIELDS thread_reference_t thread; \
sama_dma_channel_t *dmarx; \
@@ -155,8 +166,7 @@ typedef struct { uint8_t dmachunksize; \
uint8_t enabledPer; \
mutex_t mutex; \
- uint32_t key0_buffer[KEY0_BUFFER_SIZE_W]; \
- uint8_t sha_buffer[SHA_MAX_PADDING_LEN];
+ uint32_t key0_buffer[KEY0_BUFFER_SIZE_W];
/**
* @brief Structure representing an CRY driver.
@@ -190,6 +200,33 @@ struct CRYDriver { /* End of the mandatory fields.*/
};
+#if (CRY_LLD_SUPPORTS_SHA1 == TRUE) || defined(__DOXYGEN__)
+/**
+ * @brief Type of a SHA1 context.
+ */
+typedef struct {
+ struct sha_data sha;
+} SHA1Context;
+#endif
+
+#if (CRY_LLD_SUPPORTS_SHA256 == TRUE) || defined(__DOXYGEN__)
+/**
+ * @brief Type of a SHA256 context.
+ */
+typedef struct {
+ struct sha_data sha;
+} SHA256Context;
+#endif
+
+#if (CRY_LLD_SUPPORTS_SHA512 == TRUE) || defined(__DOXYGEN__)
+/**
+ * @brief Type of a SHA512 context.
+ */
+typedef struct {
+ struct sha_data sha;
+} SHA512Context;
+#endif
+
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
@@ -314,12 +351,21 @@ extern "C" { const uint8_t *in,
uint8_t *out,
const uint8_t *iv);
- cryerror_t cry_lld_SHA1(CRYDriver *cryp, size_t size,
- const uint8_t *in, uint8_t *out);
- cryerror_t cry_lld_SHA256(CRYDriver *cryp, size_t size,
- const uint8_t *in, uint8_t *out);
- cryerror_t cry_lld_SHA512(CRYDriver *cryp, size_t size,
- const uint8_t *in, uint8_t *out);
+ cryerror_t cry_lld_SHA1_init(CRYDriver *cryp, SHA1Context *sha1ctxp);
+ cryerror_t cry_lld_SHA1_update(CRYDriver *cryp, SHA1Context *sha1ctxp,
+ size_t size, const uint8_t *in);
+ cryerror_t cry_lld_SHA1_final(CRYDriver *cryp, SHA1Context *sha1ctxp,
+ uint8_t *out);
+ cryerror_t cry_lld_SHA256_init(CRYDriver *cryp, SHA256Context *sha256ctxp);
+ cryerror_t cry_lld_SHA256_update(CRYDriver *cryp, SHA256Context *sha256ctxp,
+ size_t size, const uint8_t *in);
+ cryerror_t cry_lld_SHA256_final(CRYDriver *cryp, SHA256Context *sha256ctxp,
+ uint8_t *out);
+ cryerror_t cry_lld_SHA512_init(CRYDriver *cryp, SHA512Context *sha512ctxp);
+ cryerror_t cry_lld_SHA512_update(CRYDriver *cryp, SHA512Context *sha512ctxp,
+ size_t size, const uint8_t *in);
+ cryerror_t cry_lld_SHA512_final(CRYDriver *cryp, SHA512Context *sha512ctxp,
+ uint8_t *out);
cryerror_t cry_lld_TRNG(CRYDriver *cryp, uint8_t *out);
#ifdef __cplusplus
}
diff --git a/test/crypto/configuration.xml b/test/crypto/configuration.xml index 1970465fe..dc894e692 100644 --- a/test/crypto/configuration.xml +++ b/test/crypto/configuration.xml @@ -14,7 +14,7 @@ </brief> <copyright> <value><![CDATA[/* - ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -60,6 +60,8 @@ extern void cryptoTest_printArray32(bool isLE,const uint32_t *a,size_t len); #define SHA_LEN_0 3 #define SHA_LEN_1 56 +#define SHA_LEN_2 64 +#define SHA_LEN_3 128 extern const char test_plain_data[TEST_DATA_BYTE_LEN]; extern uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN]; @@ -69,7 +71,8 @@ extern const uint32_t test_keys[8]; extern const uint32_t test_vectors[4]; extern const uint8_t sha_msg0[SHA_LEN_0]; extern const uint8_t sha_msg1[SHA_LEN_1]; - +extern const uint8_t sha_msg2[SHA_LEN_2]; +extern const uint8_t sha_msg3[SHA_LEN_3]; ]]></value> </global_definitions> <global_code> @@ -117,10 +120,13 @@ isque dui faucibus, vitae malesuada dui fermentum. Proin ultrici\ es sit amet justo at ornare. Suspendisse efficitur purus nullam."; -const uint8_t sha_msg0[SHA_LEN_0] = "hi!"; +const uint8_t sha_msg0[SHA_LEN_0] = "abc"; const uint8_t sha_msg1[SHA_LEN_1] = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; +const uint8_t sha_msg2[SHA_LEN_2] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"; + +const uint8_t sha_msg3[SHA_LEN_3] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"; ALIGNED_VAR(4) uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN]; ALIGNED_VAR(4) uint32_t msg_encrypted[TEST_MSG_DATA_WORD_LEN]; @@ -203,14 +209,12 @@ void cryptoTest_printArray32(bool isLE,const uint32_t *a,size_t len) #include "ref_aes.h" static const CRYConfig config_Polling = { TRANSFER_POLLING, - AES_CFBS_128, //cfbs - 0 + AES_CFBS_128 //cfbs }; static const CRYConfig config_DMA = { TRANSFER_DMA, - AES_CFBS_128, //cfbs - 0 + AES_CFBS_128 //cfbs }; ]]></value> </shared_code> @@ -656,14 +660,12 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { #include "ref_aes.h" static const CRYConfig config_Polling = { TRANSFER_POLLING, - AES_CFBS_128, //cfbs - 0 + AES_CFBS_128 //cfbs }; static const CRYConfig config_DMA = { TRANSFER_DMA, - AES_CFBS_128, //cfbs - 0 + AES_CFBS_128 //cfbs }; ]]></value> </shared_code> @@ -1109,14 +1111,12 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { #include "ref_aes.h" static const CRYConfig config_Polling = { TRANSFER_POLLING, - AES_CFBS_128, //cfbs - 0 + AES_CFBS_128 //cfbs }; static const CRYConfig config_DMA = { TRANSFER_DMA, - AES_CFBS_128, //cfbs - 0 + AES_CFBS_128 //cfbs }; ]]></value> </shared_code> @@ -1563,21 +1563,13 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { static const CRYConfig configDES_Polling= { TRANSFER_POLLING, - 0, - TDES_ALGO_SINGLE -}; -static const CRYConfig configTDES_Polling= -{ - TRANSFER_POLLING, - 0, - TDES_ALGO_TRIPLE + 0 }; -static const CRYConfig configTDES_DMA= +static const CRYConfig configDES_DMA= { TRANSFER_DMA, - 0, - TDES_ALGO_TRIPLE + 0 }; ]]></value> @@ -1696,7 +1688,7 @@ for (int i = 0; i < 2; i++) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN); memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); -cryStart(&CRYD1, &configTDES_Polling); +cryStart(&CRYD1, &configDES_Polling); ]]></value> </setup_code> @@ -1849,7 +1841,7 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN); memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); -cryStart(&CRYD1, &configTDES_Polling); +cryStart(&CRYD1, &configDES_Polling); ]]></value> </setup_code> @@ -2005,7 +1997,7 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN); memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); -cryStart(&CRYD1, &configTDES_DMA); +cryStart(&CRYD1, &configDES_DMA); ]]></value> </setup_code> @@ -2158,7 +2150,7 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN); memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN); -cryStart(&CRYD1, &configTDES_DMA); +cryStart(&CRYD1, &configDES_DMA); ]]></value> </setup_code> @@ -2320,7 +2312,6 @@ for (int i = 0; i < TEST_DATA_WORD_LEN; i++) { static const CRYConfig configTRNG_Polling= { TRANSFER_POLLING, - 0, 0 }; @@ -2416,17 +2407,84 @@ uint32_t random[10]; #include <string.h> #include "ref_sha.h" -#define MAX_DIGEST_SIZE_INBYTE 64 +/* Buffer size for each SHA transfer, size should be multiple of block size + (block size: 64 for SHA_1/SHA_256/SHA_224, 128 for SHA_384/SHA_512) */ +#define MAX_SHA_BLOCK_SIZE TEST_MSG_DATA_BYTE_LEN +#define MAX_SHA_BLOCK_SIZE_INWORD (MAX_SHA_BLOCK_SIZE/4) + +#define shabuffer msg_decrypted + + +#define MAX_DIGEST_SIZE_INBYTE TEST_MSG_DATA_BYTE_LEN #define MAX_DIGEST_SIZE_INWORD (MAX_DIGEST_SIZE_INBYTE/4) -static uint32_t digest[MAX_DIGEST_SIZE_INWORD]; + +#define digest msg_encrypted + static const CRYConfig configSHA_Polling= { TRANSFER_POLLING, - 0, 0 }; + +static cryerror_t crySHA1(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) { + + cryerror_t ret; + SHA1Context shactxp; + + shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0]; + shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE; + + + ret = crySHA1Init(cryp,&shactxp); + + ret = crySHA1Update(cryp,&shactxp,size,in); + + ret = crySHA1Final(cryp,&shactxp,out); + + + return ret; +} + +static cryerror_t crySHA256(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) { + + cryerror_t ret; + SHA256Context shactxp; + + shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0]; + shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE; + + + ret = crySHA256Init(cryp,&shactxp); + + ret = crySHA256Update(cryp,&shactxp,size,in); + + ret = crySHA256Final(cryp,&shactxp,out); + + + return ret; +} + +static cryerror_t crySHA512(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) { + + cryerror_t ret; + SHA512Context shactxp; + + shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0]; + shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE; + + + ret = crySHA512Init(cryp,&shactxp); + + ret = crySHA512Update(cryp,&shactxp,size,in); + + ret = crySHA512Final(cryp,&shactxp,out); + + + return ret; +} + ]]></value> </shared_code> <cases> @@ -2471,6 +2529,18 @@ cryStart(&CRYD1, &configSHA_Polling); </tags> <code> <value><![CDATA[ +//---- Empty Block Test +ret = crySHA1(&CRYD1,0,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha1 failed"); + +SHOW_DATA(digest,5); + + +ref = (uint32_t*)refSHA_SHA1_EMPTY; +for (int i = 0; i < 5; i++) { + test_assert(digest[i] == ref[i], "sha1 digest mismatch"); +} //---- One Block Test ret = crySHA1(&CRYD1,SHA_LEN_0,(uint8_t*)msg_clear,(uint8_t*)digest); @@ -2485,7 +2555,7 @@ for (int i = 0; i < 5; i++) { test_assert(digest[i] == ref[i], "sha1 digest mismatch"); } -//---- Multi Block Test +//---- Multi Block Test 56 Byte memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1); @@ -2500,6 +2570,38 @@ ref = (uint32_t*)refSHA_SHA1_56; for (int i = 0; i < 5; i++) { test_assert(digest[i] == ref[i], "sha1 digest mismatch"); } +//---- Multi Block Test 64 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2); + +ret = crySHA1(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha1 failed"); + + SHOW_DATA(digest,5); + + +ref = (uint32_t*)refSHA_SHA1_64; +for (int i = 0; i < 5; i++) { + test_assert(digest[i] == ref[i], "sha1 digest mismatch"); +} + +//---- Multi Block Test 128 Byte + +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3); + +ret = crySHA1(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha1 failed"); + +SHOW_DATA(digest,5); + + +ref = (uint32_t*)refSHA_SHA1_128; +for (int i = 0; i < 5; i++) { + test_assert(digest[i] == ref[i], "sha1 digest mismatch"); +} ]]></value> @@ -2567,20 +2669,51 @@ for (int i = 0; i < 8; i++) { test_assert(digest[i] == ref[i], "sha256 digest mismatch"); } -//---- Multi Block Test +//---- Multi Block Test 56 Byte memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1); ret = crySHA256(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest); -test_assert(ret == CRY_NOERROR, "sha256 failed"); - +test_assert(ret == CRY_NOERROR, "sha256 56 byte failed"); SHOW_DATA(digest,8); + ref = (uint32_t*)refSHA_SHA256_56; for (int i = 0; i < 8; i++) { - test_assert(digest[i] == ref[i], "sha256 digest mismatch"); + test_assert(digest[i] == ref[i], "sha256 56 byte digest mismatch"); +} +//---- Multi Block Test 64 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2); + +ret = crySHA256(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha256 64 byte failed"); + + SHOW_DATA(digest,8); + + +ref = (uint32_t*)refSHA_SHA256_64; +for (int i = 0; i < 8; i++) { + test_assert(digest[i] == ref[i], "sha256 64 byte digest mismatch"); +} + +//---- Multi Block Test 128 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3); + +ret = crySHA256(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha256 128 byte failed"); + +SHOW_DATA(digest,8); + + +ref = (uint32_t*)refSHA_SHA256_128; +for (int i = 0; i < 8; i++) { + test_assert(digest[i] == ref[i], "sha256 128 byte digest mismatch"); } @@ -2647,20 +2780,52 @@ for (int i = 0; i < 16; i++) { test_assert(digest[i] == ref[i], "sha512 digest mismatch"); } -//---- Multi Block Test + +//---- Multi Block Test 56 Byte memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1); ret = crySHA512(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest); -test_assert(ret == CRY_NOERROR, "sha512 failed"); - +test_assert(ret == CRY_NOERROR, "sha512 56 byte failed"); SHOW_DATA(digest,16); + ref = (uint32_t*)refSHA_SHA512_56; for (int i = 0; i < 16; i++) { - test_assert(digest[i] == ref[i], "sha512 digest mismatch"); + test_assert(digest[i] == ref[i], "sha512 56 byte digest mismatch"); +} +//---- Multi Block Test 64 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2); + +ret = crySHA512(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha512 64 byte failed"); + + SHOW_DATA(digest,16); + + +ref = (uint32_t*)refSHA_SHA512_64; +for (int i = 0; i < 16; i++) { + test_assert(digest[i] == ref[i], "sha512 64 byte digest mismatch"); +} + +//---- Multi Block Test 128 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3); + +ret = crySHA512(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha512 128 byte failed"); + +SHOW_DATA(digest,16); + + +ref = (uint32_t*)refSHA_SHA512_128; +for (int i = 0; i < 16; i++) { + test_assert(digest[i] == ref[i], "sha512 128 byte digest mismatch"); } @@ -2696,17 +2861,79 @@ for (int i = 0; i < 16; i++) { #include <string.h> #include "ref_sha.h" -#define MAX_DIGEST_SIZE_INBYTE 64 +/* Buffer size for each SHA transfer, size should be multiple of block size + (block size: 64 for SHA_1/SHA_256/SHA_224, 128 for SHA_384/SHA_512) */ +#define MAX_SHA_BLOCK_SIZE TEST_MSG_DATA_BYTE_LEN +#define MAX_SHA_BLOCK_SIZE_INWORD (MAX_SHA_BLOCK_SIZE/4) + +#define shabuffer msg_decrypted + + +#define MAX_DIGEST_SIZE_INBYTE TEST_MSG_DATA_BYTE_LEN #define MAX_DIGEST_SIZE_INWORD (MAX_DIGEST_SIZE_INBYTE/4) -static uint32_t digest[MAX_DIGEST_SIZE_INWORD]; +#define digest msg_encrypted static const CRYConfig configSHA_DMA= { TRANSFER_DMA, - 0, 0 }; +static cryerror_t crySHA1(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) { + + cryerror_t ret; + SHA1Context shactxp; + + shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0]; + shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE; + + ret = crySHA1Init(cryp,&shactxp); + + ret = crySHA1Update(cryp,&shactxp,size,in); + + ret = crySHA1Final(cryp,&shactxp,out); + + + return ret; +} + +static cryerror_t crySHA256(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) { + + cryerror_t ret; + SHA256Context shactxp; + + shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0]; + shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE; + + + ret = crySHA256Init(cryp,&shactxp); + + ret = crySHA256Update(cryp,&shactxp,size,in); + + ret = crySHA256Final(cryp,&shactxp,out); + + + return ret; +} + +static cryerror_t crySHA512(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) { + + cryerror_t ret; + SHA512Context shactxp; + + shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0]; + shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE; + + ret = crySHA512Init(cryp,&shactxp); + + ret = crySHA512Update(cryp,&shactxp,size,in); + + ret = crySHA512Final(cryp,&shactxp,out); + + + return ret; +} + ]]></value> </shared_code> <cases> @@ -2751,6 +2978,18 @@ cryStart(&CRYD1, &configSHA_DMA); </tags> <code> <value><![CDATA[ +//---- Empty Block Test +ret = crySHA1(&CRYD1,0,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha1 failed"); + +SHOW_DATA(digest,5); + + +ref = (uint32_t*)refSHA_SHA1_EMPTY; +for (int i = 0; i < 5; i++) { + test_assert(digest[i] == ref[i], "sha1 digest mismatch"); +} //---- One Block Test ret = crySHA1(&CRYD1,SHA_LEN_0,(uint8_t*)msg_clear,(uint8_t*)digest); @@ -2765,7 +3004,7 @@ for (int i = 0; i < 5; i++) { test_assert(digest[i] == ref[i], "sha1 digest mismatch"); } -//---- Multi Block Test +//---- Multi Block Test 56 Byte memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1); @@ -2780,7 +3019,38 @@ ref = (uint32_t*)refSHA_SHA1_56; for (int i = 0; i < 5; i++) { test_assert(digest[i] == ref[i], "sha1 digest mismatch"); } +//---- Multi Block Test 64 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2); + +ret = crySHA1(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha1 failed"); + + SHOW_DATA(digest,5); + + +ref = (uint32_t*)refSHA_SHA1_64; +for (int i = 0; i < 5; i++) { + test_assert(digest[i] == ref[i], "sha1 digest mismatch"); +} +//---- Multi Block Test 128 Byte + +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3); + +ret = crySHA1(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha1 failed"); + +SHOW_DATA(digest,5); + + +ref = (uint32_t*)refSHA_SHA1_128; +for (int i = 0; i < 5; i++) { + test_assert(digest[i] == ref[i], "sha1 digest mismatch"); +} ]]></value> </code> @@ -2847,20 +3117,51 @@ for (int i = 0; i < 8; i++) { test_assert(digest[i] == ref[i], "sha256 digest mismatch"); } -//---- Multi Block Test +//---- Multi Block Test 56 Byte memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1); ret = crySHA256(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest); -test_assert(ret == CRY_NOERROR, "sha256 failed"); - +test_assert(ret == CRY_NOERROR, "sha256 56 byte failed"); SHOW_DATA(digest,8); + ref = (uint32_t*)refSHA_SHA256_56; for (int i = 0; i < 8; i++) { - test_assert(digest[i] == ref[i], "sha256 digest mismatch"); + test_assert(digest[i] == ref[i], "sha256 56 byte digest mismatch"); +} +//---- Multi Block Test 64 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2); + +ret = crySHA256(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha256 64 byte failed"); + + SHOW_DATA(digest,8); + + +ref = (uint32_t*)refSHA_SHA256_64; +for (int i = 0; i < 8; i++) { + test_assert(digest[i] == ref[i], "sha256 64 byte digest mismatch"); +} + +//---- Multi Block Test 128 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3); + +ret = crySHA256(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha256 128 byte failed"); + +SHOW_DATA(digest,8); + + +ref = (uint32_t*)refSHA_SHA256_128; +for (int i = 0; i < 8; i++) { + test_assert(digest[i] == ref[i], "sha256 128 byte digest mismatch"); } @@ -2927,22 +3228,53 @@ for (int i = 0; i < 16; i++) { test_assert(digest[i] == ref[i], "sha512 digest mismatch"); } -//---- Multi Block Test + +//---- Multi Block Test 56 Byte memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1); ret = crySHA512(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest); -test_assert(ret == CRY_NOERROR, "sha512 failed"); - +test_assert(ret == CRY_NOERROR, "sha512 56 byte failed"); SHOW_DATA(digest,16); + ref = (uint32_t*)refSHA_SHA512_56; for (int i = 0; i < 16; i++) { - test_assert(digest[i] == ref[i], "sha512 digest mismatch"); + test_assert(digest[i] == ref[i], "sha512 56 byte digest mismatch"); +} +//---- Multi Block Test 64 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2); + +ret = crySHA512(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha512 64 byte failed"); + + SHOW_DATA(digest,16); + + +ref = (uint32_t*)refSHA_SHA512_64; +for (int i = 0; i < 16; i++) { + test_assert(digest[i] == ref[i], "sha512 64 byte digest mismatch"); } +//---- Multi Block Test 128 Byte +memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN); +memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3); + +ret = crySHA512(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest); + +test_assert(ret == CRY_NOERROR, "sha512 128 byte failed"); + +SHOW_DATA(digest,16); + + +ref = (uint32_t*)refSHA_SHA512_128; +for (int i = 0; i < 16; i++) { + test_assert(digest[i] == ref[i], "sha512 128 byte digest mismatch"); +} ]]></value> </code> diff --git a/test/crypto/ref/gen_cfiles.bat b/test/crypto/ref/gen_cfiles.bat index d63807b38..9d09a3f82 100644 --- a/test/crypto/ref/gen_cfiles.bat +++ b/test/crypto/ref/gen_cfiles.bat @@ -2,4 +2,4 @@ %PYTHON%\python genfile.py -f des_ecb_8,tdes_ecb_16,tdes_ecb_24,tdes_cbc_16,tdes_cbc_24 -o ref_des -p ../source/testref
-%PYTHON%\python genfile.py -f sha_sha1_3,sha_sha1_56,sha_sha256_3,sha_sha256_56,sha_sha512_3,sha_sha512_56 -o ref_sha -p ../source/testref
+%PYTHON%\python genfile.py -f sha_sha1_empty,sha_sha1_3,sha_sha1_56,sha_sha1_64,sha_sha1_128,sha_sha256_3,sha_sha256_56,sha_sha256_64,sha_sha256_128,sha_sha512_3,sha_sha512_56,sha_sha512_64,sha_sha512_128 -o ref_sha -p ../source/testref
diff --git a/test/crypto/ref/gen_testref.bat b/test/crypto/ref/gen_testref.bat index 38c329606..17abaaae9 100644 --- a/test/crypto/ref/gen_testref.bat +++ b/test/crypto/ref/gen_testref.bat @@ -6,10 +6,14 @@ del *.enc %PYTHON%\python -c "print 'Lorem ipsum dolor sit amet, consectetur adipiscing elit. Praesent et pellentesque risus. Sed id gravida elit. Proin eget accumsan mi. Aliquam vitae dui porta, euismod velit viverra, elementum lacus. Nunc turpis orci, venenatis vel vulputate nec, luctus sitamet urna. Ut et nunc purus. Aliquam erat volutpat. Vestibulum nulla dolor, cursus vitae cursus eget, dapibus eget sapien. Integer justo eros, commodo ut massa eu, bibendum elementum tellus. Nam quis dolor in libero placerat congue. Sed sodales urna scelerisque dui faucibus, vitae malesuada dui fermentum. Proin ultricies sit amet justo at ornare. Suspendisse efficitur purus nullam.'.decode('ascii')" > plaintext
-echo|set /p="hi!" > plaintext_2
+echo|set /p="abc" > plaintext_2
echo|set /p="abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" > plaintext_3
+echo|set /p="aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" > plaintext_4
+
+echo|set /p="aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" > plaintext_5
+
call aes_ref.bat
call des_ref.bat
call sha_ref.bat
diff --git a/test/crypto/ref/sha_ref.bat b/test/crypto/ref/sha_ref.bat index 9eaa96463..941061ce5 100644 --- a/test/crypto/ref/sha_ref.bat +++ b/test/crypto/ref/sha_ref.bat @@ -1,20 +1,44 @@ +
+call %PYTHON%\python -c "print 'DA39A3EE5E6B4B0D3255BFEF95601890AFD80709'.decode('hex')" > sha_sha1_empty.enc
+
call %OPENSSL%\openssl dgst -sha1 -c -binary -out sha_sha1_3 plaintext_2
ren sha_sha1_3 sha_sha1_3.enc
call %OPENSSL%\openssl dgst -sha1 -c -binary -out sha_sha1_56 plaintext_3
ren sha_sha1_56 sha_sha1_56.enc
+call %OPENSSL%\openssl dgst -sha1 -c -binary -out sha_sha1_64 plaintext_4
+ren sha_sha1_64 sha_sha1_64.enc
+
+call %OPENSSL%\openssl dgst -sha1 -c -binary -out sha_sha1_128 plaintext_5
+ren sha_sha1_128 sha_sha1_128.enc
+
+
call %OPENSSL%\openssl dgst -sha256 -c -binary -out sha_sha256_3 plaintext_2
ren sha_sha256_3 sha_sha256_3.enc
call %OPENSSL%\openssl dgst -sha256 -c -binary -out sha_sha256_56 plaintext_3
ren sha_sha256_56 sha_sha256_56.enc
+call %OPENSSL%\openssl dgst -sha256 -c -binary -out sha_sha256_64 plaintext_4
+ren sha_sha256_64 sha_sha256_64.enc
+
+call %OPENSSL%\openssl dgst -sha256 -c -binary -out sha_sha256_128 plaintext_5
+ren sha_sha256_128 sha_sha256_128.enc
+
call %OPENSSL%\openssl dgst -sha512 -c -binary -out sha_sha512_3 plaintext_2
ren sha_sha512_3 sha_sha512_3.enc
call %OPENSSL%\openssl dgst -sha512 -c -binary -out sha_sha512_56 plaintext_3
-ren sha_sha512_56 sha_sha512_56.enc
\ No newline at end of file +ren sha_sha512_56 sha_sha512_56.enc
+
+call %OPENSSL%\openssl dgst -sha512 -c -binary -out sha_sha512_64 plaintext_4
+ren sha_sha512_64 sha_sha512_64.enc
+
+call %OPENSSL%\openssl dgst -sha512 -c -binary -out sha_sha512_128 plaintext_5
+ren sha_sha512_128 sha_sha512_128.enc
+
+
diff --git a/test/crypto/source/test/cry_test_root.c b/test/crypto/source/test/cry_test_root.c index 80f97bc3e..519e1fa73 100644 --- a/test/crypto/source/test/cry_test_root.c +++ b/test/crypto/source/test/cry_test_root.c @@ -114,10 +114,13 @@ isque dui faucibus, vitae malesuada dui fermentum. Proin ultrici\ es sit amet justo at ornare. Suspendisse efficitur purus nullam.";
-const uint8_t sha_msg0[SHA_LEN_0] = "hi!";
+const uint8_t sha_msg0[SHA_LEN_0] = "abc";
const uint8_t sha_msg1[SHA_LEN_1] = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq";
+const uint8_t sha_msg2[SHA_LEN_2] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa";
+
+const uint8_t sha_msg3[SHA_LEN_3] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa";
ALIGNED_VAR(4) uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN];
ALIGNED_VAR(4) uint32_t msg_encrypted[TEST_MSG_DATA_WORD_LEN];
diff --git a/test/crypto/source/test/cry_test_root.h b/test/crypto/source/test/cry_test_root.h index 0fb922d3d..f33cb5c1a 100644 --- a/test/crypto/source/test/cry_test_root.h +++ b/test/crypto/source/test/cry_test_root.h @@ -72,6 +72,8 @@ extern void cryptoTest_printArray32(bool isLE,const uint32_t *a,size_t len); #define SHA_LEN_0 3
#define SHA_LEN_1 56
+#define SHA_LEN_2 64
+#define SHA_LEN_3 128
extern const char test_plain_data[TEST_DATA_BYTE_LEN];
extern uint32_t msg_clear[TEST_MSG_DATA_WORD_LEN];
@@ -81,7 +83,8 @@ extern const uint32_t test_keys[8]; extern const uint32_t test_vectors[4];
extern const uint8_t sha_msg0[SHA_LEN_0];
extern const uint8_t sha_msg1[SHA_LEN_1];
-
+extern const uint8_t sha_msg2[SHA_LEN_2];
+extern const uint8_t sha_msg3[SHA_LEN_3];
#endif /* !defined(__DOXYGEN__) */
diff --git a/test/crypto/source/test/cry_test_sequence_001.c b/test/crypto/source/test/cry_test_sequence_001.c index 338a62111..e4cf6d1f6 100644 --- a/test/crypto/source/test/cry_test_sequence_001.c +++ b/test/crypto/source/test/cry_test_sequence_001.c @@ -42,14 +42,12 @@ #include "ref_aes.h"
static const CRYConfig config_Polling = {
TRANSFER_POLLING,
- AES_CFBS_128, //cfbs
- 0
+ AES_CFBS_128 //cfbs
};
static const CRYConfig config_DMA = {
TRANSFER_DMA,
- AES_CFBS_128, //cfbs
- 0
+ AES_CFBS_128 //cfbs
};
diff --git a/test/crypto/source/test/cry_test_sequence_002.c b/test/crypto/source/test/cry_test_sequence_002.c index db2bc4b24..e683fd0f7 100644 --- a/test/crypto/source/test/cry_test_sequence_002.c +++ b/test/crypto/source/test/cry_test_sequence_002.c @@ -42,14 +42,12 @@ #include "ref_aes.h"
static const CRYConfig config_Polling = {
TRANSFER_POLLING,
- AES_CFBS_128, //cfbs
- 0
+ AES_CFBS_128 //cfbs
};
static const CRYConfig config_DMA = {
TRANSFER_DMA,
- AES_CFBS_128, //cfbs
- 0
+ AES_CFBS_128 //cfbs
};
diff --git a/test/crypto/source/test/cry_test_sequence_003.c b/test/crypto/source/test/cry_test_sequence_003.c index b0c85bd90..856ae5302 100644 --- a/test/crypto/source/test/cry_test_sequence_003.c +++ b/test/crypto/source/test/cry_test_sequence_003.c @@ -42,14 +42,12 @@ #include "ref_aes.h"
static const CRYConfig config_Polling = {
TRANSFER_POLLING,
- AES_CFBS_128, //cfbs
- 0
+ AES_CFBS_128 //cfbs
};
static const CRYConfig config_DMA = {
TRANSFER_DMA,
- AES_CFBS_128, //cfbs
- 0
+ AES_CFBS_128 //cfbs
};
diff --git a/test/crypto/source/test/cry_test_sequence_004.c b/test/crypto/source/test/cry_test_sequence_004.c index 842278935..d5a5442c2 100644 --- a/test/crypto/source/test/cry_test_sequence_004.c +++ b/test/crypto/source/test/cry_test_sequence_004.c @@ -46,21 +46,13 @@ static const CRYConfig configDES_Polling=
{
TRANSFER_POLLING,
- 0,
- TDES_ALGO_SINGLE
-};
-static const CRYConfig configTDES_Polling=
-{
- TRANSFER_POLLING,
- 0,
- TDES_ALGO_TRIPLE
+ 0
};
-static const CRYConfig configTDES_DMA=
+static const CRYConfig configDES_DMA=
{
TRANSFER_DMA,
- 0,
- TDES_ALGO_TRIPLE
+ 0
};
@@ -164,7 +156,7 @@ static void cry_test_004_002_setup(void) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN);
memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
- cryStart(&CRYD1, &configTDES_Polling);
+ cryStart(&CRYD1, &configDES_Polling);
}
@@ -280,7 +272,7 @@ static void cry_test_004_003_setup(void) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN);
memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
- cryStart(&CRYD1, &configTDES_Polling);
+ cryStart(&CRYD1, &configDES_Polling);
}
@@ -396,7 +388,7 @@ static void cry_test_004_004_setup(void) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN);
memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
- cryStart(&CRYD1, &configTDES_DMA);
+ cryStart(&CRYD1, &configDES_DMA);
}
@@ -512,7 +504,7 @@ static void cry_test_004_005_setup(void) { memcpy((char*) msg_clear, test_plain_data, TEST_DATA_BYTE_LEN);
memset(msg_encrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
memset(msg_decrypted, 0xff, TEST_MSG_DATA_BYTE_LEN);
- cryStart(&CRYD1, &configTDES_DMA);
+ cryStart(&CRYD1, &configDES_DMA);
}
diff --git a/test/crypto/source/test/cry_test_sequence_005.c b/test/crypto/source/test/cry_test_sequence_005.c index 91478ccb1..35c759950 100644 --- a/test/crypto/source/test/cry_test_sequence_005.c +++ b/test/crypto/source/test/cry_test_sequence_005.c @@ -42,7 +42,6 @@ static const CRYConfig configTRNG_Polling=
{
TRANSFER_POLLING,
- 0,
0
};
diff --git a/test/crypto/source/test/cry_test_sequence_006.c b/test/crypto/source/test/cry_test_sequence_006.c index 11189ea59..9b9f30a85 100644 --- a/test/crypto/source/test/cry_test_sequence_006.c +++ b/test/crypto/source/test/cry_test_sequence_006.c @@ -42,18 +42,85 @@ #include <string.h>
#include "ref_sha.h"
-#define MAX_DIGEST_SIZE_INBYTE 64
+/* Buffer size for each SHA transfer, size should be multiple of block size
+ (block size: 64 for SHA_1/SHA_256/SHA_224, 128 for SHA_384/SHA_512) */
+#define MAX_SHA_BLOCK_SIZE TEST_MSG_DATA_BYTE_LEN
+#define MAX_SHA_BLOCK_SIZE_INWORD (MAX_SHA_BLOCK_SIZE/4)
+
+#define shabuffer msg_decrypted
+
+
+#define MAX_DIGEST_SIZE_INBYTE TEST_MSG_DATA_BYTE_LEN
#define MAX_DIGEST_SIZE_INWORD (MAX_DIGEST_SIZE_INBYTE/4)
-static uint32_t digest[MAX_DIGEST_SIZE_INWORD];
+
+#define digest msg_encrypted
+
static const CRYConfig configSHA_Polling=
{
TRANSFER_POLLING,
- 0,
0
};
+static cryerror_t crySHA1(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) {
+
+ cryerror_t ret;
+ SHA1Context shactxp;
+
+ shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0];
+ shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE;
+
+
+ ret = crySHA1Init(cryp,&shactxp);
+
+ ret = crySHA1Update(cryp,&shactxp,size,in);
+
+ ret = crySHA1Final(cryp,&shactxp,out);
+
+
+ return ret;
+}
+
+static cryerror_t crySHA256(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) {
+
+ cryerror_t ret;
+ SHA256Context shactxp;
+
+ shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0];
+ shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE;
+
+
+ ret = crySHA256Init(cryp,&shactxp);
+
+ ret = crySHA256Update(cryp,&shactxp,size,in);
+
+ ret = crySHA256Final(cryp,&shactxp,out);
+
+
+ return ret;
+}
+
+static cryerror_t crySHA512(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) {
+
+ cryerror_t ret;
+ SHA512Context shactxp;
+
+ shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0];
+ shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE;
+
+
+ ret = crySHA512Init(cryp,&shactxp);
+
+ ret = crySHA512Update(cryp,&shactxp,size,in);
+
+ ret = crySHA512Final(cryp,&shactxp,out);
+
+
+ return ret;
+}
+
+
/****************************************************************************
* Test cases.
@@ -90,6 +157,18 @@ static void cry_test_006_001_execute(void) { /* [6.1.1] Digest.*/
test_set_step(1);
{
+ //---- Empty Block Test
+ ret = crySHA1(&CRYD1,0,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha1 failed");
+
+ SHOW_DATA(digest,5);
+
+
+ ref = (uint32_t*)refSHA_SHA1_EMPTY;
+ for (int i = 0; i < 5; i++) {
+ test_assert(digest[i] == ref[i], "sha1 digest mismatch");
+ }
//---- One Block Test
ret = crySHA1(&CRYD1,SHA_LEN_0,(uint8_t*)msg_clear,(uint8_t*)digest);
@@ -104,7 +183,7 @@ static void cry_test_006_001_execute(void) { test_assert(digest[i] == ref[i], "sha1 digest mismatch");
}
- //---- Multi Block Test
+ //---- Multi Block Test 56 Byte
memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1);
@@ -119,6 +198,38 @@ static void cry_test_006_001_execute(void) { for (int i = 0; i < 5; i++) {
test_assert(digest[i] == ref[i], "sha1 digest mismatch");
}
+ //---- Multi Block Test 64 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2);
+
+ ret = crySHA1(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha1 failed");
+
+ SHOW_DATA(digest,5);
+
+
+ ref = (uint32_t*)refSHA_SHA1_64;
+ for (int i = 0; i < 5; i++) {
+ test_assert(digest[i] == ref[i], "sha1 digest mismatch");
+ }
+
+ //---- Multi Block Test 128 Byte
+
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3);
+
+ ret = crySHA1(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha1 failed");
+
+ SHOW_DATA(digest,5);
+
+
+ ref = (uint32_t*)refSHA_SHA1_128;
+ for (int i = 0; i < 5; i++) {
+ test_assert(digest[i] == ref[i], "sha1 digest mismatch");
+ }
}
@@ -175,20 +286,51 @@ static void cry_test_006_002_execute(void) { test_assert(digest[i] == ref[i], "sha256 digest mismatch");
}
- //---- Multi Block Test
+ //---- Multi Block Test 56 Byte
memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1);
ret = crySHA256(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest);
- test_assert(ret == CRY_NOERROR, "sha256 failed");
-
+ test_assert(ret == CRY_NOERROR, "sha256 56 byte failed");
SHOW_DATA(digest,8);
+
ref = (uint32_t*)refSHA_SHA256_56;
for (int i = 0; i < 8; i++) {
- test_assert(digest[i] == ref[i], "sha256 digest mismatch");
+ test_assert(digest[i] == ref[i], "sha256 56 byte digest mismatch");
+ }
+ //---- Multi Block Test 64 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2);
+
+ ret = crySHA256(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha256 64 byte failed");
+
+ SHOW_DATA(digest,8);
+
+
+ ref = (uint32_t*)refSHA_SHA256_64;
+ for (int i = 0; i < 8; i++) {
+ test_assert(digest[i] == ref[i], "sha256 64 byte digest mismatch");
+ }
+
+ //---- Multi Block Test 128 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3);
+
+ ret = crySHA256(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha256 128 byte failed");
+
+ SHOW_DATA(digest,8);
+
+
+ ref = (uint32_t*)refSHA_SHA256_128;
+ for (int i = 0; i < 8; i++) {
+ test_assert(digest[i] == ref[i], "sha256 128 byte digest mismatch");
}
@@ -245,20 +387,52 @@ static void cry_test_006_003_execute(void) { test_assert(digest[i] == ref[i], "sha512 digest mismatch");
}
- //---- Multi Block Test
+
+ //---- Multi Block Test 56 Byte
memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1);
ret = crySHA512(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest);
- test_assert(ret == CRY_NOERROR, "sha512 failed");
-
+ test_assert(ret == CRY_NOERROR, "sha512 56 byte failed");
SHOW_DATA(digest,16);
+
ref = (uint32_t*)refSHA_SHA512_56;
for (int i = 0; i < 16; i++) {
- test_assert(digest[i] == ref[i], "sha512 digest mismatch");
+ test_assert(digest[i] == ref[i], "sha512 56 byte digest mismatch");
+ }
+ //---- Multi Block Test 64 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2);
+
+ ret = crySHA512(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha512 64 byte failed");
+
+ SHOW_DATA(digest,16);
+
+
+ ref = (uint32_t*)refSHA_SHA512_64;
+ for (int i = 0; i < 16; i++) {
+ test_assert(digest[i] == ref[i], "sha512 64 byte digest mismatch");
+ }
+
+ //---- Multi Block Test 128 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3);
+
+ ret = crySHA512(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha512 128 byte failed");
+
+ SHOW_DATA(digest,16);
+
+
+ ref = (uint32_t*)refSHA_SHA512_128;
+ for (int i = 0; i < 16; i++) {
+ test_assert(digest[i] == ref[i], "sha512 128 byte digest mismatch");
}
diff --git a/test/crypto/source/test/cry_test_sequence_007.c b/test/crypto/source/test/cry_test_sequence_007.c index 71be2fbed..52f8e2c0e 100644 --- a/test/crypto/source/test/cry_test_sequence_007.c +++ b/test/crypto/source/test/cry_test_sequence_007.c @@ -42,17 +42,79 @@ #include <string.h>
#include "ref_sha.h"
-#define MAX_DIGEST_SIZE_INBYTE 64
+/* Buffer size for each SHA transfer, size should be multiple of block size
+ (block size: 64 for SHA_1/SHA_256/SHA_224, 128 for SHA_384/SHA_512) */
+#define MAX_SHA_BLOCK_SIZE TEST_MSG_DATA_BYTE_LEN
+#define MAX_SHA_BLOCK_SIZE_INWORD (MAX_SHA_BLOCK_SIZE/4)
+
+#define shabuffer msg_decrypted
+
+
+#define MAX_DIGEST_SIZE_INBYTE TEST_MSG_DATA_BYTE_LEN
#define MAX_DIGEST_SIZE_INWORD (MAX_DIGEST_SIZE_INBYTE/4)
-static uint32_t digest[MAX_DIGEST_SIZE_INWORD];
+#define digest msg_encrypted
static const CRYConfig configSHA_DMA=
{
TRANSFER_DMA,
- 0,
0
};
+static cryerror_t crySHA1(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) {
+
+ cryerror_t ret;
+ SHA1Context shactxp;
+
+ shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0];
+ shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE;
+
+ ret = crySHA1Init(cryp,&shactxp);
+
+ ret = crySHA1Update(cryp,&shactxp,size,in);
+
+ ret = crySHA1Final(cryp,&shactxp,out);
+
+
+ return ret;
+}
+
+static cryerror_t crySHA256(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) {
+
+ cryerror_t ret;
+ SHA256Context shactxp;
+
+ shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0];
+ shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE;
+
+
+ ret = crySHA256Init(cryp,&shactxp);
+
+ ret = crySHA256Update(cryp,&shactxp,size,in);
+
+ ret = crySHA256Final(cryp,&shactxp,out);
+
+
+ return ret;
+}
+
+static cryerror_t crySHA512(CRYDriver *cryp, size_t size,const uint8_t *in, uint8_t *out) {
+
+ cryerror_t ret;
+ SHA512Context shactxp;
+
+ shactxp.sha.sha_buffer = (uint8_t*)&shabuffer[0];
+ shactxp.sha.sha_buffer_size = MAX_SHA_BLOCK_SIZE;
+
+ ret = crySHA512Init(cryp,&shactxp);
+
+ ret = crySHA512Update(cryp,&shactxp,size,in);
+
+ ret = crySHA512Final(cryp,&shactxp,out);
+
+
+ return ret;
+}
+
/****************************************************************************
@@ -90,6 +152,18 @@ static void cry_test_007_001_execute(void) { /* [7.1.1] Digest.*/
test_set_step(1);
{
+ //---- Empty Block Test
+ ret = crySHA1(&CRYD1,0,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha1 failed");
+
+ SHOW_DATA(digest,5);
+
+
+ ref = (uint32_t*)refSHA_SHA1_EMPTY;
+ for (int i = 0; i < 5; i++) {
+ test_assert(digest[i] == ref[i], "sha1 digest mismatch");
+ }
//---- One Block Test
ret = crySHA1(&CRYD1,SHA_LEN_0,(uint8_t*)msg_clear,(uint8_t*)digest);
@@ -104,7 +178,7 @@ static void cry_test_007_001_execute(void) { test_assert(digest[i] == ref[i], "sha1 digest mismatch");
}
- //---- Multi Block Test
+ //---- Multi Block Test 56 Byte
memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1);
@@ -119,7 +193,38 @@ static void cry_test_007_001_execute(void) { for (int i = 0; i < 5; i++) {
test_assert(digest[i] == ref[i], "sha1 digest mismatch");
}
+ //---- Multi Block Test 64 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2);
+
+ ret = crySHA1(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha1 failed");
+
+ SHOW_DATA(digest,5);
+
+
+ ref = (uint32_t*)refSHA_SHA1_64;
+ for (int i = 0; i < 5; i++) {
+ test_assert(digest[i] == ref[i], "sha1 digest mismatch");
+ }
+
+ //---- Multi Block Test 128 Byte
+
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3);
+ ret = crySHA1(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha1 failed");
+
+ SHOW_DATA(digest,5);
+
+
+ ref = (uint32_t*)refSHA_SHA1_128;
+ for (int i = 0; i < 5; i++) {
+ test_assert(digest[i] == ref[i], "sha1 digest mismatch");
+ }
}
}
@@ -175,20 +280,51 @@ static void cry_test_007_002_execute(void) { test_assert(digest[i] == ref[i], "sha256 digest mismatch");
}
- //---- Multi Block Test
+ //---- Multi Block Test 56 Byte
memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1);
ret = crySHA256(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest);
- test_assert(ret == CRY_NOERROR, "sha256 failed");
-
+ test_assert(ret == CRY_NOERROR, "sha256 56 byte failed");
SHOW_DATA(digest,8);
+
ref = (uint32_t*)refSHA_SHA256_56;
for (int i = 0; i < 8; i++) {
- test_assert(digest[i] == ref[i], "sha256 digest mismatch");
+ test_assert(digest[i] == ref[i], "sha256 56 byte digest mismatch");
+ }
+ //---- Multi Block Test 64 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2);
+
+ ret = crySHA256(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha256 64 byte failed");
+
+ SHOW_DATA(digest,8);
+
+
+ ref = (uint32_t*)refSHA_SHA256_64;
+ for (int i = 0; i < 8; i++) {
+ test_assert(digest[i] == ref[i], "sha256 64 byte digest mismatch");
+ }
+
+ //---- Multi Block Test 128 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3);
+
+ ret = crySHA256(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha256 128 byte failed");
+
+ SHOW_DATA(digest,8);
+
+
+ ref = (uint32_t*)refSHA_SHA256_128;
+ for (int i = 0; i < 8; i++) {
+ test_assert(digest[i] == ref[i], "sha256 128 byte digest mismatch");
}
@@ -245,23 +381,54 @@ static void cry_test_007_003_execute(void) { test_assert(digest[i] == ref[i], "sha512 digest mismatch");
}
- //---- Multi Block Test
+
+ //---- Multi Block Test 56 Byte
memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
memcpy((char*) msg_clear, sha_msg1, SHA_LEN_1);
ret = crySHA512(&CRYD1,SHA_LEN_1,(uint8_t*)msg_clear,(uint8_t*)digest);
- test_assert(ret == CRY_NOERROR, "sha512 failed");
-
+ test_assert(ret == CRY_NOERROR, "sha512 56 byte failed");
SHOW_DATA(digest,16);
+
ref = (uint32_t*)refSHA_SHA512_56;
for (int i = 0; i < 16; i++) {
- test_assert(digest[i] == ref[i], "sha512 digest mismatch");
+ test_assert(digest[i] == ref[i], "sha512 56 byte digest mismatch");
}
+ //---- Multi Block Test 64 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg2, SHA_LEN_2);
+
+ ret = crySHA512(&CRYD1,SHA_LEN_2,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha512 64 byte failed");
+
+ SHOW_DATA(digest,16);
+ ref = (uint32_t*)refSHA_SHA512_64;
+ for (int i = 0; i < 16; i++) {
+ test_assert(digest[i] == ref[i], "sha512 64 byte digest mismatch");
+ }
+
+ //---- Multi Block Test 128 Byte
+ memset(msg_clear, 0, TEST_MSG_DATA_BYTE_LEN);
+ memcpy((char*) msg_clear, sha_msg3, SHA_LEN_3);
+
+ ret = crySHA512(&CRYD1,SHA_LEN_3,(uint8_t*)msg_clear,(uint8_t*)digest);
+
+ test_assert(ret == CRY_NOERROR, "sha512 128 byte failed");
+
+ SHOW_DATA(digest,16);
+
+
+ ref = (uint32_t*)refSHA_SHA512_128;
+ for (int i = 0; i < 16; i++) {
+ test_assert(digest[i] == ref[i], "sha512 128 byte digest mismatch");
+ }
+
}
}
diff --git a/test/crypto/source/testref/ref_aes.c b/test/crypto/source/testref/ref_aes.c index 33f47556e..11c6ef480 100644 --- a/test/crypto/source/testref/ref_aes.c +++ b/test/crypto/source/testref/ref_aes.c @@ -1,5 +1,5 @@ /*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+ ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/test/crypto/source/testref/ref_aes.h b/test/crypto/source/testref/ref_aes.h index e2a7e57cd..a4e6759fc 100644 --- a/test/crypto/source/testref/ref_aes.h +++ b/test/crypto/source/testref/ref_aes.h @@ -1,5 +1,5 @@ /*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+ ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/test/crypto/source/testref/ref_des.c b/test/crypto/source/testref/ref_des.c index 046a642ed..fca75627c 100644 --- a/test/crypto/source/testref/ref_des.c +++ b/test/crypto/source/testref/ref_des.c @@ -1,5 +1,5 @@ /*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+ ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/test/crypto/source/testref/ref_des.h b/test/crypto/source/testref/ref_des.h index 31516447a..c839084b7 100644 --- a/test/crypto/source/testref/ref_des.h +++ b/test/crypto/source/testref/ref_des.h @@ -1,5 +1,5 @@ /*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+ ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/test/crypto/source/testref/ref_sha.c b/test/crypto/source/testref/ref_sha.c index 741c13dee..8e9822ded 100644 --- a/test/crypto/source/testref/ref_sha.c +++ b/test/crypto/source/testref/ref_sha.c @@ -1,5 +1,5 @@ /*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+ ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@@ -16,9 +16,14 @@ #include "hal.h"
+const uint8_t refSHA_SHA1_EMPTY[]={
+0xDA,0x39,0xA3,0xEE,0x5E,0x6B,0x4B,0x0D,0x32,0x55,
+0xBF,0xEF,0x95,0x60,0x18,0x90,0xAF,0xD8,0x07,0x09,
+0x0D,0x0A,
+};
const uint8_t refSHA_SHA1_3[]={
-0x3A,0x98,0x7A,0xCF,0x8C,0xBC,0x10,0x28,0xB7,0xDB,
-0xC8,0x6B,0xD0,0x86,0x83,0x11,0x51,0x89,0x9A,0x2B,
+0xA9,0x99,0x3E,0x36,0x47,0x06,0x81,0x6A,0xBA,0x3E,
+0x25,0x71,0x78,0x50,0xC2,0x6C,0x9C,0xD0,0xD8,0x9D,
};
const uint8_t refSHA_SHA1_56[]={
@@ -26,11 +31,21 @@ const uint8_t refSHA_SHA1_56[]={ 0x4A,0xA1,0xF9,0x51,0x29,0xE5,0xE5,0x46,0x70,0xF1,
};
+const uint8_t refSHA_SHA1_64[]={
+0x00,0x98,0xBA,0x82,0x4B,0x5C,0x16,0x42,0x7B,0xD7,
+0xA1,0x12,0x2A,0x5A,0x44,0x2A,0x25,0xEC,0x64,0x4D,
+
+};
+const uint8_t refSHA_SHA1_128[]={
+0xAD,0x5B,0x3F,0xDB,0xCB,0x52,0x67,0x78,0xC2,0x83,
+0x9D,0x2F,0x15,0x1E,0xA7,0x53,0x99,0x5E,0x26,0xA0,
+
+};
const uint8_t refSHA_SHA256_3[]={
-0xC0,0xDD,0xD6,0x2C,0x77,0x17,0x18,0x0E,0x7F,0xFB,
-0x8A,0x15,0xBB,0x96,0x74,0xD3,0xEC,0x92,0x59,0x2E,
-0x0B,0x7A,0xC7,0xD1,0xD5,0x28,0x98,0x36,0xB4,0x55,
-0x3B,0xE2,
+0xBA,0x78,0x16,0xBF,0x8F,0x01,0xCF,0xEA,0x41,0x41,
+0x40,0xDE,0x5D,0xAE,0x22,0x23,0xB0,0x03,0x61,0xA3,
+0x96,0x17,0x7A,0x9C,0xB4,0x10,0xFF,0x61,0xF2,0x00,
+0x15,0xAD,
};
const uint8_t refSHA_SHA256_56[]={
0x24,0x8D,0x6A,0x61,0xD2,0x06,0x38,0xB8,0xE5,0xC0,
@@ -38,14 +53,26 @@ const uint8_t refSHA_SHA256_56[]={ 0x64,0xFF,0x21,0x67,0xF6,0xEC,0xED,0xD4,0x19,0xDB,
0x06,0xC1,
};
+const uint8_t refSHA_SHA256_64[]={
+0xFF,0xE0,0x54,0xFE,0x7A,0xE0,0xCB,0x6D,0xC6,0x5C,
+0x3A,0xF9,0xB6,0x1D,0x52,0x09,0xF4,0x39,0x85,0x1D,
+0xB4,0x3D,0x0B,0xA5,0x99,0x73,0x37,0xDF,0x15,0x46,
+0x68,0xEB,
+};
+const uint8_t refSHA_SHA256_128[]={
+0x68,0x36,0xCF,0x13,0xBA,0xC4,0x00,0xE9,0x10,0x50,
+0x71,0xCD,0x6A,0xF4,0x70,0x84,0xDF,0xAC,0xAD,0x4E,
+0x5E,0x30,0x2C,0x94,0xBF,0xED,0x24,0xE0,0x13,0xAF,
+0xB7,0x3E,
+};
const uint8_t refSHA_SHA512_3[]={
-0x3E,0xBB,0x6E,0x93,0x1E,0xAA,0x4D,0xCF,0x74,0x1A,
-0xD1,0x23,0x37,0xD4,0xF7,0x10,0x5B,0x02,0xD4,0xA9,
-0xB1,0x94,0x21,0x4E,0x88,0x55,0x9E,0x8E,0x41,0xEC,
-0x04,0xD3,0x20,0xE9,0x6A,0x3C,0xF9,0x12,0xED,0x27,
-0x34,0x29,0x35,0xA6,0xF8,0x9D,0x1F,0x5C,0x1A,0x5C,
-0xD7,0xF7,0xFF,0xBF,0xA9,0xB1,0xBE,0x1A,0x41,0x62,
-0xED,0x32,0x3C,0x7A,
+0xDD,0xAF,0x35,0xA1,0x93,0x61,0x7A,0xBA,0xCC,0x41,
+0x73,0x49,0xAE,0x20,0x41,0x31,0x12,0xE6,0xFA,0x4E,
+0x89,0xA9,0x7E,0xA2,0x0A,0x9E,0xEE,0xE6,0x4B,0x55,
+0xD3,0x9A,0x21,0x92,0x99,0x2A,0x27,0x4F,0xC1,0xA8,
+0x36,0xBA,0x3C,0x23,0xA3,0xFE,0xEB,0xBD,0x45,0x4D,
+0x44,0x23,0x64,0x3C,0xE8,0x0E,0x2A,0x9A,0xC9,0x4F,
+0xA5,0x4C,0xA4,0x9F,
};
const uint8_t refSHA_SHA512_56[]={
0x20,0x4A,0x8F,0xC6,0xDD,0xA8,0x2F,0x0A,0x0C,0xED,
@@ -56,3 +83,21 @@ const uint8_t refSHA_SHA512_56[]={ 0x85,0xC7,0xA7,0x1D,0xD7,0x03,0x54,0xEC,0x63,0x12,
0x38,0xCA,0x34,0x45,
};
+const uint8_t refSHA_SHA512_64[]={
+0x01,0xD3,0x5C,0x10,0xC6,0xC3,0x8C,0x2D,0xCF,0x48,
+0xF7,0xEE,0xBB,0x32,0x35,0xFB,0x5A,0xD7,0x4A,0x65,
+0xEC,0x4C,0xD0,0x16,0xE2,0x35,0x4C,0x63,0x7A,0x8F,
+0xB4,0x9B,0x69,0x5E,0xF3,0xC1,0xD6,0xF7,0xAE,0x4C,
+0xD7,0x4D,0x78,0xCC,0x9C,0x9B,0xCA,0xC9,0xD4,0xF2,
+0x3A,0x73,0x01,0x99,0x98,0xA7,0xF7,0x30,0x38,0xA5,
+0xC9,0xB2,0xDB,0xDE,
+};
+const uint8_t refSHA_SHA512_128[]={
+0xB7,0x3D,0x19,0x29,0xAA,0x61,0x59,0x34,0xE6,0x1A,
+0x87,0x15,0x96,0xB3,0xF3,0xB3,0x33,0x59,0xF4,0x2B,
+0x81,0x75,0x60,0x2E,0x89,0xF7,0xE0,0x6E,0x5F,0x65,
+0x8A,0x24,0x36,0x67,0x80,0x7E,0xD3,0x00,0x31,0x4B,
+0x95,0xCA,0xCD,0xD5,0x79,0xF3,0xE3,0x3A,0xBD,0xFB,
+0xE3,0x51,0x90,0x95,0x19,0xA8,0x46,0xD4,0x65,0xC5,
+0x95,0x82,0xF3,0x21,
+};
diff --git a/test/crypto/source/testref/ref_sha.h b/test/crypto/source/testref/ref_sha.h index 0d413b672..36e399ffe 100644 --- a/test/crypto/source/testref/ref_sha.h +++ b/test/crypto/source/testref/ref_sha.h @@ -1,5 +1,5 @@ /*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+ ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@@ -16,10 +16,17 @@ #ifndef TEST_REF_SHA_H_
#define TEST_REF_SHA_H_
+extern const uint8_t refSHA_SHA1_EMPTY[];
extern const uint8_t refSHA_SHA1_3[];
extern const uint8_t refSHA_SHA1_56[];
+extern const uint8_t refSHA_SHA1_64[];
+extern const uint8_t refSHA_SHA1_128[];
extern const uint8_t refSHA_SHA256_3[];
extern const uint8_t refSHA_SHA256_56[];
+extern const uint8_t refSHA_SHA256_64[];
+extern const uint8_t refSHA_SHA256_128[];
extern const uint8_t refSHA_SHA512_3[];
extern const uint8_t refSHA_SHA512_56[];
+extern const uint8_t refSHA_SHA512_64[];
+extern const uint8_t refSHA_SHA512_128[];
#endif //TEST_REF_SHA_H_
diff --git a/testhal/ATSAMA5D2/CRYPTO/.cproject b/testhal/ATSAMA5D2/CRYPTO/.cproject new file mode 100644 index 000000000..d28be93f8 --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/.cproject @@ -0,0 +1,53 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="0.114656749">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.114656749" moduleId="org.eclipse.cdt.core.settings" name="Default">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactName="${ProjName}" buildProperties="" description="" id="0.114656749" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+ <folderInfo id="0.114656749." name="/" resourcePath="">
+ <toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1182750861" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
+ <targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1182750861.169007201" name=""/>
+ <builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.579570726" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.libs.2143276802" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1873650595" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1337802279" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1707090075" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.338985256" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1165165914" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.714476670" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ <sourceEntries>
+ <entry excluding="os/hal/ports/SAMA/LLD/CRYPTOv2" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+ </sourceEntries>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <project id="SAMA5D2-CRYPTO.null.1703860681" name="RT-ARM7-GENERIC"/>
+ </storageModule>
+ <storageModule moduleId="scannerConfiguration">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+ <scannerConfigBuildInfo instanceId="0.114656749">
+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
+ </scannerConfigBuildInfo>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+ <storageModule moduleId="refreshScope"/>
+</cproject>
diff --git a/testhal/ATSAMA5D2/CRYPTO/.project b/testhal/ATSAMA5D2/CRYPTO/.project new file mode 100644 index 000000000..a91ef1674 --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/.project @@ -0,0 +1,101 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>SAMA5D2-CRYPTO</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.autoBuildTarget</key> + <value>all</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value>-j1</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.cleanBuildTarget</key> + <value>clean</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.fullBuildTarget</key> + <value>all</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <triggers>full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>board</name> + <type>2</type> + <locationURI>CHIBIOS/os/hal/boards/ATSAMA5D2_XULT</locationURI> + </link> + <link> + <name>cry</name> + <type>2</type> + <locationURI>CHIBIOS/test/crypto</locationURI> + </link> + <link> + <name>os</name> + <type>2</type> + <locationURI>CHIBIOS/os</locationURI> + </link> + </linkedResources> + <variableList> + <variable> + <name>CHIBIOS</name> + <value>file:/C:/ChibiStudio/chibios_trunk</value> + </variable> + </variableList> +</projectDescription> diff --git a/testhal/ATSAMA5D2/CRYPTO/Makefile b/testhal/ATSAMA5D2/CRYPTO/Makefile new file mode 100644 index 000000000..092427833 --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/Makefile @@ -0,0 +1,246 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -Og -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+ USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+ USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = no
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+ USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the ARM System/User stack. This
+# stack is the stack used by the main() thread.
+ifeq ($(USE_SYSTEM_STACKSIZE),)
+ USE_SYSTEM_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the ARM IRQ stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+ USE_IRQ_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the ARM FIQ stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_FIQ_STACKSIZE),)
+ USE_FIQ_STACKSIZE = 64
+endif
+
+# Stack size to the allocated to the ARM Supervisor stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_SUPERVISOR_STACKSIZE),)
+ USE_SUPERVISOR_STACKSIZE = 8
+endif
+
+# Stack size to the allocated to the ARM Undefined stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_UND_STACKSIZE),)
+ USE_UND_STACKSIZE = 8
+endif
+
+# Stack size to the allocated to the ARM Abort stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_ABT_STACKSIZE),)
+ USE_ABT_STACKSIZE = 8
+endif
+
+# Enables the use of FPU.
+ifeq ($(USE_FPU),)
+ USE_FPU = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+BUILDDIR := ./build
+DEPDIR := ./.dep
+
+# Imported source files and paths
+CHIBIOS = ../../..
+# Licensing files.
+include $(CHIBIOS)/os/license/license.mk
+# Startup files.
+include $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC/mk/startup_sama5d2.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/platform.mk
+include $(CHIBIOS)/os/hal/boards/ATSAMA5D2_XULT/board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk
+# Other files (optional).
+include $(CHIBIOS)/test/lib/test.mk
+include $(CHIBIOS)/test/crypto/crypto_test.mk
+
+# Define linker script file here
+#LDSCRIPT= $(STARTUPLD)/SAMA5D2.ld
+LDSCRIPT= $(STARTUPLD)/SAMA5D2ddr.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(ALLCSRC) \
+ $(TESTSRC) \
+ main.c
+
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC =
+ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+
+INCDIR = $(ALLINC) \
+ $(TESTINC)
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-a5
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra -Wundef
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS = -DPLATFORM_CRY_USE_CRY1=TRUE -DLOG_CRYPTO_DATA -DCRYPTO_LOG_LEVEL=1 -DSAMA_DMA_REQUIRED -DTEST_DELAY_BETWEEN_TESTS=0
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC
+include $(RULESPATH)/rules.mk
+
+##############################################################################
+# MISRA check rule, requires PCLint and the setup files, not provided.
+#
+misra:
+ @lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(CSRC) &> misra.txt
diff --git a/testhal/ATSAMA5D2/CRYPTO/chconf.h b/testhal/ATSAMA5D2/CRYPTO/chconf.h new file mode 100644 index 000000000..0c9477e7a --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/chconf.h @@ -0,0 +1,615 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY 1000
+
+/**
+ * @brief Time intervals data size.
+ * @note Allowed values are 16, 32 or 64 bits.
+ */
+#define CH_CFG_INTERVALS_SIZE 32
+
+/**
+ * @brief Time types data size.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_TIME_TYPES_SIZE 32
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define CH_CFG_ST_TIMEDELTA 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ * @note The round robin preemption is not supported in tickless mode and
+ * must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM 0
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE 0
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread. The application @p main()
+ * function becomes the idle thread and must implement an
+ * infinite loop.
+ */
+#define CH_CFG_NO_IDLE_THREAD FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM FALSE
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY TRUE
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT TRUE
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES TRUE
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES TRUE
+
+/**
+ * @brief Enables recursive behavior on mutexes.
+ * @note Recursive mutexes are heavier and have an increased
+ * memory footprint.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS TRUE
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS TRUE
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES TRUE
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES TRUE
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE TRUE
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ * @p CH_CFG_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP TRUE
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS TRUE
+
+/**
+ * @brief Objects FIFOs APIs.
+ * @details If enabled then the objects FIFOs APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_OBJ_FIFOS TRUE
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_WAITEXIT.
+ * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Objects factory options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Objects Factory APIs.
+ * @details If enabled then the objects factory APIs are included in the
+ * kernel.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_CFG_USE_FACTORY TRUE
+
+/**
+ * @brief Maximum length for object names.
+ * @details If the specified length is zero then the name is stored by
+ * pointer but this could have unintended side effects.
+ */
+#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
+
+/**
+ * @brief Enables the registry of generic objects.
+ */
+#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
+
+/**
+ * @brief Enables factory for generic buffers.
+ */
+#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
+
+/**
+ * @brief Enables factory for semaphores.
+ */
+#define CH_CFG_FACTORY_SEMAPHORES TRUE
+
+/**
+ * @brief Enables factory for mailboxes.
+ */
+#define CH_CFG_FACTORY_MAILBOXES TRUE
+
+/**
+ * @brief Enables factory for objects FIFOs.
+ */
+#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, kernel statistics.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS FALSE
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS TRUE
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS TRUE
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the trace buffer is activated.
+ *
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
+
+/**
+ * @brief Trace buffer entries.
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_BUFFER_SIZE 128
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_FILL_THREADS FALSE
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p FALSE.
+ * @note This debug option is not currently compatible with the
+ * tickless mode.
+ */
+#define CH_DBG_THREADS_PROFILING FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System structure extension.
+ * @details User fields added to the end of the @p ch_system_t structure.
+ */
+#define CH_CFG_SYSTEM_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief System initialization hook.
+ * @details User initialization code added to the @p chSysInit() function
+ * just before interrupts are enabled globally.
+ */
+#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitly from all
+ * the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* Context switch code here.*/ \
+}
+
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() { \
+ /* Idle-enter code here.*/ \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() { \
+ /* Idle-leave code here.*/ \
+}
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() { \
+ /* System tick event code here.*/ \
+}
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
+ /* System halt code here.*/ \
+}
+
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+/**
+ * @brief Trust zone configuration.
+ * @details If enabled the kernel is configured for the secure world
+ * and can access specific devices.
+ */
+#define CH_CFG_SEC_WORLD TRUE
+
+#endif /* CHCONF_H */
+
+/** @} */
diff --git a/testhal/ATSAMA5D2/CRYPTO/debug/SAMA5D2-CRYPTO (DDRAM).launch b/testhal/ATSAMA5D2/CRYPTO/debug/SAMA5D2-CRYPTO (DDRAM).launch new file mode 100644 index 000000000..c0c2b200a --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/debug/SAMA5D2-CRYPTO (DDRAM).launch @@ -0,0 +1,58 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
+<stringAttribute key="bad_container_name" value="/RT-SAMA5D2-XPLAINED-LWIP-WOLFSSL/debu"/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="mon reg cpsr = 0xd3 set *0xF8048000 = 0xA5000004 set *0x00A00100 = 0 set *0xF8048044 = 0x00008000 mon cp15 1 0 0 0 = 0x00C50078 set *0xF0014004 = 0x4 set *0xF0014014 = 1<<13 load ./bootstrap.elf mon reg pc = 0x00200000 continue"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value="27000000"/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="_start"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="null-_pal_lld_setgroupmode-(format)" val="4"/><content id="null-sama_clock_init-(format)" val="4"/><content id="null-boardInit-(format)" val="2"/><content id="mode-_pal_lld_setgroupmode-(format)" val="4"/></contentList>"/>
+<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
+<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="SAMA5D2-CRYPTO"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/SAMA5D2-CRYPTO"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<mapAttribute key="org.eclipse.debug.core.preferred_launchers">
+<mapEntry key="[debug]" value="org.eclipse.cdt.debug.gdbjtag.core.dsfLaunchDelegate"/>
+</mapAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"> <gdbmemoryBlockExpression address="655394208" label="0x271085a0"/> </memoryBlockExpressionList> "/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/testhal/ATSAMA5D2/CRYPTO/halconf.h b/testhal/ATSAMA5D2/CRYPTO/halconf.h new file mode 100644 index 000000000..5f19391d4 --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/halconf.h @@ -0,0 +1,437 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef HALCONF_H
+#define HALCONF_H
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the cryptographic subsystem.
+ */
+#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
+#define HAL_USE_CRY TRUE
+#endif
+
+/**
+ * @brief Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the QSPI subsystem.
+ */
+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
+#define HAL_USE_QSPI FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/**
+ * @brief Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG FALSE
+#endif
+
+/*===========================================================================*/
+/* PAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
+#define PAL_USE_CALLBACKS FALSE
+#endif
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
+#define PAL_USE_WAIT FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* CRY driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the SW fall-back of the cryptographic driver.
+ * @details When enabled, this option, activates a fall-back software
+ * implementation for algorithms not supported by the underlying
+ * hardware.
+ * @note Fall-back implementations may not be present for all algorithms.
+ */
+#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_USE_FALLBACK FALSE
+#endif
+
+/**
+ * @brief Makes the driver forcibly use the fall-back implementations.
+ */
+#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_ENFORCE_FALLBACK FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 16 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting. */
+/*===========================================================================*/
+
+/**
+ * @brief Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ * the USB data endpoint maximum packet size.
+ * @note The default is 256 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE 256
+#endif
+
+/**
+ * @brief Serial over USB number of buffers.
+ * @note The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER 2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT FALSE
+#endif
+
+/**
+ * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT FALSE
+#endif
+
+#endif /* HALCONF_H */
+
+/** @} */
diff --git a/testhal/ATSAMA5D2/CRYPTO/main.c b/testhal/ATSAMA5D2/CRYPTO/main.c new file mode 100644 index 000000000..652fd7693 --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/main.c @@ -0,0 +1,74 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+#include "cry_test_root.h"
+/*
+ * LED blinker thread, times are in milliseconds.
+ */
+static THD_WORKING_AREA(waThread1, 128);
+static THD_FUNCTION(Thread1, arg) {
+
+ (void)arg;
+ chRegSetThreadName("blinker");
+ while (TRUE) {
+ palClearLine(LINE_LED_BLUE);
+ chThdSleepMilliseconds(500);
+ palSetLine(LINE_LED_BLUE);
+ chThdSleepMilliseconds(500);
+ }
+}
+
+static const SerialConfig sdcfg = { 115200, 0,UART_MR_PAR_NO };
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Activates the serial driver 1 using the driver default configuration.
+ */
+ sdStart(&SD1, &sdcfg);
+ cryptoTest_setStream((BaseSequentialStream *)&SD1);
+ /* Redirecting UART0 RX on PB26 and UART0 TX on PB 27. */
+ palSetGroupMode(PIOD, PAL_PORT_BIT(2) | PAL_PORT_BIT(3), 0U,
+ PAL_SAMA_FUNC_PERIPH_A | PAL_MODE_SECURE);
+ /*
+ * Creates the blinker thread.
+ */
+ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+
+ test_execute((BaseSequentialStream *)&SD1, &cry_test_suite);
+ /*
+ * Normal main() thread activity, in this demo it does nothing except
+ * sleeping in a loop and check the button state.
+ */
+ while (true) {
+ chThdSleepMilliseconds(500);
+ }
+}
diff --git a/testhal/ATSAMA5D2/CRYPTO/mcuconf.h b/testhal/ATSAMA5D2/CRYPTO/mcuconf.h new file mode 100644 index 000000000..816d64136 --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/mcuconf.h @@ -0,0 +1,142 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+#define SAMA5D2x_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define SAMA_HAL_IS_SECURE TRUE
+#define SAMA_NO_INIT TRUE
+#define SAMA_MOSCRC_ENABLED FALSE
+#define SAMA_MOSCXT_ENABLED TRUE
+#define SAMA_MOSC_SEL SAMA_MOSC_MOSCXT
+#define SAMA_OSC_SEL SAMA_OSC_OSCXT
+#define SAMA_MCK_SEL SAMA_MCK_PLLA_CLK
+#define SAMA_MCK_PRES_VALUE 1
+#define SAMA_MCK_MDIV_VALUE 3
+#define SAMA_PLLA_MUL_VALUE 83
+#define SAMA_PLLADIV2_EN TRUE
+#define SAMA_H64MX_H32MX_RATIO 2
+
+/*
+ * SPI driver system settings.
+ */
+#define SAMA_SPI_USE_SPI0 FALSE
+#define SAMA_SPI_USE_SPI1 FALSE
+#define SAMA_SPI_USE_FLEXCOM0 FALSE
+#define SAMA_SPI_USE_FLEXCOM1 FALSE
+#define SAMA_SPI_USE_FLEXCOM2 FALSE
+#define SAMA_SPI_USE_FLEXCOM3 FALSE
+#define SAMA_SPI_USE_FLEXCOM4 FALSE
+#define SAMA_SPI_SPI0_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_SPI1_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY 4
+#define SAMA_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * SERIAL driver system settings.
+ */
+#define SAMA_SERIAL_USE_UART0 FALSE
+#define SAMA_SERIAL_USE_UART1 TRUE
+#define SAMA_SERIAL_USE_UART2 FALSE
+#define SAMA_SERIAL_USE_UART3 FALSE
+#define SAMA_SERIAL_USE_UART4 FALSE
+#define SAMA_SERIAL_USE_UART5 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM0 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM1 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM2 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM3 FALSE
+#define SAMA_SERIAL_USE_FLEXCOM4 FALSE
+#define SAMA_SERIAL_UART0_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART1_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART2_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART3_IRQ_PRIORITY 4
+#define SAMA_SERIAL_UART4_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM0_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM1_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM2_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM3_IRQ_PRIORITY 4
+#define SAMA_SERIAL_FLEXCOM4_IRQ_PRIORITY 4
+
+/*
+ * SECUMOD
+ */
+#define HAL_USE_SECUMOD FALSE
+#define SAMA_ST_USE_PIT FALSE
+#define SAMA_ST_USE_TC0 FALSE
+#define SAMA_ST_USE_TC1 FALSE
+
+
+/*
+ * TC driver system settings.
+ */
+#define HAL_USE_TC FALSE
+#define SAMA_USE_TC0 FALSE
+#define SAMA_USE_TC1 FALSE
+#define SAMA_TC0_IRQ_PRIORITY 2
+#define SAMA_TC1_IRQ_PRIORITY 2
+
+
+/*
+ * SDMMC driver system settings.
+ */
+#define HAL_USE_SDMMC FALSE
+
+/*
+ * UART driver system settings.
+ */
+#define SAMA_UART_USE_UART0 FALSE
+#define SAMA_UART_USE_UART1 FALSE
+#define SAMA_UART_USE_UART2 FALSE
+#define SAMA_UART_USE_UART3 FALSE
+#define SAMA_UART_USE_UART4 FALSE
+#define SAMA_UART_USE_FLEXCOM0 FALSE
+#define SAMA_UART_USE_FLEXCOM1 FALSE
+#define SAMA_UART_USE_FLEXCOM2 FALSE
+#define SAMA_UART_USE_FLEXCOM3 FALSE
+#define SAMA_UART_USE_FLEXCOM4 FALSE
+#define SAMA_UART_UART0_IRQ_PRIORITY 4
+#define SAMA_UART_UART1_IRQ_PRIORITY 4
+#define SAMA_UART_UART2_IRQ_PRIORITY 4
+#define SAMA_UART_UART3_IRQ_PRIORITY 4
+#define SAMA_UART_UART4_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM0_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM1_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM2_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM3_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM4_IRQ_PRIORITY 4
+#define SAMA_UART_UART0_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART1_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART2_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART3_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_UART4_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM0_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM1_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM2_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM3_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_FLEXCOM4_DMA_IRQ_PRIORITY 4
+#define SAMA_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+
+#endif /* MCUCONF_H */
diff --git a/testhal/ATSAMA5D2/CRYPTO/readme.txt b/testhal/ATSAMA5D2/CRYPTO/readme.txt new file mode 100644 index 000000000..38f713877 --- /dev/null +++ b/testhal/ATSAMA5D2/CRYPTO/readme.txt @@ -0,0 +1,14 @@ +*****************************************************************************
+** ChibiOS/RT port for ARM-A5. **
+*****************************************************************************
+
+** TARGET **
+
+The demo targets a generic ARM Cortex-A5 device without HAL support.
+
+** The Demo **
+Demo runs test for Hal Crypto
+
+** Build Procedure **
+
+** Notes **
diff --git a/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch b/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch index 8fed6b9bc..4ae172255 100644 --- a/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch +++ b/testhal/ATSAMA5D2/SDMMC/debug/SAMA5D2-SDMMC (DDRAM).launch @@ -6,7 +6,7 @@ <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="mon reg cpsr = 0xd3 set *0xF8048000 = 0xA5000004 set *0x00A00100 = 0 set *0xF8048044 = 0x00008000 mon cp15 1 0 0 0 = 0x00C50078 set *0xF0014004 = 0x4 set *0xF0014014 = 1<<13 load ~/bootstrap.elf mon reg pc = 0x00200000 continue"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="mon reg cpsr = 0xd3 set *0xF8048000 = 0xA5000004 set *0x00A00100 = 0 set *0xF8048044 = 0x00008000 mon cp15 1 0 0 0 = 0x00C50078 set *0xF0014004 = 0x4 set *0xF0014014 = 1<<13 load ./bootstrap.elf mon reg pc = 0x00200000 continue"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
|