git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4903 35acf78f-673a-0410-8e92-d51de3d6d3f4

8 files changed, 103 insertions, 78 deletions

diff --git a/demos/PPC-SPC563M-GCC/mcuconf.h b/demos/PPC-SPC563M-GCC/mcuconf.h
index 6b54153b1..555b0eb88 100644
--- a/demos/PPC-SPC563M-GCC/mcuconf.h
+++ b/demos/PPC-SPC563M-GCC/mcuconf.h
@@ -28,24 +28,24 @@
 /*

  * HAL driver system settings.

  */

-#define SPC_NO_INIT                         FALSE

-#define SPC_CLK_BYPASS                      FALSE

-#define SPC_ALLOW_OVERCLOCK                 FALSE

-#define SPC_CLK_PREDIV                      1

-#define SPC_CLK_MFD                         80

-#define SPC_CLK_RFD                         RFD_DIV4

-#define SPC_FLASH_BIUCR                     (BIUCR_BANK1_TOO |              \

-                                             BIUCR_MASTER4_PREFETCH |       \

-                                             BIUCR_MASTER0_PREFETCH |       \

-                                             BIUCR_DPFEN |                  \

-                                             BIUCR_IPFEN |                  \

-                                             BIUCR_PFLIM_ON_MISS |          \

-                                             BIUCR_BFEN)

+#define SPC5_NO_INIT                        FALSE

+#define SPC5_CLK_BYPASS                     FALSE

+#define SPC5_ALLOW_OVERCLOCK                FALSE

+#define SPC5_CLK_PREDIV                     1

+#define SPC5_CLK_MFD                        80

+#define SPC5_CLK_RFD                        RFD_DIV4

+#define SPC5_FLASH_BIUCR                    (BIUCR_BANK1_TOO |              \

+                                            BIUCR_MASTER4_PREFETCH |       \

+                                            BIUCR_MASTER0_PREFETCH |       \

+                                            BIUCR_DPFEN |                  \

+                                            BIUCR_IPFEN |                  \

+                                            BIUCR_PFLIM_ON_MISS |          \

+                                            BIUCR_BFEN)

 

 /*

  * SERIAL driver system settings.

  */

-#define SPC_USE_ESCIA                       TRUE

-#define SPC_USE_ESCIB                       TRUE

-#define SPC_ESCIA_PRIORITY                  8

-#define SPC_ESCIB_PRIORITY                  8

+#define SPC5_USE_ESCIA                      TRUE

+#define SPC5_USE_ESCIB                      TRUE

+#define SPC5_ESCIA_PRIORITY                 8

+#define SPC5_ESCIB_PRIORITY                 8

diff --git a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
index e2d06339b..ab78c3bf9 100644
--- a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
+++ b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
@@ -69,7 +69,7 @@
 #define SPC5_LINFLEX3_ERR_NUMBER            124

 

 /* SIU/SIUL attributes.*/

-#define SPC5_HAS_SIU                        FALSE

+#define SPC5_HAS_SIU                        TRUE

 #define SPC5_SIU_PCTL                       68

 #define SPC5_SIU_SUPPORTS_PORTS             TRUE

 #define SPC5_SIU_NUM_PORTS                  8

diff --git a/os/hal/platforms/SPC560Pxx/spc560p_registry.h b/os/hal/platforms/SPC560Pxx/spc560p_registry.h
index c569000dd..86536e11a 100644
--- a/os/hal/platforms/SPC560Pxx/spc560p_registry.h
+++ b/os/hal/platforms/SPC560Pxx/spc560p_registry.h
@@ -55,7 +55,7 @@
 #define SPC5_HAS_LINFLEX3                   FALSE

 

 /* SIU/SIUL attributes.*/

-#define SPC5_HAS_SIU                        FALSE

+#define SPC5_HAS_SIU                        TRUE

 #define SPC5_SIU_SUPPORTS_PORTS             TRUE

 #define SPC5_SIU_NUM_PORTS                  8

 #define SPC5_SIU_NUM_PCRS                   108

diff --git a/os/hal/platforms/SPC563Mxx/hal_lld.c b/os/hal/platforms/SPC563Mxx/hal_lld.c
index 89a5d9e45..a140536e3 100644
--- a/os/hal/platforms/SPC563Mxx/hal_lld.c
+++ b/os/hal/platforms/SPC563Mxx/hal_lld.c
@@ -58,7 +58,7 @@ void hal_lld_init(void) {
                 "mtspr   1013, %%r3": : : "r3");

 

   /* FLASH wait states and prefetching setup.*/

-  CFLASH0.BIUCR.R  = SPC_FLASH_BIUCR | SPC_FLASH_WS;

+  CFLASH0.BIUCR.R  = SPC5_FLASH_BIUCR | SPC5_FLASH_WS;

   CFLASH0.BIUCR2.R = 0;

   CFLASH0.PFCR3.R  = 0;

 

@@ -81,7 +81,7 @@ void hal_lld_init(void) {
 

   /* Downcounter timer initialized for system tick use, TB enabled for debug

      and measurements.*/

-  n = SPC_SYSCLK / CH_FREQUENCY;

+  n = SPC5_SYSCLK / CH_FREQUENCY;

   asm volatile ("li      %%r3, 0            \t\n"

                 "mtspr   284, %%r3          \t\n"   /* Clear TBL register.  */

                 "mtspr   285, %%r3          \t\n"   /* Clear TBU register.  */

@@ -110,18 +110,18 @@ void hal_lld_init(void) {
  */

 void spc_clock_init(void) {

 

-#if !SPC_NO_INIT

+#if !SPC5_NO_INIT

   /* PLL activation.*/

   FMPLL.ESYNCR1.B.EMODE     = 1;

   FMPLL.ESYNCR1.B.CLKCFG   &= 1;                    /* Bypass mode, PLL off.*/

   FMPLL.ESYNCR1.B.CLKCFG   |= 2;                    /* PLL on.              */

-  FMPLL.ESYNCR1.B.EPREDIV   = SPC_CLK_PREDIV;

-  FMPLL.ESYNCR1.B.EMFD      = SPC_CLK_MFD;

-  FMPLL.ESYNCR2.B.ERFD      = SPC_CLK_RFD;

+  FMPLL.ESYNCR1.B.EPREDIV   = SPC5_CLK_PREDIV;

+  FMPLL.ESYNCR1.B.EMFD      = SPC5_CLK_MFD;

+  FMPLL.ESYNCR2.B.ERFD      = SPC5_CLK_RFD;

   while (!FMPLL.SYNSR.B.LOCK)

     ;

   FMPLL.ESYNCR1.B.CLKCFG   |= 4;                    /* Clock from the PLL.  */

-#endif /* !SPC_NO_INIT */

+#endif /* !SPC5_NO_INIT */

 }

 

 /** @} */

diff --git a/os/hal/platforms/SPC563Mxx/hal_lld.h b/os/hal/platforms/SPC563Mxx/hal_lld.h
index afb4a459f..bda58ed00 100644
--- a/os/hal/platforms/SPC563Mxx/hal_lld.h
+++ b/os/hal/platforms/SPC563Mxx/hal_lld.h
@@ -24,6 +24,7 @@
 #define _HAL_LLD_H_

 

 #include "mpc563m.h"

+#include "spc563m_registry.h"

 

 /*===========================================================================*/

 /* Driver constants.                                                         */

@@ -96,7 +97,7 @@
  * @brief   Disables the clocks initialization in the HAL.

  */

 #if !defined(SPC5_NO_INIT) || defined(__DOXYGEN__)

-#define SPC_NO_INIT                         FALSE

+#define SPC5_NO_INIT                         FALSE

 #endif

 

 /**

@@ -105,15 +106,15 @@
  *          external clock is used as-is and the other clock-related settings

  *          are ignored.

  */

-#if !defined(SPC_CLK_BYPASS) || defined(__DOXYGEN__)

-#define SPC_CLK_BYPASS                      FALSE

+#if !defined(SPC5_CLK_BYPASS) || defined(__DOXYGEN__)

+#define SPC5_CLK_BYPASS                      FALSE

 #endif

 

 /**

  * @brief   Disables the overclock checks.

  */

-#if !defined(SPC_ALLOW_OVERCLOCK) || defined(__DOXYGEN__)

-#define SPC_ALLOW_OVERCLOCK                 FALSE

+#if !defined(SPC5_ALLOW_OVERCLOCK) || defined(__DOXYGEN__)

+#define SPC5_ALLOW_OVERCLOCK                 FALSE

 #endif

 

 /**

@@ -121,23 +122,23 @@
  * @note    Must be in range 0...14.

  * @note    The effective divider factor is this value plus one.

  */

-#if !defined(SPC_CLK_PREDIV) || defined(__DOXYGEN__)

-#define SPC_CLK_PREDIV                      1

+#if !defined(SPC5_CLK_PREDIV) || defined(__DOXYGEN__)

+#define SPC5_CLK_PREDIV                      1

 #endif

 

 /**

  * @brief   Multiplication factor divider.

  * @note    Must be in range 32...96.

  */

-#if !defined(SPC_CLK_MFD) || defined(__DOXYGEN__)

-#define SPC_CLK_MFD                         80

+#if !defined(SPC5_CLK_MFD) || defined(__DOXYGEN__)

+#define SPC5_CLK_MFD                         80

 #endif

 

 /**

  * @brief   Reduced frequency divider.

  */

-#if !defined(SPC_CLK_RFD) || defined(__DOXYGEN__)

-#define SPC_CLK_RFD                         RFD_DIV4

+#if !defined(SPC5_CLK_RFD) || defined(__DOXYGEN__)

+#define SPC5_CLK_RFD                         RFD_DIV4

 #endif

 

 /**

@@ -148,8 +149,8 @@
  *          those are calculated from the system clock and ORed with this

  *          value.

  */

-#if !defined(SPC_FLASH_BIUCR) || defined(__DOXYGEN__)

-#define SPC_FLASH_BIUCR                     (BIUCR_BANK1_TOO |              \

+#if !defined(SPC5_FLASH_BIUCR) || defined(__DOXYGEN__)

+#define SPC5_FLASH_BIUCR                     (BIUCR_BANK1_TOO |              \

                                              BIUCR_MASTER4_PREFETCH |       \

                                              BIUCR_MASTER0_PREFETCH |       \

                                              BIUCR_DPFEN |                  \

@@ -169,50 +170,50 @@
 #error "Using a wrong mcuconf.h file, SPC563Mxx_MCUCONF not defined"

 #endif

 

-#if (SPC_CLK_PREDIV < 0) || (SPC_CLK_PREDIV > 14)

-#error "invalid SPC_CLK_PREDIV value specified"

+#if (SPC5_CLK_PREDIV < 0) || (SPC5_CLK_PREDIV > 14)

+#error "invalid SPC5_CLK_PREDIV value specified"

 #endif

 

-#if (SPC_CLK_MFD < 32) || (SPC_CLK_MFD > 96)

-#error "invalid SPC_CLK_MFD value specified"

+#if (SPC5_CLK_MFD < 32) || (SPC5_CLK_MFD > 96)

+#error "invalid SPC5_CLK_MFD value specified"

 #endif

 

-#if (SPC_CLK_RFD != RFD_DIV2) && (SPC_CLK_RFD != RFD_DIV4) &&         \

-    (SPC_CLK_RFD != RFD_DIV8) && (SPC_CLK_RFD != RFD_DIV16)

-#error "invalid SPC_CLK_RFD value specified"

+#if (SPC5_CLK_RFD != RFD_DIV2) && (SPC5_CLK_RFD != RFD_DIV4) &&         \

+    (SPC5_CLK_RFD != RFD_DIV8) && (SPC5_CLK_RFD != RFD_DIV16)

+#error "invalid SPC5_CLK_RFD value specified"

 #endif

 

 /**

  * @brief   PLL output clock.

  */

-#define SPC_PLLCLK   ((EXTCLK / (SPC_CLK_PREDIV + 1)) * SPC_CLK_MFD)

+#define SPC5_PLLCLK   ((EXTCLK / (SPC5_CLK_PREDIV + 1)) * SPC5_CLK_MFD)

 

-#if (SPC_PLLCLK < 256000000) || (SPC_PLLCLK > 512000000)

+#if (SPC5_PLLCLK < 256000000) || (SPC5_PLLCLK > 512000000)

 #error "VCO frequency out of the acceptable range (256...512)"

 #endif

 

 /**

  * @brief   PLL output clock.

  */

-#if !SPC_CLK_BYPASS || defined(__DOXYGEN__)

-#define SPC_SYSCLK   (SPC_PLLCLK / (1 << (SPC_CLK_RFD + 1)))

+#if !SPC5_CLK_BYPASS || defined(__DOXYGEN__)

+#define SPC5_SYSCLK   (SPC5_PLLCLK / (1 << (SPC5_CLK_RFD + 1)))

 #else

-#define SPC_SYSCLK   EXTCLK

+#define SPC5_SYSCLK         EXTCLK

 #endif

 

-#if (SPC_SYSCLK > 80000000) && !SPC_ALLOW_OVERCLOCK

+#if (SPC5_SYSCLK > 80000000) && !SPC5_ALLOW_OVERCLOCK

 #error "System clock above maximum rated frequency (80MHz)"

 #endif

 

 /**

  * @brief   Flash wait states are a function of the system clock.

  */

-#if (SPC_SYSCLK <= 30000000) || defined(__DOXYGEN__)

-#define SPC_FLASH_WS     (BIUCR_APC_0 | BIUCR_RWSC_0 | BIUCR_WWSC_1)

-#elif SPC_SYSCLK <= 60000000

-#define SPC_FLASH_WS     (BIUCR_APC_1 | BIUCR_RWSC_1 | BIUCR_WWSC_1)

+#if (SPC5_SYSCLK <= 30000000) || defined(__DOXYGEN__)

+#define SPC5_FLASH_WS       (BIUCR_APC_0 | BIUCR_RWSC_0 | BIUCR_WWSC_1)

+#elif SPC5_SYSCLK <= 60000000

+#define SPC5_FLASH_WS       (BIUCR_APC_1 | BIUCR_RWSC_1 | BIUCR_WWSC_1)

 #else

-#define SPC_FLASH_WS     (BIUCR_APC_2 | BIUCR_RWSC_2 | BIUCR_WWSC_1)

+#define SPC5_FLASH_WS       (BIUCR_APC_2 | BIUCR_RWSC_2 | BIUCR_WWSC_1)

 #endif

 

 /*===========================================================================*/

diff --git a/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c
index f73c31c9f..447d4adc8 100644
--- a/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c
+++ b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.c
@@ -32,14 +32,14 @@
 /**

  * @brief   eSCI-A serial driver identifier.

  */

-#if SPC_USE_ESCIA || defined(__DOXYGEN__)

+#if SPC5_USE_ESCIA || defined(__DOXYGEN__)

 SerialDriver SD1;

 #endif

 

 /**

  * @brief   eSCI-B serial driver identifier.

  */

-#if SPC_USE_ESCIB || defined(__DOXYGEN__)

+#if SPC5_USE_ESCIB || defined(__DOXYGEN__)

 SerialDriver SD2;

 #endif

 

@@ -73,7 +73,7 @@ static void esci_init(SerialDriver *sdp, const SerialConfig *config) {
   escip->CR2.R  = 0;                /* MDIS off.                            */

   escip->CR1.R  = 0;

   escip->LCR.R  = 0;

-  escip->CR1.B.SBR = SPC_SYSCLK / (16 * config->sc_speed);

+  escip->CR1.B.SBR = SPC5_SYSCLK / (16 * config->sc_speed);

   if (mode & SD_MODE_LOOPBACK)

     escip->CR1.B.LOOPS = 1;

   switch (mode & SD_MODE_PARITY_MASK) {

@@ -161,7 +161,7 @@ static void serve_interrupt(SerialDriver *sdp) {
   }

 }

 

-#if SPC_USE_ESCIA || defined(__DOXYGEN__)

+#if SPC5_USE_ESCIA || defined(__DOXYGEN__)

 static void notify1(GenericQueue *qp) {

 

   (void)qp;

@@ -176,7 +176,7 @@ static void notify1(GenericQueue *qp) {
 }

 #endif

 

-#if SPC_USE_ESCIB || defined(__DOXYGEN__)

+#if SPC5_USE_ESCIB || defined(__DOXYGEN__)

 static void notify2(GenericQueue *qp) {

 

   (void)qp;

@@ -195,13 +195,16 @@ static void notify2(GenericQueue *qp) {
 /* Driver interrupt handlers.                                                */

 /*===========================================================================*/

 

-#if SPC_USE_ESCIA || defined(__DOXYGEN__)

+#if SPC5_USE_ESCIA || defined(__DOXYGEN__)

+#if !defined(SPC5_ESCIA_HANDLER)

+#error "SPC5_ESCIA_HANDLER not defined"

+#endif

 /**

  * @brief   eSCI-A interrupt handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(vector146) {

+CH_IRQ_HANDLER(SPC5_ESCIA_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -211,13 +214,16 @@ CH_IRQ_HANDLER(vector146) {
 }

 #endif

 

-#if SPC_USE_ESCIB || defined(__DOXYGEN__)

+#if SPC5_USE_ESCIB || defined(__DOXYGEN__)

+#if !defined(SPC5_ESCIB_HANDLER)

+#error "SPC5_ESCIB_HANDLER not defined"

+#endif

 /**

  * @brief   eSCI-B interrupt handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(vector149) {

+CH_IRQ_HANDLER(SPC5_ESCIB_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -238,18 +244,18 @@ CH_IRQ_HANDLER(vector149) {
  */

 void sd_lld_init(void) {

 

-#if SPC_USE_ESCIA

+#if SPC5_USE_ESCIA

   sdObjectInit(&SD1, NULL, notify1);

   SD1.escip       = &ESCI_A;

   ESCI_A.CR2.R    = 0x8000;                 /* MDIS ON.                     */

-  INTC.PSR[146].R = SPC_ESCIA_PRIORITY;

+  INTC.PSR[SPC5_ESCIA_NUMBER].R = SPC5_ESCIA_PRIORITY;

 #endif

 

-#if SPC_USE_ESCIB

+#if SPC5_USE_ESCIB

   sdObjectInit(&SD2, NULL, notify2);

   SD2.escip       = &ESCI_B;

   ESCI_B.CR2.R    = 0x8000;                 /* MDIS ON.                     */

-  INTC.PSR[149].R = SPC_ESCIB_PRIORITY;

+  INTC.PSR[SPC5_ESCIB_NUMBER].R = SPC5_ESCIB_PRIORITY;

 #endif

 }

 

diff --git a/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.h b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.h
index 606344d9f..2624ef413 100644
--- a/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.h
+++ b/os/hal/platforms/SPC5xx/ESCI_v1/serial_lld.h
@@ -51,8 +51,8 @@
  * @details If set to @p TRUE the support for eSCI-A is included.

  * @note    The default is @p TRUE.

  */

-#if !defined(SPC_USE_ESCIA) || defined(__DOXYGEN__)

-#define SPC_USE_ESCIA                       TRUE

+#if !defined(SPC5_USE_ESCIA) || defined(__DOXYGEN__)

+#define SPC5_USE_ESCIA                      TRUE

 #endif

 

 /**

@@ -60,22 +60,22 @@
  * @details If set to @p TRUE the support for eSCI-B is included.

  * @note    The default is @p TRUE.

  */

-#if !defined(SPC_USE_ESCIB) || defined(__DOXYGEN__)

-#define SPC_USE_ESCIB                       TRUE

+#if !defined(SPC5_USE_ESCIB) || defined(__DOXYGEN__)

+#define SPC5_USE_ESCIB                      TRUE

 #endif

 

 /**

  * @brief   eSCI-A interrupt priority level setting.

  */

 #if !defined(SPC_ESCIA_PRIORITY) || defined(__DOXYGEN__)

-#define SPC_ESCIA_PRIORITY                  8

+#define SPC5_ESCIA_PRIORITY                 8

 #endif

 

 /**

  * @brief   eSCI-B interrupt priority level setting.

  */

 #if !defined(SPC_ESCIB_PRIORITY) || defined(__DOXYGEN__)

-#define SPC_ESCIB_PRIORITY                  8

+#define SPC5_ESCIB_PRIORITY                 8

 #endif

 

 /*===========================================================================*/

@@ -132,10 +132,10 @@ typedef struct {
 /* External declarations.                                                    */

 /*===========================================================================*/

 

-#if SPC_USE_ESCIA && !defined(__DOXYGEN__)

+#if SPC5_USE_ESCIA && !defined(__DOXYGEN__)

 extern SerialDriver SD1;

 #endif

-#if SPC_USE_ESCIB && !defined(__DOXYGEN__)

+#if SPC5_USE_ESCIB && !defined(__DOXYGEN__)

 extern SerialDriver SD2;

 #endif

 

diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c
index b666a65ae..a79ff5962 100644
--- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c
+++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c
@@ -224,6 +224,9 @@ static void notify2(GenericQueue *qp) {
 /*===========================================================================*/

 

 #if SPC5_SERIAL_USE_LINFLEX0 || defined(__DOXYGEN__)

+#if !defined(SPC5_LINFLEX0_RXI_HANDLER)

+#error "SPC5_LINFLEX0_RXI_HANDLER not defined"

+#endif

 /**

  * @brief   LINFlex-0 RXI interrupt handler.

  *

@@ -238,6 +241,9 @@ CH_IRQ_HANDLER(SPC5_LINFLEX0_RXI_HANDLER) {
   CH_IRQ_EPILOGUE();

 }

 

+#if !defined(SPC5_LINFLEX0_TXI_HANDLER)

+#error "SPC5_LINFLEX0_TXI_HANDLER not defined"

+#endif

 /**

  * @brief   LINFlex-0 TXI interrupt handler.

  *

@@ -252,6 +258,9 @@ CH_IRQ_HANDLER(SPC5_LINFLEX0_TXI_HANDLER) {
   CH_IRQ_EPILOGUE();

 }

 

+#if !defined(SPC5_LINFLEX0_ERR_HANDLER)

+#error "SPC5_LINFLEX0_ERR_HANDLER not defined"

+#endif

 /**

  * @brief   LINFlex-0 ERR interrupt handler.

  *

@@ -268,6 +277,9 @@ CH_IRQ_HANDLER(SPC5_LINFLEX0_ERR_HANDLER) {
 #endif

 

 #if SPC5_SERIAL_USE_LINFLEX1 || defined(__DOXYGEN__)

+#if !defined(SPC5_LINFLEX1_RXI_HANDLER)

+#error "SPC5_LINFLEX1_RXI_HANDLER not defined"

+#endif

 /**

  * @brief   LINFlex-1 RXI interrupt handler.

  *

@@ -282,6 +294,9 @@ CH_IRQ_HANDLER(SPC5_LINFLEX1_RXI_HANDLER) {
   CH_IRQ_EPILOGUE();

 }

 

+#if !defined(SPC5_LINFLEX1_TXI_HANDLER)

+#error "SPC5_LINFLEX1_TXI_HANDLER not defined"

+#endif

 /**

  * @brief   LINFlex-1 TXI interrupt handler.

  *

@@ -296,6 +311,9 @@ CH_IRQ_HANDLER(SPC5_LINFLEX1_TXI_HANDLER) {
   CH_IRQ_EPILOGUE();

 }

 

+#if !defined(SPC5_LINFLEX1_ERR_HANDLER)

+#error "SPC5_LINFLEX1_ERR_HANDLER not defined"

+#endif

 /**

  * @brief   LINFlex-1 ERR interrupt handler.

  *