diff options
Diffstat (limited to 'os/hal/include')
-rw-r--r-- | os/hal/include/fsmc/nand.h | 293 | ||||
-rw-r--r-- | os/hal/include/hal_community.h | 27 | ||||
-rw-r--r-- | os/hal/include/hal_fsmc.h | 67 | ||||
-rw-r--r-- | os/hal/include/hal_sdram.h (renamed from os/hal/include/fsmc/sdram.h) | 42 | ||||
-rw-r--r-- | os/hal/include/hal_sram.h (renamed from os/hal/include/fsmc/sram.h) | 51 |
5 files changed, 77 insertions, 403 deletions
diff --git a/os/hal/include/fsmc/nand.h b/os/hal/include/fsmc/nand.h deleted file mode 100644 index b2d9001..0000000 --- a/os/hal/include/fsmc/nand.h +++ /dev/null @@ -1,293 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file hal_nand_lld.h - * @brief NAND Driver subsystem low level driver header. - * - * @addtogroup NAND - * @{ - */ - -#ifndef NAND_H_ -#define NAND_H_ - -#include "bitmap.h" - -#if (HAL_USE_FSMC_NAND == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ -#define NAND_MIN_PAGE_SIZE 256 -#define NAND_MAX_PAGE_SIZE 8192 - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief FSMC1 interrupt priority level setting. - */ -#if !defined(STM32_EMC_FSMC1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_EMC_FSMC1_IRQ_PRIORITY 10 -#endif - -/** - * @brief NAND driver enable switch. - * @details If set to @p TRUE the support for NAND1 is included. - */ -#if !defined(STM32_FSMC_USE_NAND1) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_NAND1 FALSE -#endif - -/** - * @brief NAND driver enable switch. - * @details If set to @p TRUE the support for NAND2 is included. - */ -#if !defined(STM32_FSMC_USE_NAND2) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_NAND2 FALSE -#endif - -/** - * @brief NAND DMA error hook. - * @note The default action for DMA errors is a system halt because DMA - * error can only happen because programming errors. - */ -#if !defined(STM32_NAND_DMA_ERROR_HOOK) || defined(__DOXYGEN__) -#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") -#endif - -/** - * @brief NAND interrupt enable switch. - * @details If set to @p TRUE the support for internal FSMC interrupt included. - */ -#if !defined(STM32_NAND_USE_INT) || defined(__DOXYGEN__) -#define STM32_NAND_USE_INT FALSE -#endif - -/** -* @brief NAND1 DMA priority (0..3|lowest..highest). -*/ -#if !defined(STM32_NAND_NAND1_DMA_PRIORITY) || defined(__DOXYGEN__) -#define STM32_NAND_NAND1_DMA_PRIORITY 0 -#endif - -/** -* @brief NAND2 DMA priority (0..3|lowest..highest). -*/ -#if !defined(STM32_NAND_NAND2_DMA_PRIORITY) || defined(__DOXYGEN__) -#define STM32_NAND_NAND2_DMA_PRIORITY 0 -#endif - -/** - * @brief DMA stream used for NAND operations. - * @note This option is only available on platforms with enhanced DMA. - */ -#if !defined(STM32_NAND_DMA_STREAM) || defined(__DOXYGEN__) -#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) -#endif - -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if !STM32_FSMC_USE_NAND1 && !STM32_FSMC_USE_NAND2 -#error "NAND driver activated but no NAND peripheral assigned" -#endif - -#if (STM32_FSMC_USE_NAND1 || STM32_FSMC_USE_NAND2) && !STM32_HAS_FSMC -#error "FSMC not present in the selected device" -#endif - -#if !defined(STM32_DMA_REQUIRED) -#define STM32_DMA_REQUIRED -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a structure representing an NAND driver. - */ -typedef struct NANDDriver NANDDriver; - -/** - * @brief Type of interrupt handler function. - */ -typedef void (*nandisrhandler_t)(NANDDriver *nandp); - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Number of erase blocks in NAND device. - */ - uint32_t blocks; - /** - * @brief Number of data bytes in page. - */ - uint32_t page_data_size; - /** - * @brief Number of spare bytes in page. - */ - uint32_t page_spare_size; - /** - * @brief Number of pages in block. - */ - uint32_t pages_per_block; - /** - * @brief Number of write cycles for row addressing. - */ - uint8_t rowcycles; - /** - * @brief Number of write cycles for column addressing. - */ - uint8_t colcycles; - - /* End of the mandatory fields.*/ - /** - * @brief Number of wait cycles. This value will be used both for - * PMEM and PATTR registers - * - * @note For proper calculation procedure please look at AN2784 document - * from STMicroelectronics. - */ - uint32_t pmem; -} NANDConfig; - -/** - * @brief Structure representing an NAND driver. - */ -struct NANDDriver { - /** - * @brief Driver state. - */ - nandstate_t state; - /** - * @brief Current configuration data. - */ - const NANDConfig *config; - /** - * @brief Array to store bad block map. - */ -#if NAND_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) -#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the bus. - */ - mutex_t mutex; -#elif CH_CFG_USE_SEMAPHORES - semaphore_t semaphore; -#endif -#endif /* NAND_USE_MUTUAL_EXCLUSION */ - /* End of the mandatory fields.*/ - /** - * @brief Function enabling interrupts from FSMC. - */ - nandisrhandler_t isr_handler; - /** - * @brief Pointer to current transaction buffer. - */ - void *rxdata; - /** - * @brief Current transaction length in bytes. - */ - size_t datalen; - /** - * @brief DMA mode bit mask. - */ - uint32_t dmamode; - /** - * @brief DMA channel. - */ - const stm32_dma_stream_t *dma; - /** - * @brief Thread waiting for I/O completion. - */ - thread_t *thread; - /** - * @brief Pointer to the FSMC NAND registers block. - */ - FSMC_NAND_TypeDef *nand; - /** - * @brief Memory mapping for data. - */ - uint16_t *map_data; - /** - * @brief Memory mapping for commands. - */ - uint16_t *map_cmd; - /** - * @brief Memory mapping for addresses. - */ - uint16_t *map_addr; - /** - * @brief Pointer to bad block map. - * @details One bit per block. All memory allocation is user's responsibility. - */ - bitmap_t *bb_map; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if STM32_FSMC_USE_NAND1 && !defined(__DOXYGEN__) -extern NANDDriver NANDD1; -#endif - -#if STM32_FSMC_USE_NAND2 && !defined(__DOXYGEN__) -extern NANDDriver NANDD2; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void nand_lld_init(void); - void nand_lld_start(NANDDriver *nandp); - void nand_lld_stop(NANDDriver *nandp); - uint8_t nand_lld_erase(NANDDriver *nandp, uint8_t *addr, size_t addrlen); - void nand_lld_read_data(NANDDriver *nandp, uint16_t *data, - size_t datalen, uint8_t *addr, size_t addrlen, uint32_t *ecc); - void nand_lld_write_addr(NANDDriver *nandp, const uint8_t *addr, size_t len); - void nand_lld_write_cmd(NANDDriver *nandp, uint8_t cmd); - uint8_t nand_lld_write_data(NANDDriver *nandp, const uint16_t *data, - size_t datalen, uint8_t *addr, size_t addrlen, uint32_t *ecc); - uint8_t nand_lld_read_status(NANDDriver *nandp); - void nand_lld_reset(NANDDriver *nandp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_FSMC_NAND */ - -#endif /* NAND_H_ */ - -/** @} */ diff --git a/os/hal/include/hal_community.h b/os/hal/include/hal_community.h index ad5c472..889da4f 100644 --- a/os/hal/include/hal_community.h +++ b/os/hal/include/hal_community.h @@ -27,6 +27,10 @@ /* Error checks on the configuration header file.*/
+#if !defined(HAL_USE_COMP)
+#define HAL_USE_COMP FALSE
+#endif
+
#if !defined(HAL_USE_CRC)
#define HAL_USE_CRC FALSE
#endif
@@ -39,6 +43,10 @@ #define HAL_USE_EICU FALSE
#endif
+#if !defined(HAL_USE_FSMC)
+#define HAL_USE_FSMC FALSE
+#endif
+
#if !defined(HAL_USE_NAND)
#define HAL_USE_NAND FALSE
#endif
@@ -47,6 +55,10 @@ #define HAL_USE_ONEWIRE FALSE
#endif
+#if !defined(HAL_USE_OPAMP)
+#define HAL_USE_OPAMP FALSE
+#endif
+
#if !defined(HAL_USE_QEI)
#define HAL_USE_QEI FALSE
#endif
@@ -71,15 +83,11 @@ #define HAL_USE_USB_MSD FALSE
#endif
-#if !defined(HAL_USE_COMP)
-#define HAL_USE_COMP FALSE
-#endif
-
-#if !defined(HAL_USE_OPAMP)
-#define HAL_USE_OPAMP FALSE
+#if !defined(HAL_USE_SDRAM)
+#define HAL_USE_FSMC FALSE
#endif
-#if !defined(HAL_USE_FSMC)
+#if !defined(HAL_USE_SRAM)
#define HAL_USE_FSMC FALSE
#endif
@@ -96,6 +104,7 @@ #include "hal_qei.h"
#include "hal_comp.h"
#include "hal_opamp.h"
+#include "hal_fsmc.h"
/* Complex drivers.*/
#include "hal_onewire.h"
@@ -103,7 +112,9 @@ #include "hal_eeprom.h"
#include "hal_usb_hid.h"
#include "hal_usb_msd.h"
-#include "hal_fsmc.h"
+#include "hal_nand.h"
+#include "hal_sram.h"
+#include "hal_sdram.h"
/*===========================================================================*/
/* Driver constants. */
diff --git a/os/hal/include/hal_fsmc.h b/os/hal/include/hal_fsmc.h index 834fa8d..3b27941 100644 --- a/os/hal/include/hal_fsmc.h +++ b/os/hal/include/hal_fsmc.h @@ -27,7 +27,7 @@ #include "hal.h" -#if (HAL_USE_FSMC_SDRAM == TRUE) || (HAL_USE_FSMC_SRAM == TRUE) || (HAL_USE_FSMC_NAND == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_FSMC == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -161,7 +161,7 @@ typedef struct { __IO uint32_t BTR; /**< SRAM/NOR chip-select timing registers */ uint32_t RESERVED[63]; /**< Reserved */ __IO uint32_t BWTR; /**< SRAM/NOR write timing registers */ -} FSMC_SRAM_NOR_TypeDef; +} FSMC_SRAM_TypeDef; #if (defined(STM32F427xx) || defined(STM32F437xx) || \ defined(STM32F429xx) || defined(STM32F439xx) || \ @@ -264,31 +264,6 @@ typedef struct { #define STM32_FSMC_USE_FSMC1 FALSE #endif -/** - * @brief SDRAM driver enable switch. - * @details If set to @p TRUE the support for SDRAM is included. - */ -#if !defined(HAL_USE_FSMC_SDRAM) || defined(__DOXYGEN__) -#define HAL_USE_FSMC_SDRAM FALSE -#endif - -/** - * @brief SRAM driver enable switch. - * @details If set to @p TRUE the support for SRAM is included. - */ -#if !defined(HAL_USE_FSMC_SRAM) || defined(__DOXYGEN__) -#define HAL_USE_FSMC_SRAM FALSE -#endif - -/** - * @brief NAND driver enable switch. - * @details If set to @p TRUE the support for NAND is included. - */ -#if !defined(HAL_USE_FSMC_NAND) || defined(__DOXYGEN__) -#define HAL_USE_FSMC_NAND FALSE -#endif - - /** @} */ /*===========================================================================*/ @@ -326,26 +301,26 @@ struct FSMCDriver { fsmcstate_t state; /* End of the mandatory fields.*/ -#if HAL_USE_FSMC_SRAM - #if STM32_FSMC_USE_SRAM1 - FSMC_SRAM_NOR_TypeDef *sram1; +#if HAL_USE_SRAM + #if STM32_SRAM_USE_SRAM1 + FSMC_SRAM_TypeDef *sram1; #endif - #if STM32_FSMC_USE_SRAM2 - FSMC_SRAM_NOR_TypeDef *sram2; + #if STM32_SRAM_USE_SRAM2 + FSMC_SRAM_TypeDef *sram2; #endif - #if STM32_FSMC_USE_SRAM3 - FSMC_SRAM_NOR_TypeDef *sram3; + #if STM32_SRAM_USE_SRAM3 + FSMC_SRAM_TypeDef *sram3; #endif - #if STM32_FSMC_USE_SRAM4 - FSMC_SRAM_NOR_TypeDef *sram4; + #if STM32_SRAM_USE_SRAM4 + FSMC_SRAM_TypeDef *sram4; #endif #endif -#if HAL_USE_FSMC_NAND - #if STM32_FSMC_USE_NAND1 +#if HAL_USE_NAND + #if STM32_NAND_USE_NAND1 FSMC_NAND_TypeDef *nand1; #endif - #if STM32_FSMC_USE_NAND1 + #if STM32_NAND_USE_NAND1 FSMC_NAND_TypeDef *nand2; #endif #endif @@ -353,7 +328,7 @@ struct FSMCDriver { #if (defined(STM32F427xx) || defined(STM32F437xx) || \ defined(STM32F429xx) || defined(STM32F439xx) || \ defined(STM32F7)) - #if HAL_USE_FSMC_SDRAM + #if HAL_USE_SDRAM FSMC_SDRAM_TypeDef *sdram; #endif #endif @@ -381,18 +356,6 @@ extern "C" { } #endif -#if HAL_USE_FSMC_SDRAM == TRUE -#include "fsmc/sdram.h" -#endif - -#if HAL_USE_FSMC_SRAM == TRUE -#include "fsmc/sram.h" -#endif - -#if HAL_USE_FSMC_NAND == TRUE -#include "fsmc/nand.h" -#endif - #endif /* HAL_USE_FSMC */ #endif /* HAL_FSMC_H_ */ diff --git a/os/hal/include/fsmc/sdram.h b/os/hal/include/hal_sdram.h index 7a04bdc..297b715 100644 --- a/os/hal/include/fsmc/sdram.h +++ b/os/hal/include/hal_sdram.h @@ -25,17 +25,10 @@ * @{ */ -#ifndef SDRAM_H_ -#define SDRAM_H_ +#ifndef HAL_SDRAM_H_ +#define HAL_SDRAM_H_ -#if (defined(STM32F427xx) || defined(STM32F437xx) || \ - defined(STM32F429xx) || defined(STM32F439xx) || \ - defined(STM32F745xx) || defined(STM32F746xx) || \ - defined(STM32F756xx) || defined(STM32F767xx) || \ - defined(STM32F769xx) || defined(STM32F777xx) || \ - defined(STM32F779xx)) - -#if (HAL_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_SDRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -132,20 +125,20 @@ * @brief SDRAM driver enable switch. * @details If set to @p TRUE the support for SDRAM1 is included. */ -#if !defined(STM32_FSMC_USE_SDRAM1) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SDRAM1 FALSE +#if !defined(STM32_SDRAM_USE_SDRAM1) || defined(__DOXYGEN__) +#define STM32_SDRAM_USE_SDRAM1 FALSE #else -#define STM32_SDRAM1_MAP_BASE FSMC_Bank5_MAP_BASE +#define STM32_SDRAM1_MAP_BASE FSMC_Bank5_MAP_BASE #endif /** * @brief SDRAM driver enable switch. * @details If set to @p TRUE the support for SDRAM2 is included. */ -#if !defined(STM32_FSMC_USE_SDRAM2) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SDRAM2 FALSE +#if !defined(STM32_SDRAM_USE_SDRAM2) || defined(__DOXYGEN__) +#define STM32_SDRAM_USE_SDRAM2 FALSE #else -#define STM32_SDRAM2_MAP_BASE FSMC_Bank6_MAP_BASE +#define STM32_SDRAM2_MAP_BASE FSMC_Bank6_MAP_BASE #endif /** @} */ @@ -154,11 +147,11 @@ /* Derived constants and error checks. */ /*===========================================================================*/ -#if !STM32_FSMC_USE_SDRAM1 && !STM32_FSMC_USE_SDRAM2 +#if !STM32_SDRAM_USE_SDRAM1 && !STM32_SDRAM_USE_SDRAM2 #error "SDRAM driver activated but no SDRAM peripheral assigned" #endif -#if (STM32_FSMC_USE_SDRAM1 || STM32_FSMC_USE_SDRAM2) && !STM32_HAS_FSMC +#if (STM32_SDRAM_USE_SDRAM1 || STM32_SDRAM_USE_SDRAM2) && !STM32_HAS_FSMC #error "FMC not present in the selected device" #endif @@ -231,21 +224,20 @@ struct SDRAMDriver { /* External declarations. */ /*===========================================================================*/ -extern SDRAMDriver SDRAMD; +extern SDRAMDriver SDRAMD1; #ifdef __cplusplus extern "C" { #endif - void fsmcSdramInit(void); - void fsmcSdramStart(SDRAMDriver *sdramp, const SDRAMConfig *cfgp); - void fsmcSdramStop(SDRAMDriver *sdramp); + void sdramInit(void); + void sdramObjectInit(SDRAMDriver *sdramp); + void sdramStart(SDRAMDriver *sdramp, const SDRAMConfig *cfgp); + void sdramStop(SDRAMDriver *sdramp); #ifdef __cplusplus } #endif -#endif /* HAL_USE_FSMC_SDRAM */ - -#endif /* STM32F427xx / STM32F429xx / STM32F437xx / STM32F439xx */ +#endif /* HAL_USE_SDRAM */ #endif /* SDRAM_H_ */ diff --git a/os/hal/include/fsmc/sram.h b/os/hal/include/hal_sram.h index 4a19246..bcf362a 100644 --- a/os/hal/include/fsmc/sram.h +++ b/os/hal/include/hal_sram.h @@ -22,10 +22,10 @@ * @{ */ -#ifndef SRAM_H_ -#define SRAM_H_ +#ifndef HAL_SRAM_H_ +#define HAL_SRAM_H_ -#if (HAL_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_SRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -43,32 +43,32 @@ * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM1 is included. */ -#if !defined(STM32_FSMC_USE_SRAM1) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SRAM1 FALSE +#if !defined(STM32_SRAM_USE_SRAM1) || defined(__DOXYGEN__) +#define STM32_SRAM_USE_SRAM1 FALSE #endif /** * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM2 is included. */ -#if !defined(STM32_FSMC_USE_SRAM2) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SRAM2 FALSE +#if !defined(STM32_SRAM_USE_SRAM2) || defined(__DOXYGEN__) +#define STM32_SRAM_USE_SRAM2 FALSE #endif /** * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM3 is included. */ -#if !defined(STM32_FSMC_USE_SRAM3) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SRAM3 FALSE +#if !defined(STM32_SRAM_USE_SRAM3) || defined(__DOXYGEN__) +#define STM32_SRAM_USE_SRAM3 FALSE #endif /** * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM4 is included. */ -#if !defined(STM32_FSMC_USE_SRAM4) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SRAM4 FALSE +#if !defined(STM32_SRAM_USE_SRAM4) || defined(__DOXYGEN__) +#define STM32_SRAM_USE_SRAM4 FALSE #endif /** @} */ @@ -77,13 +77,13 @@ /* Derived constants and error checks. */ /*===========================================================================*/ -#if !STM32_FSMC_USE_SRAM1 && !STM32_FSMC_USE_SRAM2 && \ - !STM32_FSMC_USE_SRAM3 && !STM32_FSMC_USE_SRAM4 +#if !STM32_SRAM_USE_SRAM1 && !STM32_SRAM_USE_SRAM2 && \ + !STM32_SRAM_USE_SRAM3 && !STM32_SRAM_USE_SRAM4 #error "SRAM driver activated but no SRAM peripheral assigned" #endif -#if (STM32_FSMC_USE_SRAM1 || STM32_FSMC_USE_SRAM2 || \ - STM32_FSMC_USE_SRAM3 || STM32_FSMC_USE_SRAM4) && !STM32_HAS_FSMC +#if (STM32_SRAM_USE_SRAM1 || STM32_SRAM_USE_SRAM2 || \ + STM32_SRAM_USE_SRAM3 || STM32_SRAM_USE_SRAM4) && !STM32_HAS_FSMC #error "FSMC not present in the selected device" #endif @@ -126,7 +126,7 @@ struct SRAMDriver { /** * @brief Pointer to the FSMC SRAM registers block. */ - FSMC_SRAM_NOR_TypeDef *sram; + FSMC_SRAM_TypeDef *sram; }; /*===========================================================================*/ @@ -137,34 +137,35 @@ struct SRAMDriver { /* External declarations. */ /*===========================================================================*/ -#if STM32_FSMC_USE_SRAM1 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM1 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD1; #endif -#if STM32_FSMC_USE_SRAM2 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM2 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD2; #endif -#if STM32_FSMC_USE_SRAM3 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM3 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD3; #endif -#if STM32_FSMC_USE_SRAM4 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM4 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD4; #endif #ifdef __cplusplus extern "C" { #endif - void fsmcSramInit(void); - void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp); - void fsmcSramStop(SRAMDriver *sramp); + void sramInit(void); + void sramObjectInit(SRAMDriver *sdramp); + void sramStart(SRAMDriver *sramp, const SRAMConfig *cfgp); + void sramStop(SRAMDriver *sramp); #ifdef __cplusplus } #endif -#endif /* HAL_USE_FSMC_SRAM */ +#endif /* HAL_USE_SRAM */ -#endif /* SRAM_H_ */ +#endif /* HAL_SRAM_H_ */ /** @} */ |