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| author | Stephen Caudle <stephen@caudle.info> | 2015-07-23 23:39:05 -0400 |
|---|---|---|
| committer | Stephen Caudle <stephen@caudle.info> | 2015-07-25 22:16:19 -0400 |
| commit | f91f5a5c5718a6e9c35417662243cf593b07f91f (patch) | |
| tree | 2328a591d7151ef9f70493fa17ba4e080d0ab83b /os/hal/ports/NRF51/NRF51822/pal_lld.c | |
| parent | e82536b815693d0d5a5580d6162119312ebc0810 (diff) | |
| download | ChibiOS-Contrib-f91f5a5c5718a6e9c35417662243cf593b07f91f.tar.gz ChibiOS-Contrib-f91f5a5c5718a6e9c35417662243cf593b07f91f.tar.bz2 ChibiOS-Contrib-f91f5a5c5718a6e9c35417662243cf593b07f91f.zip | |
Cleanup nRF51 PAL driver
Diffstat (limited to 'os/hal/ports/NRF51/NRF51822/pal_lld.c')
| -rw-r--r-- | os/hal/ports/NRF51/NRF51822/pal_lld.c | 73 |
1 files changed, 54 insertions, 19 deletions
diff --git a/os/hal/ports/NRF51/NRF51822/pal_lld.c b/os/hal/ports/NRF51/NRF51822/pal_lld.c index ccbe20e..5716498 100644 --- a/os/hal/ports/NRF51/NRF51822/pal_lld.c +++ b/os/hal/ports/NRF51/NRF51822/pal_lld.c @@ -43,36 +43,72 @@ /* Driver local functions. */
/*===========================================================================*/
-void _pal_lld_setpadmode(uint8_t pad, iomode_t mode)
+void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
{
- uint8_t value = 0;
-
- osalDbgAssert(pad < 32, "invalid pad");
+ (void)port;
+ osalDbgAssert(pad <= 31, "pal_lld_setpadmode() - invalid pad");
switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_UNCONNECTED:
- value = 2;
+ NRF_GPIO->DIRSET = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT:
case PAL_MODE_INPUT_ANALOG:
- value = 0;
+ NRF_GPIO->DIRCLR = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLUP:
- value = 0xC;
+ NRF_GPIO->DIRCLR = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLDOWN:
- value = 4;
+ NRF_GPIO->DIRCLR = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_PUSHPULL:
- value = 1;
+ NRF_GPIO->DIRSET = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_OPENDRAIN:
- value = 0x61;
+ NRF_GPIO->DIRSET = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ break;
+ default:
+ osalDbgAssert(FALSE, "invalid pal mode");
break;
}
-
- NRF_GPIO->PIN_CNF[pad] = value;
}
/*===========================================================================*/
@@ -84,10 +120,9 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode) /*===========================================================================*/
/**
- * @brief STM32 I/O ports configuration.
- * @details Ports A-D(E, F, G, H) clocks enabled.
+ * @brief NRF51 I/O ports configuration.
*
- * @param[in] config the STM32 ports configuration
+ * @param[in] config the NRF51 ports configuration
*
* @notapi
*/
@@ -117,10 +152,10 @@ void _pal_lld_setgroupmode(ioportid_t port, {
uint8_t i;
- (void)mask;
-
- for (i = 0; i < TOTAL_GPIO_PADS; i++) {
- pal_lld_setpadmode(port, i, mode);
+ for (i = 0; i < TOTAL_GPIO_PADS; i++, mask >>= 1) {
+ if (mask & 1) {
+ pal_lld_setpadmode(port, i, mode);
+ }
}
}
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