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authorAndrew Wygle <awygle@gmail.com>2016-05-22 12:41:42 -0700
committerAndrew Wygle <awygle@gmail.com>2016-06-05 13:51:10 -0700
commit456702ee87b1adbbb559778aafe98c349700178a (patch)
treed68bd2207a0cb7ccb2af0db58e7f33c2df168e3b
parent5d20ce4595a564c1f98a31445f5015de41e1e25f (diff)
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Cleaned up MSP430X port to match recent changes to ChibiOS mainline.
Also fixed a couple of bugs identified as part of the refresh.
-rw-r--r--os/common/ports/MSP430X/chcore.h9
-rw-r--r--os/hal/ports/MSP430X/hal_dma_lld.c4
-rw-r--r--os/hal/ports/MSP430X/hal_serial_lld.c1
-rw-r--r--os/hal/ports/MSP430X/hal_spi_lld.c10
-rw-r--r--os/hal/ports/MSP430X/hal_spi_lld.h2
-rw-r--r--testhal/MSP430X/EXP430FR5969/SPI/main.c40
6 files changed, 46 insertions, 20 deletions
diff --git a/os/common/ports/MSP430X/chcore.h b/os/common/ports/MSP430X/chcore.h
index 09f87c4..3683c1d 100644
--- a/os/common/ports/MSP430X/chcore.h
+++ b/os/common/ports/MSP430X/chcore.h
@@ -232,14 +232,19 @@ struct port_context {
* @details This macro must be inserted at the end of all IRQ handlers
* enabled to invoke system APIs.
*/
-#define PORT_IRQ_EPILOGUE() chSchRescheduleS()
+#define PORT_IRQ_EPILOGUE() { \
+ _dbg_check_lock(); \
+ if (chSchIsPreemptionRequired()) \
+ chSchDoReschedule(); \
+ _dbg_check_unlock(); \
+}
/**
* @brief IRQ handler function declaration.
* @note @p id can be a function name or a vector number depending on the
* port implementation.
*/
-#define PORT_IRQ_HANDLER(id) __attribute__ ((interrupt(id))) \
+#define PORT_IRQ_HANDLER(id) __attribute__ ((interrupt(id))) \
void ISR_ ## id (void)
/**
diff --git a/os/hal/ports/MSP430X/hal_dma_lld.c b/os/hal/ports/MSP430X/hal_dma_lld.c
index 43e1d6c..2e17afa 100644
--- a/os/hal/ports/MSP430X/hal_dma_lld.c
+++ b/os/hal/ports/MSP430X/hal_dma_lld.c
@@ -89,7 +89,9 @@ PORT_IRQ_HANDLER(DMA_VECTOR) {
if (index < MSP430X_DMA_CHANNELS) {
#if CH_CFG_USE_SEMAPHORES
+ chSysLockFromISR();
chSemSignalI(&dma_lock);
+ chSysUnlockFromISR();
#endif
msp430x_dma_cb_t * cb = &callbacks[index];
@@ -129,7 +131,7 @@ void dmaInit(void) {
bool dmaRequest(msp430x_dma_req_t * request, systime_t timeout) {
/* Check if a DMA channel is available */
#if CH_CFG_USE_SEMAPHORES
- msg_t semresult = chSemWaitTimeout(&dma_lock, timeout);
+ msg_t semresult = chSemWaitTimeoutS(&dma_lock, timeout);
if (semresult != MSG_OK)
return true;
#endif
diff --git a/os/hal/ports/MSP430X/hal_serial_lld.c b/os/hal/ports/MSP430X/hal_serial_lld.c
index 0d9aa1c..8f22650 100644
--- a/os/hal/ports/MSP430X/hal_serial_lld.c
+++ b/os/hal/ports/MSP430X/hal_serial_lld.c
@@ -374,6 +374,7 @@ PORT_IRQ_HANDLER(USCI_A0_VECTOR) {
if (oqIsEmptyI(&SD0.oqueue))
chnAddFlagsI(&SD0, CHN_TRANSMISSION_END);
UCA0IE &= ~UCTXCPTIE;
+ osalSysUnlockFromISR();
break;
default: /* other interrupts */
diff --git a/os/hal/ports/MSP430X/hal_spi_lld.c b/os/hal/ports/MSP430X/hal_spi_lld.c
index 70a357e..3768487 100644
--- a/os/hal/ports/MSP430X/hal_spi_lld.c
+++ b/os/hal/ports/MSP430X/hal_spi_lld.c
@@ -388,10 +388,11 @@ void spi_lld_start(SPIDriver * spip) {
spip->regs->ctlw0 = UCSWRST;
spip->regs->brw = brw;
spip->regs->ctlw0 =
- (spip->config->spi_mode << 14) | (spip->config->bit_order << 13) |
+ ((spip->config->spi_mode ^ 0x02) << 14) | (spip->config->bit_order << 13) |
(spip->config->data_size << 12) | (UCMST) |
((spip->config->ss_line ? 0 : 2) << 9) | (UCSYNC) | (ssel) | (UCSTEM);
*(spip->ifg) = 0;
+ spi_lld_unselect(spip);
}
/**
@@ -561,15 +562,12 @@ void spi_lld_receive(SPIDriver * spip, size_t n, void * rxbuf) {
* @param[in] frame the data frame to send over the SPI bus
* @return The received data frame from the SPI bus.
*/
-uint16_t spi_lld_polled_exchange(SPIDriver * spip, uint16_t frame) {
+uint8_t spi_lld_polled_exchange(SPIDriver * spip, uint8_t frame) {
- osalDbgAssert(!(frame & 0xFF00U), "16-bit transfers not supported");
-
- while (!(*(spip->ifg) & UCTXIFG))
- ;
spip->regs->txbuf = frame;
while (!(*(spip->ifg) & UCRXIFG))
;
+ *(spip->ifg) &= ~(UCRXIFG | UCTXIFG);
return spip->regs->rxbuf;
}
diff --git a/os/hal/ports/MSP430X/hal_spi_lld.h b/os/hal/ports/MSP430X/hal_spi_lld.h
index ebf14c8..0ca4c67 100644
--- a/os/hal/ports/MSP430X/hal_spi_lld.h
+++ b/os/hal/ports/MSP430X/hal_spi_lld.h
@@ -630,7 +630,7 @@ extern "C" {
const void *txbuf, void *rxbuf);
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
- uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
+ uint8_t spi_lld_polled_exchange(SPIDriver *spip, uint8_t frame);
#ifdef __cplusplus
}
#endif
diff --git a/testhal/MSP430X/EXP430FR5969/SPI/main.c b/testhal/MSP430X/EXP430FR5969/SPI/main.c
index 17f5c86..8d28198 100644
--- a/testhal/MSP430X/EXP430FR5969/SPI/main.c
+++ b/testhal/MSP430X/EXP430FR5969/SPI/main.c
@@ -34,11 +34,12 @@ const char * test_5_msg = "TEST 5: spiIgnore\r\n";
const char * test_6_msg = "TEST 6: spiExchange\r\n";
const char * test_7_msg = "TEST 7: spiSend\r\n";
const char * test_8_msg = "TEST 8: spiReceive\r\n";
-const char * test_9_msg = "TEST 9: spiStartExchange with exclusive DMA\r\n";
-const char * test_10_msg =
- "TEST 10: spiStartExchange with exclusive DMA for TX\r\n";
+const char * test_9_msg = "TEST 9: spiPolledExchange\r\n";
+const char * test_10_msg = "TEST 10: spiStartExchange with exclusive DMA\r\n";
const char * test_11_msg =
- "TEST 11: spiStartExchange with exclusive DMA for RX\r\n";
+ "TEST 11: spiStartExchange with exclusive DMA for TX\r\n";
+const char * test_12_msg =
+ "TEST 12: spiStartExchange with exclusive DMA for RX\r\n";
const char * succeed_string = "SUCCESS\r\n\r\n";
const char * fail_string = "FAILURE\r\n\r\n";
@@ -270,6 +271,25 @@ THD_FUNCTION(Thread1, arg) {
else {
chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
}
+
+ /* Test 9 - spiPolledExchange */
+ chnWrite(&SD0, (const uint8_t *)test_9_msg, strlen(test_9_msg));
+ strcpy(outstring, "After SPI test \r\n");
+ strcpy(instring, "Before SPI test \r\n");
+ if (strcmp("Before SPI test \r\n", instring) ||
+ strcmp("After SPI test \r\n", outstring)) {
+ chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+ }
+ spiSelect(&SPIDB0);
+ outstring[0] = spiPolledExchange(&SPIDB0, instring[0]);
+ spiUnselect(&SPIDB0);
+ if (strcmp("Bfter SPI test \r\n", outstring) ||
+ strcmp("Before SPI test \r\n", instring)) {
+ chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string));
+ }
+ else {
+ chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string));
+ }
/* Reconfigure SPIDA1 to use exclusive DMA for both */
spiStop(&SPIDA1);
@@ -278,8 +298,8 @@ THD_FUNCTION(Thread1, arg) {
SPIDA1_config.spi_mode = 1; /* because why not get coverage */
spiStart(&SPIDA1, &SPIDA1_config);
- /* Test 9 - spiStartExchange with exclusive DMA */
- chnWrite(&SD0, (const uint8_t *)test_9_msg, strlen(test_9_msg));
+ /* Test 10 - spiStartExchange with exclusive DMA */
+ chnWrite(&SD0, (const uint8_t *)test_10_msg, strlen(test_10_msg));
strcpy(outstring, "After SPI test \r\n");
strcpy(instring, "Before SPI test \r\n");
cb_arg = 1;
@@ -307,8 +327,8 @@ THD_FUNCTION(Thread1, arg) {
SPIDA1_config.spi_mode = 2; /* because why not get coverage */
spiStart(&SPIDA1, &SPIDA1_config);
- /* Test 10 - spiStartExchange with exclusive DMA for TX */
- chnWrite(&SD0, (const uint8_t *)test_10_msg, strlen(test_10_msg));
+ /* Test 11 - spiStartExchange with exclusive DMA for TX */
+ chnWrite(&SD0, (const uint8_t *)test_11_msg, strlen(test_11_msg));
strcpy(outstring, "After SPI test \r\n");
strcpy(instring, "Before SPI test \r\n");
cb_arg = 1;
@@ -336,8 +356,8 @@ THD_FUNCTION(Thread1, arg) {
SPIDA1_config.spi_mode = 3; /* because why not get coverage */
spiStart(&SPIDA1, &SPIDA1_config);
- /* Test 11 - spiStartExchange with exclusive DMA for RX */
- chnWrite(&SD0, (const uint8_t *)test_11_msg, strlen(test_11_msg));
+ /* Test 12 - spiStartExchange with exclusive DMA for RX */
+ chnWrite(&SD0, (const uint8_t *)test_12_msg, strlen(test_12_msg));
strcpy(outstring, "After SPI test \r\n");
strcpy(instring, "Before SPI test \r\n");
cb_arg = 1;