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-rw-r--r--sdram.vhd4
1 files changed, 2 insertions, 2 deletions
diff --git a/sdram.vhd b/sdram.vhd
index 829eb7d..9acff22 100644
--- a/sdram.vhd
+++ b/sdram.vhd
@@ -26,7 +26,7 @@ end entity;
architecture rtl of sdram is
-component pll50125 IS
+component pllx2 IS
PORT
(
areset : IN STD_LOGIC := '0';
@@ -101,7 +101,7 @@ signal global_reset_n : std_logic;
begin
- pll: pll50125 port map (
+ pll: pllx2 port map (
pll_reset,
clock_50,
clock_100,