aboutsummaryrefslogtreecommitdiffstats
path: root/roms/u-boot/board/eltec/mhpc
diff options
context:
space:
mode:
Diffstat (limited to 'roms/u-boot/board/eltec/mhpc')
-rw-r--r--roms/u-boot/board/eltec/mhpc/Makefile8
-rw-r--r--roms/u-boot/board/eltec/mhpc/flash.c414
-rw-r--r--roms/u-boot/board/eltec/mhpc/mhpc.c464
-rw-r--r--roms/u-boot/board/eltec/mhpc/u-boot.lds82
-rw-r--r--roms/u-boot/board/eltec/mhpc/u-boot.lds.debug121
5 files changed, 1089 insertions, 0 deletions
diff --git a/roms/u-boot/board/eltec/mhpc/Makefile b/roms/u-boot/board/eltec/mhpc/Makefile
new file mode 100644
index 00000000..f3fcc2f3
--- /dev/null
+++ b/roms/u-boot/board/eltec/mhpc/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = mhpc.o flash.o
diff --git a/roms/u-boot/board/eltec/mhpc/flash.c b/roms/u-boot/board/eltec/mhpc/flash.c
new file mode 100644
index 00000000..ad89df92
--- /dev/null
+++ b/roms/u-boot/board/eltec/mhpc/flash.c
@@ -0,0 +1,414 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <mpc8xx.h>
+#include <linux/byteorder/swab.h>
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * Protection Flags:
+ */
+#define FLAG_PROTECT_SET 0x01
+#define FLAG_PROTECT_CLEAR 0x02
+
+/* Board support for 1 or 2 flash devices */
+#undef FLASH_PORT_WIDTH32
+#define FLASH_PORT_WIDTH16
+
+#ifdef FLASH_PORT_WIDTH16
+#define FLASH_PORT_WIDTH ushort
+#define FLASH_PORT_WIDTHV vu_short
+#define SWAP(x) __swab16(x)
+#else
+#define FLASH_PORT_WIDTH ulong
+#define FLASH_PORT_WIDTHV vu_long
+#define SWAP(x) __swab32(x)
+#endif
+
+#define FPW FLASH_PORT_WIDTH
+#define FPWV FLASH_PORT_WIDTHV
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (FPW *addr, flash_info_t *info);
+static int write_data (flash_info_t *info, ulong dest, FPW data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
+ volatile memctl8xx_t *memctl = &immap->im_memctl;
+ unsigned long size_b0;
+ int i;
+
+ /* Init: no FLASHes known */
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
+ flash_info[i].flash_id = FLASH_UNKNOWN;
+ }
+
+ /* Static FLASH Bank configuration here - FIXME XXX */
+ size_b0 = flash_get_size((FPW *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+ if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+ printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+ size_b0, size_b0<<20);
+ }
+
+ /* Remap FLASH according to real size */
+ memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
+ memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
+
+ /* Re-do sizing to get full correct info */
+ size_b0 = flash_get_size((FPW *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
+
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
+
+ /* monitor protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ CONFIG_SYS_FLASH_BASE,
+ CONFIG_SYS_FLASH_BASE+monitor_flash_len-1,
+ &flash_info[0]);
+
+ flash_info[0].size = size_b0;
+
+ return (size_b0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+ for (i = 0; i < info->sector_count; i++) {
+ info->start[i] = base + (i * 0x00020000);
+ }
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t *info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_INTEL: printf ("INTEL "); break;
+ default: printf ("Unknown Vendor "); break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_28F640J5 :
+ printf ("28F640J5 \n"); break;
+ default: printf ("Unknown Chip Type=0x%lXh\n",
+ info->flash_id & FLASH_TYPEMASK); break;
+ }
+
+ printf (" Size: %ld MB in %d Sectors\n",
+ info->size >> 20, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i=0; i<info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s",
+ info->start[i],
+ info->protect[i] ? " (RO)" : " "
+ );
+ }
+ printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong flash_get_size (FPW *addr, flash_info_t *info)
+{
+ FPW value;
+
+ /* Write auto select command: read Manufacturer ID */
+ addr[0x5555] = (FPW)0xAA00AA00;
+ addr[0x2AAA] = (FPW)0x55005500;
+ addr[0x5555] = (FPW)0x90009000;
+
+ value = SWAP(addr[0]);
+
+ switch (value) {
+ case (FPW)INTEL_MANUFACT:
+ info->flash_id = FLASH_MAN_INTEL;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ addr[0] = (FPW)0xFF00FF00; /* restore read mode */
+ return (0); /* no or unknown flash */
+ }
+
+ value = SWAP(addr[1]); /* device ID no swap !*/
+
+ switch (value) {
+ case (FPW)INTEL_ID_28F640J5 :
+ info->flash_id += FLASH_28F640J5 ;
+ info->sector_count = 64;
+ info->size = 0x00800000;
+ break; /* => 8 MB */
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ break;
+ }
+
+ if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
+ printf ("** ERROR: sector count %d > max (%d) **\n",
+ info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
+ info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+ }
+
+ addr[0] = (FPW)0xFF00FF00; /* restore read mode */
+
+ return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+ int flag, prot, sect;
+ ulong type, start, now, last;
+ int rc = 0;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ type = (info->flash_id & FLASH_VENDMASK);
+ if ((type != FLASH_MAN_INTEL)) {
+ printf ("Can't erase unknown flash type %08lx - aborted\n",
+ info->flash_id);
+ return 1;
+ }
+
+ prot = 0;
+ for (sect=s_first; sect<=s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+ start = get_timer (0);
+ last = start;
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect<=s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ FPWV *addr = (FPWV *)(info->start[sect]);
+ FPW status;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ *addr = (FPW)0x50005000; /* clear status register */
+ *addr = (FPW)0x20002000; /* erase setup */
+ *addr = (FPW)0xD000D000; /* erase confirm */
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay (1000);
+
+ while (((status = SWAP(*addr)) & (FPW)0x00800080) != (FPW)0x00800080) {
+ if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+ *addr = (FPW)0xB000B000; /* suspend erase */
+ *addr = (FPW)0xFF00FF00; /* reset to read mode */
+ rc = 1;
+ break;
+ }
+
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ putc ('.');
+ last = now;
+ }
+ }
+
+ *addr = (FPW)0xFF00FF00; /* reset to read mode */
+ printf (" done\n");
+ }
+ }
+ return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+ ulong cp, wp;
+ FPW data;
+ int i, l, rc, port_width;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return 4;
+ }
+/* get lower word aligned address */
+#ifdef FLASH_PORT_WIDTH16
+ wp = (addr & ~1);
+ port_width = 2;
+#else
+ wp = (addr & ~3);
+ port_width = 4;
+#endif
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i=0, cp=wp; i<l; ++i, ++cp)
+ data = (data << 8) | (*(uchar *)cp);
+
+ for (; i<port_width && cnt>0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+ for (; cnt==0 && i<port_width; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *)cp);
+ }
+
+ if ((rc = write_data(info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += port_width;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ while (cnt >= port_width) {
+ data = 0;
+ for (i=0; i<port_width; ++i) {
+ data = (data << 8) | *src++;
+ }
+ if ((rc = write_data(info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += port_width;
+ cnt -= port_width;
+ if ((wp & 0xfff) == 0)
+ {
+ printf("%08lX",wp);
+ printf("\x1b[8D");
+ }
+ }
+
+ if (cnt == 0) {
+ return (0);
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
+ data = (data << 8) | *src++;
+ --cnt;
+ }
+ for (; i<port_width; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *)cp);
+ }
+
+ return (write_data(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, ulong dest, FPW data)
+{
+ FPWV *addr = (FPWV *)dest;
+ ulong status;
+ ulong start;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*addr & data) != data) {
+ printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
+ return (2);
+ }
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ *addr = (FPW)0x40004000; /* write setup */
+ *addr = data;
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ start = get_timer (0);
+
+ while (((status = SWAP(*addr)) & (FPW)0x00800080) != (FPW)0x00800080) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+ *addr = (FPW)0xFF00FF00; /* restore read mode */
+ return (1);
+ }
+ }
+
+ *addr = (FPW)0xFF00FF00; /* restore read mode */
+
+ return (0);
+}
diff --git a/roms/u-boot/board/eltec/mhpc/mhpc.c b/roms/u-boot/board/eltec/mhpc/mhpc.c
new file mode 100644
index 00000000..f3f564ff
--- /dev/null
+++ b/roms/u-boot/board/eltec/mhpc/mhpc.c
@@ -0,0 +1,464 @@
+/*
+ * (C) Copyright 2001
+ * ELTEC Elektronik AG
+ * Frank Gottschling <fgottschling@eltec.de>
+ *
+ * Board specific routines for the miniHiPerCam
+ *
+ * - initialisation (eeprom)
+ * - memory controller
+ * - serial io initialisation
+ * - ethernet io initialisation
+ *
+ * -----------------------------------------------------------------
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <linux/ctype.h>
+#include <commproc.h>
+#include "mpc8xx.h"
+#include <video_fb.h>
+
+extern void eeprom_init (void);
+extern int eeprom_read (unsigned dev_addr, unsigned offset,
+ unsigned char *buffer, unsigned cnt);
+extern int eeprom_write (unsigned dev_addr, unsigned offset,
+ unsigned char *buffer, unsigned cnt);
+
+/* globals */
+void *video_hw_init (void);
+void video_set_lut (unsigned int index, /* color number */
+ unsigned char r, /* red */
+ unsigned char g, /* green */
+ unsigned char b /* blue */
+ );
+
+GraphicDevice gdev;
+
+/* locals */
+static void video_circle (char *center, int radius, int color, int pitch);
+static void video_test_image (void);
+static void video_default_lut (unsigned int clut_type);
+
+/* revision info foer MHPC EEPROM offset 480 */
+typedef struct {
+ char board[12]; /* 000 - Board Revision information */
+ char sensor; /* 012 - Sensor Type information */
+ char serial[8]; /* 013 - Board serial number */
+ char etheraddr[6]; /* 021 - Ethernet node addresse */
+ char revision[2]; /* 027 - Revision code */
+ char option[3]; /* 029 - resevered for options */
+} revinfo;
+
+/* ------------------------------------------------------------------------- */
+
+static const unsigned int sdram_table[] = {
+ /* read single beat cycle */
+ 0xef0efc04, 0x0e2dac04, 0x01ba5c04, 0x1ff5fc00,
+ 0xfffffc05, 0xeffafc34, 0x0ff0bc34, 0x1ff57c35,
+
+ /* read burst cycle */
+ 0xef0efc04, 0x0e3dac04, 0x10ff5c04, 0xf0fffc00,
+ 0xf0fffc00, 0xf1fffc00, 0xfffffc00, 0xfffffc05,
+ 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+ 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+
+ /* write single beat cycle */
+ 0xef0efc04, 0x0e29ac00, 0x01b25c04, 0x1ff5fc05,
+ 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+
+ /* write burst cycle */
+ 0xef0ef804, 0x0e39a000, 0x10f75000, 0xf0fff440,
+ 0xf0fffc40, 0xf1fffc04, 0xfffffc05, 0xfffffc04,
+ 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+ 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+
+ /* periodic timer expired */
+ 0xeffebc84, 0x1ffd7c04, 0xfffffc04, 0xfffffc84,
+ 0xeffebc04, 0x1ffd7c04, 0xfffffc04, 0xfffffc05,
+ 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
+
+ /* exception */
+ 0xfffffc04, 0xfffffc05, 0xfffffc04, 0xfffffc04
+};
+
+/* ------------------------------------------------------------------------- */
+
+int board_early_init_f (void)
+{
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+ volatile cpm8xx_t *cp = &(im->im_cpm);
+ volatile iop8xx_t *ip = (iop8xx_t *) & (im->im_ioport);
+
+ /* reset the port A s.a. cpm-routines */
+ ip->iop_padat = 0x0000;
+ ip->iop_papar = 0x0000;
+ ip->iop_padir = 0x0800;
+ ip->iop_paodr = 0x0000;
+
+ /* reset the port B for digital and LCD output */
+ cp->cp_pbdat = 0x0300;
+ cp->cp_pbpar = 0x5001;
+ cp->cp_pbdir = 0x5301;
+ cp->cp_pbodr = 0x0000;
+
+ /* reset the port C configured for SMC1 serial port and aqc. control */
+ ip->iop_pcdat = 0x0800;
+ ip->iop_pcpar = 0x0000;
+ ip->iop_pcdir = 0x0e30;
+ ip->iop_pcso = 0x0000;
+
+ /* Config port D for LCD output */
+ ip->iop_pdpar = 0x1fff;
+ ip->iop_pddir = 0x1fff;
+
+ return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check Board Identity
+ */
+int checkboard (void)
+{
+ puts ("Board: ELTEC miniHiperCam\n");
+ return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_r (void)
+{
+ revinfo mhpcRevInfo;
+ char nid[32];
+ char *mhpcSensorTypes[] = { "OMNIVISON OV7610/7620 color",
+ "OMNIVISON OV7110 b&w", NULL
+ };
+ char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
+ 0, 0, 0, 0, 10, 11, 12, 13, 14, 15
+ };
+ int i;
+
+ /* check revision data */
+ eeprom_read (CONFIG_SYS_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo, 32);
+
+ if (strncmp ((char *) &mhpcRevInfo.board[2], "MHPC", 4) != 0) {
+ printf ("Enter revision number (0-9): %c ",
+ mhpcRevInfo.revision[0]);
+ if (0 != readline (NULL)) {
+ mhpcRevInfo.revision[0] =
+ (char) toupper (console_buffer[0]);
+ }
+
+ printf ("Enter revision character (A-Z): %c ",
+ mhpcRevInfo.revision[1]);
+ if (1 == readline (NULL)) {
+ mhpcRevInfo.revision[1] =
+ (char) toupper (console_buffer[0]);
+ }
+
+ printf ("Enter board name (V-XXXX-XXXX): %s ",
+ (char *) &mhpcRevInfo.board);
+ if (11 == readline (NULL)) {
+ for (i = 0; i < 11; i++) {
+ mhpcRevInfo.board[i] =
+ (char) toupper (console_buffer[i]);
+ mhpcRevInfo.board[11] = '\0';
+ }
+ }
+
+ printf ("Supported sensor types:\n");
+ i = 0;
+ do {
+ printf ("\n \'%d\' : %s\n", i, mhpcSensorTypes[i]);
+ } while (mhpcSensorTypes[++i] != NULL);
+
+ do {
+ printf ("\nEnter sensor number (0-255): %d ",
+ (int) mhpcRevInfo.sensor);
+ if (0 != readline (NULL)) {
+ mhpcRevInfo.sensor =
+ (unsigned char)
+ simple_strtoul (console_buffer, NULL,
+ 10);
+ }
+ } while (mhpcRevInfo.sensor >= i);
+
+ printf ("Enter serial number: %s ",
+ (char *) &mhpcRevInfo.serial);
+ if (6 == readline (NULL)) {
+ for (i = 0; i < 6; i++) {
+ mhpcRevInfo.serial[i] = console_buffer[i];
+ }
+ mhpcRevInfo.serial[6] = '\0';
+ }
+
+ printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]);
+ if (12 == readline (NULL)) {
+ for (i = 0; i < 12; i += 2) {
+ mhpcRevInfo.etheraddr[i >> 1] =
+ (char) (16 *
+ hex[toupper
+ (console_buffer[i]) -
+ '0'] +
+ hex[toupper
+ (console_buffer[i + 1]) -
+ '0']);
+ }
+ }
+
+ /* setup new revision data */
+ eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo,
+ 32);
+ }
+
+ /* set environment */
+ sprintf (nid, "%02x:%02x:%02x:%02x:%02x:%02x",
+ mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1],
+ mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3],
+ mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]);
+ setenv ("ethaddr", nid);
+
+ /* print actual board identification */
+ printf ("Ident: %s %s Ser %s Rev %c%c\n",
+ mhpcRevInfo.board,
+ (mhpcRevInfo.sensor == 0 ? "color" : "b&w"),
+ (char *) &mhpcRevInfo.serial, mhpcRevInfo.revision[0],
+ mhpcRevInfo.revision[1]);
+
+ return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+phys_size_t initdram (int board_type)
+{
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+ volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+ upmconfig (UPMA, (uint *) sdram_table,
+ sizeof (sdram_table) / sizeof (uint));
+
+ memctl->memc_mamr = CONFIG_SYS_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
+ memctl->memc_mbmr = MBMR_GPL_B4DIS; /* should this be mamr? - NTL */
+ memctl->memc_mptpr = MPTPR_PTP_DIV64;
+ memctl->memc_mar = 0x00008800;
+
+ /*
+ * Map controller SDRAM bank 0
+ */
+ memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
+ memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
+ udelay (200);
+
+ /*
+ * Map controller SDRAM bank 1
+ */
+ memctl->memc_or2 = CONFIG_SYS_OR2;
+ memctl->memc_br2 = CONFIG_SYS_BR2;
+
+ /*
+ * Perform SDRAM initializsation sequence
+ */
+ memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
+ udelay (1);
+ memctl->memc_mcr = 0x80002730; /* SDRAM bank 0 - execute twice */
+ udelay (1);
+ memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
+
+ udelay (10000);
+
+ /* leave place for framebuffers */
+ return (SDRAM_MAX_SIZE - SDRAM_RES_SIZE);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void video_circle (char *center, int radius, int color, int pitch)
+{
+ int x, y, d, dE, dSE;
+
+ x = 0;
+ y = radius;
+ d = 1 - radius;
+ dE = 3;
+ dSE = -2 * radius + 5;
+
+ *(center + x + y * pitch) = color;
+ *(center + y + x * pitch) = color;
+ *(center + y - x * pitch) = color;
+ *(center + x - y * pitch) = color;
+ *(center - x - y * pitch) = color;
+ *(center - y - x * pitch) = color;
+ *(center - y + x * pitch) = color;
+ *(center - x + y * pitch) = color;
+ while (y > x) {
+ if (d < 0) {
+ d += dE;
+ dE += 2;
+ dSE += 2;
+ x++;
+ } else {
+ d += dSE;
+ dE += 2;
+ dSE += 4;
+ x++;
+ y--;
+ }
+ *(center + x + y * pitch) = color;
+ *(center + y + x * pitch) = color;
+ *(center + y - x * pitch) = color;
+ *(center + x - y * pitch) = color;
+ *(center - x - y * pitch) = color;
+ *(center - y - x * pitch) = color;
+ *(center - y + x * pitch) = color;
+ *(center - x + y * pitch) = color;
+ }
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void video_test_image (void)
+{
+ char *di;
+ int i, n;
+
+ /* draw raster */
+ for (i = 0; i < LCD_VIDEO_ROWS; i += 32) {
+ memset ((char *) (LCD_VIDEO_ADDR + i * LCD_VIDEO_COLS),
+ LCD_VIDEO_FG, LCD_VIDEO_COLS);
+ for (n = i + 1; n < i + 32; n++)
+ memset ((char *) (LCD_VIDEO_ADDR +
+ n * LCD_VIDEO_COLS), LCD_VIDEO_BG,
+ LCD_VIDEO_COLS);
+ }
+
+ for (i = 0; i < LCD_VIDEO_COLS; i += 32) {
+ for (n = 0; n < LCD_VIDEO_ROWS; n++)
+ *(char *) (LCD_VIDEO_ADDR + n * LCD_VIDEO_COLS + i) =
+ LCD_VIDEO_FG;
+ }
+
+ /* draw gray bar */
+ di = (char *) (LCD_VIDEO_ADDR + (LCD_VIDEO_COLS - 256) / 64 * 32 +
+ 97 * LCD_VIDEO_COLS);
+ for (n = 0; n < 63; n++) {
+ for (i = 0; i < 256; i++) {
+ *di++ = (char) i;
+ *(di + LCD_VIDEO_COLS * 64) = (i & 1) * 255;
+ }
+ di += LCD_VIDEO_COLS - 256;
+ }
+
+ video_circle ((char *) LCD_VIDEO_ADDR + LCD_VIDEO_COLS / 2 +
+ LCD_VIDEO_ROWS / 2 * LCD_VIDEO_COLS, LCD_VIDEO_ROWS / 2,
+ LCD_VIDEO_FG, LCD_VIDEO_COLS);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void video_default_lut (unsigned int clut_type)
+{
+ unsigned int i;
+ unsigned char RGB[] = {
+ 0x00, 0x00, 0x00, /* black */
+ 0x80, 0x80, 0x80, /* gray */
+ 0xff, 0x00, 0x00, /* red */
+ 0x00, 0xff, 0x00, /* green */
+ 0x00, 0x00, 0xff, /* blue */
+ 0x00, 0xff, 0xff, /* cyan */
+ 0xff, 0x00, 0xff, /* magenta */
+ 0xff, 0xff, 0x00, /* yellow */
+ 0x80, 0x00, 0x00, /* dark red */
+ 0x00, 0x80, 0x00, /* dark green */
+ 0x00, 0x00, 0x80, /* dark blue */
+ 0x00, 0x80, 0x80, /* dark cyan */
+ 0x80, 0x00, 0x80, /* dark magenta */
+ 0x80, 0x80, 0x00, /* dark yellow */
+ 0xc0, 0xc0, 0xc0, /* light gray */
+ 0xff, 0xff, 0xff, /* white */
+ };
+
+ switch (clut_type) {
+ case 1:
+ for (i = 0; i < 240; i++)
+ video_set_lut (i, i, i, i);
+ for (i = 0; i < 16; i++)
+ video_set_lut (i + 240, RGB[i * 3], RGB[i * 3 + 1],
+ RGB[i * 3 + 2]);
+ break;
+ default:
+ for (i = 0; i < 256; i++)
+ video_set_lut (i, i, i, i);
+ }
+}
+
+/* ------------------------------------------------------------------------- */
+
+void *video_hw_init (void)
+{
+ unsigned int clut = 0;
+ unsigned char *penv;
+ immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
+
+ /* enable video only on CLUT value */
+ if ((penv = (uchar *)getenv ("clut")) != NULL)
+ clut = (u_int) simple_strtoul ((char *)penv, NULL, 10);
+ else
+ return NULL;
+
+ /* disable graphic before write LCD regs. */
+ immr->im_lcd.lcd_lccr = 0x96000866;
+
+ /* config LCD regs. */
+ immr->im_lcd.lcd_lcfaa = LCD_VIDEO_ADDR;
+ immr->im_lcd.lcd_lchcr = 0x010a0093;
+ immr->im_lcd.lcd_lcvcr = 0x900f0024;
+
+ printf ("Video: 640x480 8Bit Index Lut %s\n",
+ (clut == 1 ? "240/16 (gray/vga)" : "256(gray)"));
+
+ video_default_lut (clut);
+
+ /* clear framebuffer */
+ memset ((char *) (LCD_VIDEO_ADDR), LCD_VIDEO_BG,
+ LCD_VIDEO_ROWS * LCD_VIDEO_COLS);
+
+ /* enable graphic */
+ immr->im_lcd.lcd_lccr = 0x96000867;
+
+ /* fill in Graphic Device */
+ gdev.frameAdrs = LCD_VIDEO_ADDR;
+ gdev.winSizeX = LCD_VIDEO_COLS;
+ gdev.winSizeY = LCD_VIDEO_ROWS;
+ gdev.gdfBytesPP = 1;
+ gdev.gdfIndex = GDF__8BIT_INDEX;
+
+ if (clut > 1)
+ /* return Graphic Device for console */
+ return (void *) &gdev;
+ else
+ /* just graphic enabled - draw something beautiful */
+ video_test_image ();
+
+ return NULL; /* this disabels cfb - console */
+}
+
+/* ------------------------------------------------------------------------- */
+
+void video_set_lut (unsigned int index,
+ unsigned char r, unsigned char g, unsigned char b)
+{
+ unsigned int lum;
+ unsigned short *pLut = (unsigned short *) (CONFIG_SYS_IMMR + 0x0e00);
+
+ /* 16 bit lut values, 12 bit used, xxxx BBGG RRii iiii */
+ /* y = 0.299*R + 0.587*G + 0.114*B */
+ lum = (2990 * r + 5870 * g + 1140 * b) / 10000;
+ pLut[index] =
+ ((b & 0xc0) << 4) | ((g & 0xc0) << 2) | (r & 0xc0) | (lum &
+ 0x3f);
+}
+
+/* ------------------------------------------------------------------------- */
diff --git a/roms/u-boot/board/eltec/mhpc/u-boot.lds b/roms/u-boot/board/eltec/mhpc/u-boot.lds
new file mode 100644
index 00000000..7ae91ffb
--- /dev/null
+++ b/roms/u-boot/board/eltec/mhpc/u-boot.lds
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2001-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+OUTPUT_ARCH(powerpc)
+
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .text :
+ {
+ arch/powerpc/cpu/mpc8xx/start.o (.text*)
+ arch/powerpc/cpu/mpc8xx/traps.o (.text*)
+
+ *(.text*)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ _GOT2_TABLE_ = .;
+ KEEP(*(.got2))
+ KEEP(*(.got))
+ PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
+ _FIXUP_TABLE_ = .;
+ KEEP(*(.fixup))
+ }
+ __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data*)
+ *(.sdata*)
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ }
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss (NOLOAD) :
+ {
+ *(.bss*)
+ *(.sbss*)
+ *(COMMON)
+ . = ALIGN(4);
+ }
+ __bss_end = . ;
+ PROVIDE (end = .);
+}
diff --git a/roms/u-boot/board/eltec/mhpc/u-boot.lds.debug b/roms/u-boot/board/eltec/mhpc/u-boot.lds.debug
new file mode 100644
index 00000000..b0091db0
--- /dev/null
+++ b/roms/u-boot/board/eltec/mhpc/u-boot.lds.debug
@@ -0,0 +1,121 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+OUTPUT_ARCH(powerpc)
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ arch/powerpc/cpu/mpc8xx/start.o (.text)
+ common/dlmalloc.o (.text)
+ lib/vsprintf.o (.text)
+ lib/crc32.o (.text)
+
+ . = env_offset;
+ common/env_embedded.o(.text)
+
+ *(.text)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ }
+
+
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ __bss_end = . ;
+ PROVIDE (end = .);
+}
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-04 08:51:54 +0000