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-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/Makefile15
-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/cache.c96
-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/config.mk14
-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/cpu.c68
-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/interrupts.c26
-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/start.S65
-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/u-boot.lds83
-rw-r--r--roms/u-boot/arch/sh/cpu/sh3/watchdog.c27
8 files changed, 394 insertions, 0 deletions
diff --git a/roms/u-boot/arch/sh/cpu/sh3/Makefile b/roms/u-boot/arch/sh/cpu/sh3/Makefile
new file mode 100644
index 00000000..1dccaf95
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/Makefile
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2007
+# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+#
+# (C) Copyright 2007
+# Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+extra-y = start.o
+obj-y = cpu.o interrupts.o watchdog.o cache.o
diff --git a/roms/u-boot/arch/sh/cpu/sh3/cache.c b/roms/u-boot/arch/sh/cpu/sh3/cache.c
new file mode 100644
index 00000000..34cbbff8
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/cache.c
@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * (C) Copyright 2007
+ * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+
+/*
+ * Jump to P2 area.
+ * When handling TLB or caches, we need to do it from P2 area.
+ */
+#define jump_to_P2() \
+ do { \
+ unsigned long __dummy; \
+ __asm__ __volatile__( \
+ "mov.l 1f, %0\n\t" \
+ "or %1, %0\n\t" \
+ "jmp @%0\n\t" \
+ " nop\n\t" \
+ ".balign 4\n" \
+ "1: .long 2f\n" \
+ "2:" \
+ : "=&r" (__dummy) \
+ : "r" (0x20000000)); \
+ } while (0)
+
+/*
+ * Back to P1 area.
+ */
+#define back_to_P1() \
+ do { \
+ unsigned long __dummy; \
+ __asm__ __volatile__( \
+ "nop;nop;nop;nop;nop;nop;nop\n\t" \
+ "mov.l 1f, %0\n\t" \
+ "jmp @%0\n\t" \
+ " nop\n\t" \
+ ".balign 4\n" \
+ "1: .long 2f\n" \
+ "2:" \
+ : "=&r" (__dummy)); \
+ } while (0)
+
+#define CACHE_VALID 1
+#define CACHE_UPDATED 2
+
+static inline void cache_wback_all(void)
+{
+ unsigned long addr, data, i, j;
+
+ jump_to_P2();
+ for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
+ for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
+ addr = CACHE_OC_ADDRESS_ARRAY
+ | (j << CACHE_OC_WAY_SHIFT)
+ | (i << CACHE_OC_ENTRY_SHIFT);
+ data = inl(addr);
+ if (data & CACHE_UPDATED) {
+ data &= ~CACHE_UPDATED;
+ outl(data, addr);
+ }
+ }
+ }
+ back_to_P1();
+}
+
+
+#define CACHE_ENABLE 0
+#define CACHE_DISABLE 1
+
+int cache_control(unsigned int cmd)
+{
+ unsigned long ccr;
+
+ jump_to_P2();
+ ccr = inl(CCR);
+
+ if (ccr & CCR_CACHE_ENABLE)
+ cache_wback_all();
+
+ if (cmd == CACHE_DISABLE)
+ outl(CCR_CACHE_STOP, CCR);
+ else
+ outl(CCR_CACHE_INIT, CCR);
+ back_to_P1();
+
+ return 0;
+}
diff --git a/roms/u-boot/arch/sh/cpu/sh3/config.mk b/roms/u-boot/arch/sh/cpu/sh3/config.mk
new file mode 100644
index 00000000..24b5c478
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/config.mk
@@ -0,0 +1,14 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2007
+# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+#
+# (C) Copyright 2007
+# Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+#
+PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3
diff --git a/roms/u-boot/arch/sh/cpu/sh3/cpu.c b/roms/u-boot/arch/sh/cpu/sh3/cpu.c
new file mode 100644
index 00000000..ea0006a6
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/cpu.c
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * (C) Copyright 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/processor.h>
+
+int checkcpu(void)
+{
+ puts("CPU: SH3\n");
+ return 0;
+}
+
+int cpu_init(void)
+{
+ return 0;
+}
+
+int cleanup_before_linux(void)
+{
+ disable_interrupts();
+ return 0;
+}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ disable_interrupts();
+ reset_cpu(0);
+ return 0;
+}
+
+void flush_cache(unsigned long addr, unsigned long size)
+{
+
+}
+
+void icache_enable(void)
+{
+}
+
+void icache_disable(void)
+{
+}
+
+int icache_status(void)
+{
+ return 0;
+}
+
+void dcache_enable(void)
+{
+}
+
+void dcache_disable(void)
+{
+}
+
+int dcache_status(void)
+{
+ return 0;
+}
diff --git a/roms/u-boot/arch/sh/cpu/sh3/interrupts.c b/roms/u-boot/arch/sh/cpu/sh3/interrupts.c
new file mode 100644
index 00000000..80a13e06
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/interrupts.c
@@ -0,0 +1,26 @@
+/*
+ * (C) Copyright 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * (C) Copyright 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+int interrupt_init(void)
+{
+ return 0;
+}
+
+void enable_interrupts(void)
+{
+
+}
+
+int disable_interrupts(void)
+{
+ return 0;
+}
diff --git a/roms/u-boot/arch/sh/cpu/sh3/start.S b/roms/u-boot/arch/sh/cpu/sh3/start.S
new file mode 100644
index 00000000..c26a0b6a
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/start.S
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * (C) Copyright 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm-offsets.h>
+#include <config.h>
+#include <version.h>
+
+ .text
+ .align 2
+
+ .global _start
+_sh_start:
+ mov.l ._lowlevel_init, r0
+100: bsrf r0
+ nop
+
+ bsr 1f
+ nop
+1: sts pr, r5
+ mov.l ._reloc_dst, r4
+ add #(_sh_start-1b), r5
+ mov.l ._reloc_dst_end, r6
+
+2: mov.l @r5+, r1
+ mov.l r1, @r4
+ add #4, r4
+ cmp/hs r6, r4
+ bf 2b
+
+ mov.l ._bss_start, r4
+ mov.l ._bss_end, r5
+ mov #0, r1
+
+3: mov.l r1, @r4 /* bss clear */
+ add #4, r4
+ cmp/hs r5, r4
+ bf 3b
+
+ mov.l ._gd_init, r13 /* global data */
+ mov.l ._stack_init, r15 /* stack */
+
+ mov.l ._sh_generic_init, r0
+ jsr @r0
+ nop
+
+loop:
+ bra loop
+
+ .align 2
+
+._lowlevel_init: .long (lowlevel_init - (100b + 4))
+._reloc_dst: .long reloc_dst
+._reloc_dst_end: .long reloc_dst_end
+._bss_start: .long bss_start
+._bss_end: .long bss_end
+._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE)
+._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
+._sh_generic_init: .long sh_generic_init
diff --git a/roms/u-boot/arch/sh/cpu/sh3/u-boot.lds b/roms/u-boot/arch/sh/cpu/sh3/u-boot.lds
new file mode 100644
index 00000000..26de0860
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/u-boot.lds
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * Copyright (C) 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * Copyright (C) 2008
+ * Mark Jonas <mark.jonas@de.bosch.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * entry and reloct_dst will be provided via ldflags
+ */
+ . = .;
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ KEEP(arch/sh/cpu/sh3/start.o (.text))
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ }
+
+ PROVIDE (reloc_dst_end = .);
+ /* _reloc_dst_end = .; */
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (__bss_end = .);
+}
diff --git a/roms/u-boot/arch/sh/cpu/sh3/watchdog.c b/roms/u-boot/arch/sh/cpu/sh3/watchdog.c
new file mode 100644
index 00000000..45640ffc
--- /dev/null
+++ b/roms/u-boot/arch/sh/cpu/sh3/watchdog.c
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2010
+ * Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ *
+ * (C) Copyright 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/system.h>
+
+int watchdog_init(void)
+{
+ return 0;
+}
+
+void reset_cpu(unsigned long ignored)
+{
+ /* Address error with SR.BL=1 first. */
+ trigger_address_error();
+
+ while (1)
+ ;
+}
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-07 17:53:51 +0000