Initial import of qemu-2.4.1HEADmaster

3 files changed, 90 insertions, 0 deletions

diff --git a/roms/u-boot/board/h2200/Makefile b/roms/u-boot/board/h2200/Makefile
new file mode 100644
index 00000000..e516e916
--- /dev/null
+++ b/roms/u-boot/board/h2200/Makefile
@@ -0,0 +1,14 @@
+#
+# h2200 Support
+#
+# Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= h2200.o
+
+extra-y := h2200-header.bin
+
+$(obj)/h2200-header.bin: $(obj)/h2200-header.o
+	$(OBJCOPY) -O binary $< $@
diff --git a/roms/u-boot/board/h2200/h2200-header.S b/roms/u-boot/board/h2200/h2200-header.S
new file mode 100644
index 00000000..ac2e6b4b
--- /dev/null
+++ b/roms/u-boot/board/h2200/h2200-header.S
@@ -0,0 +1,15 @@
+/*
+ * iPAQ h2200 header
+ *
+ * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+	.word 0xea0003fe /* b 0x1000 */
+
+	.org 0x40
+	.ascii "ECEC"
+
+	.org 0x1000 - 1
+	.byte 0x0
diff --git a/roms/u-boot/board/h2200/h2200.c b/roms/u-boot/board/h2200/h2200.c
new file mode 100644
index 00000000..66ae4b69
--- /dev/null
+++ b/roms/u-boot/board/h2200/h2200.c
@@ -0,0 +1,61 @@
+/*
+ * iPAQ h2200 board configuration
+ *
+ * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/pxa.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/io.h>
+#include <usb.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_eth_init(bd_t *bis)
+{
+	usb_eth_initialize(bis);
+	return 0;
+}
+
+void reset_cpu(ulong ignore)
+{
+	/* Enable VLIO interface on Hamcop */
+	writeb(0x1, 0x4000);
+
+	/* Reset board (cold reset) */
+	writeb(0xff, 0x4002);
+}
+
+int board_init(void)
+{
+	/* We have RAM, disable cache */
+	dcache_disable();
+	icache_disable();
+
+	gd->bd->bi_arch_number = MACH_TYPE_H2200;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0xa0000100;
+
+	/* Let host see that device is disconnected */
+	udc_disconnect();
+	mdelay(500);
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	/*
+	 * Everything except MSC0 was already set up by
+	 * 1st stage bootloader.
+	 *
+	 * This setting enables access to companion chip.
+	 */
+	clrsetbits_le32(MSC0, 0xffffffff, CONFIG_SYS_MSC0_VAL);
+	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	return 0;
+}