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| author | fishsoupisgood <github@madingley.org> | 2019-04-29 01:17:54 +0100 |
|---|---|---|
| committer | fishsoupisgood <github@madingley.org> | 2019-05-27 03:43:43 +0100 |
| commit | 3f2546b2ef55b661fd8dd69682b38992225e86f6 (patch) | |
| tree | 65ca85f13617aee1dce474596800950f266a456c /roms/u-boot/board/cpu86/cpu86.h | |
| download | qemu-master.tar.gz qemu-master.tar.bz2 qemu-master.zip | |
Diffstat (limited to 'roms/u-boot/board/cpu86/cpu86.h')
| -rw-r--r-- | roms/u-boot/board/cpu86/cpu86.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/roms/u-boot/board/cpu86/cpu86.h b/roms/u-boot/board/cpu86/cpu86.h new file mode 100644 index 00000000..ca0c39f6 --- /dev/null +++ b/roms/u-boot/board/cpu86/cpu86.h @@ -0,0 +1,27 @@ +#ifndef __BOARD_CPU86__ +#define __BOARD_CPU86__ + +#include <config.h> + +#define REG8(x) (*(volatile unsigned char *)(x)) + +/* CPU86 register definitions */ +#define CPU86_VME_EAC REG8(CONFIG_SYS_BCRS_BASE + 0x00) +#define CPU86_VME_SAC REG8(CONFIG_SYS_BCRS_BASE + 0x01) +#define CPU86_VME_MAC REG8(CONFIG_SYS_BCRS_BASE + 0x02) +#define CPU86_BCR REG8(CONFIG_SYS_BCRS_BASE + 0x03) +#define CPU86_BSR REG8(CONFIG_SYS_BCRS_BASE + 0x04) +#define CPU86_WDOG_RPORT REG8(CONFIG_SYS_BCRS_BASE + 0x05) +#define CPU86_MBOX_IRQ REG8(CONFIG_SYS_BCRS_BASE + 0x04) +#define CPU86_REV REG8(CONFIG_SYS_BCRS_BASE + 0x07) +#define CPU86_VME_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x80) +#define CPU86_VME_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x81) +#define CPU86_LOCAL_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x82) +#define CPU86_LOCAL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x83) +#define CPU86_PMCL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x84) + +/* Board Control Register bits */ +#define CPU86_BCR_FWPT 0x01 +#define CPU86_BCR_FWRE 0x02 + +#endif /* __BOARD_CPU86__ */ |