Initial import of qemu-2.4.1HEADmaster

6 files changed, 130 insertions, 0 deletions

diff --git a/roms/u-boot/board/avnet/fx12mm/Makefile b/roms/u-boot/board/avnet/fx12mm/Makefile
new file mode 100644
index 00000000..618b42f8
--- /dev/null
+++ b/roms/u-boot/board/avnet/fx12mm/Makefile
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2008
+# Ricardo Ribalda,Universidad Autonoma de Madrid, ricardo.ribalda@uam.es
+# This work has been supported by: Qtechnology http://qtec.com/
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= fx12mm.o
+
+include $(srctree)/board/xilinx/ppc405-generic/Makefile
diff --git a/roms/u-boot/board/avnet/fx12mm/fx12mm.c b/roms/u-boot/board/avnet/fx12mm/fx12mm.c
new file mode 100644
index 00000000..92e1cfb7
--- /dev/null
+++ b/roms/u-boot/board/avnet/fx12mm/fx12mm.c
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2008
+ *
+ * Author: Xilinx Inc.
+ *
+ * Modified by:
+ *  Georg Schardt <schardt@team-ctech.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/processor.h>
+
+int checkboard(void)
+{
+	char buf[64];
+	int i;
+	int l = getenv_f("serial#", buf, sizeof(buf));
+
+	if (l < 0) {
+		printf("Avnet Virtex4 FX12 with no serial #");
+	} else {
+		printf("Avnet Virtex4 FX12 Minimodul # ");
+		for (i = 0; i < l; ++i) {
+			if (buf[i] == ' ')
+				break;
+			putc(buf[i]);
+		}
+	}
+	putc('\n');
+	return 0;
+}
diff --git a/roms/u-boot/board/avnet/fx12mm/xparameters.h b/roms/u-boot/board/avnet/fx12mm/xparameters.h
new file mode 100644
index 00000000..94f682f8
--- /dev/null
+++ b/roms/u-boot/board/avnet/fx12mm/xparameters.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2008
+ *
+ * Georg Schardt <schardt@team-ctech.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * CAUTION: This file is based on the xparameters.h automatically
+ * generated by libgen. Version: Xilinx EDK 10.1.02 Build EDK_K_SP2.5
+ */
+
+#ifndef __XPARAMETER_H__
+#define __XPARAMETER_H__
+
+/* RS232 */
+#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000
+#define XPAR_UARTNS550_0_BASEADDR 0x83E00000
+
+
+/* INT_C */
+#define XPAR_XPS_INTC_0_DEVICE_ID 0
+#define XPAR_XPS_INTC_0_BASEADDR 0x81800000
+#define XPAR_INTC_MAX_NUM_INTR_INPUTS 2
+
+/* CPU core clock */
+#define XPAR_CORE_CLOCK_FREQ_HZ 300000000
+#define XPAR_PLB_CLOCK_FREQ_HZ  100000000
+
+/* RAM */
+#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
+
+/* FLASH */
+#define XPAR_FLASH_MEM0_BASEADDR 0xFFC00000
+
+#endif
diff --git a/roms/u-boot/board/avnet/v5fx30teval/Makefile b/roms/u-boot/board/avnet/v5fx30teval/Makefile
new file mode 100644
index 00000000..8c41af02
--- /dev/null
+++ b/roms/u-boot/board/avnet/v5fx30teval/Makefile
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2008
+# Ricardo Ribalda,Universidad Autonoma de Madrid, ricardo.ribalda@uam.es
+# This work has been supported by: Qtechnology http://qtec.com/
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= v5fx30teval.o
+
+include $(srctree)/board/xilinx/ppc440-generic/Makefile
diff --git a/roms/u-boot/board/avnet/v5fx30teval/v5fx30teval.c b/roms/u-boot/board/avnet/v5fx30teval/v5fx30teval.c
new file mode 100644
index 00000000..68b0eb95
--- /dev/null
+++ b/roms/u-boot/board/avnet/v5fx30teval/v5fx30teval.c
@@ -0,0 +1,17 @@
+/*
+ * (C) Copyright 2008
+ * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
+ * This work has been supported by: QTechnology  http://qtec.com/
+ * SPDX-License-Identifier:	GPL-2.0+
+*/
+
+#include <config.h>
+#include <common.h>
+#include <asm/processor.h>
+
+
+int checkboard(void)
+{
+	puts("Avnet Virtex 5 FX30 Evaluation Board\n");
+	return 0;
+}
diff --git a/roms/u-boot/board/avnet/v5fx30teval/xparameters.h b/roms/u-boot/board/avnet/v5fx30teval/xparameters.h
new file mode 100644
index 00000000..95b8c285
--- /dev/null
+++ b/roms/u-boot/board/avnet/v5fx30teval/xparameters.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2008
+ * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
+ * This work has been supported by: QTechnology  http://qtec.com/
+ * based on xparameters.h by Xilinx
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+*/
+
+#ifndef XPARAMETER_H
+#define XPARAMETER_H
+
+#define XPAR_DDR2_SDRAM_MEM_BASEADDR	0x00000000
+#define XPAR_INTC_0_BASEADDR		0x81800000
+#define XPAR_UARTLITE_0_BASEADDR	0x84000000
+#define XPAR_FLASH_MEM0_BASEADDR	0xFF000000
+#define XPAR_PLB_CLOCK_FREQ_HZ		100000000
+#define XPAR_CORE_CLOCK_FREQ_HZ		400000000
+#define XPAR_INTC_MAX_NUM_INTR_INPUTS	13
+#define XPAR_UARTLITE_0_BAUDRATE	9600
+
+#endif