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| author | fishsoupisgood <github@madingley.org> | 2019-04-29 01:17:54 +0100 |
|---|---|---|
| committer | fishsoupisgood <github@madingley.org> | 2019-05-27 03:43:43 +0100 |
| commit | 3f2546b2ef55b661fd8dd69682b38992225e86f6 (patch) | |
| tree | 65ca85f13617aee1dce474596800950f266a456c /roms/u-boot/board/amcc/ocotea/README.ocotea | |
| download | qemu-master.tar.gz qemu-master.tar.bz2 qemu-master.zip | |
Diffstat (limited to 'roms/u-boot/board/amcc/ocotea/README.ocotea')
| -rw-r--r-- | roms/u-boot/board/amcc/ocotea/README.ocotea | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/roms/u-boot/board/amcc/ocotea/README.ocotea b/roms/u-boot/board/amcc/ocotea/README.ocotea new file mode 100644 index 00000000..be79b03c --- /dev/null +++ b/roms/u-boot/board/amcc/ocotea/README.ocotea @@ -0,0 +1,73 @@ + AMCC Ocotea Board + + Last Update: March 2, 2004 +======================================================================= + +This file contains some handy info regarding U-Boot and the AMCC +Ocotea 440gx evaluation board. See the README.ppc440 for additional +information. + + +SWITCH SETTINGS & JUMPERS +========================== + +Here's what I've been using successfully. If you feel inclined to +change things ... please read the docs! + +DIPSW U46 U80 +------------------------ +SW 1 off off +SW 2 on off +SW 3 off off +SW 4 off off +SW 5 off off +SW 6 on on +SW 7 on off +SW 8 on off + +J41: strapped +J42: open + +All others are factory default. + + +I2C Information +===================== + +See README.ebony for information. + +PCI +=========================== + +Untested at the time of writing. + +PPC440GX Ethernet EMACs +=========================== + +All EMAC ports have been tested and are known to work +with EPS Group 4. + +Special note about the Cicada CIS8201: + The CIS8201 Gigabit PHY comes up in GMII mode by default. + One must hit an extended register to allow use of RGMII mode. + This has been done in the 440gx_enet.c file with a #ifdef/endif + pair. + +AMCC does not store the EMAC ethernet addresses within their PIBS bootloader. +The addresses contained in the config header file are from my particular +board and you _*should*_ change them to reflect your board either in the +config file and/or in your environment variables. I found the addresses on +labels on the bottom side of the board. + + +BDI2k or JTAG Debugging +=========================== + +For ease of debugging you can swap the small boot flash and external SRAM +by changing U46:3 to on. You can then use the sram as your boot flash by +loading the sram via the jtag debugger. + + +Regards, +--Travis +<tsawyer@sandburst.com> |