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author | fishsoupisgood <github@madingley.org> | 2019-04-29 01:17:54 +0100 |
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committer | fishsoupisgood <github@madingley.org> | 2019-05-27 03:43:43 +0100 |
commit | 3f2546b2ef55b661fd8dd69682b38992225e86f6 (patch) | |
tree | 65ca85f13617aee1dce474596800950f266a456c /roms/u-boot/arch/sh/include/asm/cpu_sh7763.h | |
download | qemu-master.tar.gz qemu-master.tar.bz2 qemu-master.zip |
Diffstat (limited to 'roms/u-boot/arch/sh/include/asm/cpu_sh7763.h')
-rw-r--r-- | roms/u-boot/arch/sh/include/asm/cpu_sh7763.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/roms/u-boot/arch/sh/include/asm/cpu_sh7763.h b/roms/u-boot/arch/sh/include/asm/cpu_sh7763.h new file mode 100644 index 00000000..8ee16194 --- /dev/null +++ b/roms/u-boot/arch/sh/include/asm/cpu_sh7763.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2007,2008 Nobuhiro Iwamatsu + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _ASM_CPU_SH7763_H_ +#define _ASM_CPU_SH7763_H_ + +/* CACHE */ +#define CACHE_OC_NUM_WAYS 1 +#define CCR 0xFF00001C +#define CCR_CACHE_INIT 0x0000090b + +/* SCIF */ +/* SCIF0 */ +#define SCIF0_BASE SCSMR0 +#define SCSMR0 0xFFE00000 + +/* SCIF1 */ +#define SCIF1_BASE SCSMR1 +#define SCSMR1 0xFFE08000 + +/* SCIF2 */ +#define SCIF2_BASE SCSMR2 +#define SCSMR2 0xFFE10000 + +/* Watchdog Timer */ +#define WTCNT WDTST +#define WDTST 0xFFCC0000 + +/* TMU */ +#define TMU_BASE 0xFFD80000 + +#endif /* _ASM_CPU_SH7763_H_ */ |