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| author | fishsoupisgood <github@madingley.org> | 2019-04-29 01:17:54 +0100 |
|---|---|---|
| committer | fishsoupisgood <github@madingley.org> | 2019-05-27 03:43:43 +0100 |
| commit | 3f2546b2ef55b661fd8dd69682b38992225e86f6 (patch) | |
| tree | 65ca85f13617aee1dce474596800950f266a456c /roms/u-boot/arch/sh/include/asm/cpu_sh2.h | |
| download | qemu-master.tar.gz qemu-master.tar.bz2 qemu-master.zip | |
Diffstat (limited to 'roms/u-boot/arch/sh/include/asm/cpu_sh2.h')
| -rw-r--r-- | roms/u-boot/arch/sh/include/asm/cpu_sh2.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/roms/u-boot/arch/sh/include/asm/cpu_sh2.h b/roms/u-boot/arch/sh/include/asm/cpu_sh2.h new file mode 100644 index 00000000..18a0f0ba --- /dev/null +++ b/roms/u-boot/arch/sh/include/asm/cpu_sh2.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * Copyright (C) 2008 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_CPU_SH2_H_ +#define _ASM_CPU_SH2_H_ + +/* cache control */ +#define CCR_CACHE_STOP 0x00000008 +#define CCR_CACHE_ENABLE 0x00000005 +#define CCR_CACHE_ICI 0x00000008 + +#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 +#define CACHE_OC_WAY_SHIFT 13 +#define CACHE_OC_NUM_ENTRIES 256 +#define CACHE_OC_ENTRY_SHIFT 4 + +#if defined(CONFIG_CPU_SH7203) +# include <asm/cpu_sh7203.h> +#elif defined(CONFIG_CPU_SH7264) +# include <asm/cpu_sh7264.h> +#elif defined(CONFIG_CPU_SH7269) +# include <asm/cpu_sh7269.h> +#else +# error "Unknown SH2 variant" +#endif + +#endif /* _ASM_CPU_SH2_H_ */ |