aboutsummaryrefslogtreecommitdiffstats
path: root/roms/u-boot/arch/nds32/include/asm/system.h
diff options
context:
space:
mode:
authorfishsoupisgood <github@madingley.org>2019-04-29 01:17:54 +0100
committerfishsoupisgood <github@madingley.org>2019-05-27 03:43:43 +0100
commit3f2546b2ef55b661fd8dd69682b38992225e86f6 (patch)
tree65ca85f13617aee1dce474596800950f266a456c /roms/u-boot/arch/nds32/include/asm/system.h
downloadqemu-master.tar.gz
qemu-master.tar.bz2
qemu-master.zip
Initial import of qemu-2.4.1HEADmaster
Diffstat (limited to 'roms/u-boot/arch/nds32/include/asm/system.h')
-rw-r--r--roms/u-boot/arch/nds32/include/asm/system.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/roms/u-boot/arch/nds32/include/asm/system.h b/roms/u-boot/arch/nds32/include/asm/system.h
new file mode 100644
index 00000000..007e66bd
--- /dev/null
+++ b/roms/u-boot/arch/nds32/include/asm/system.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_NDS_SYSTEM_H
+#define __ASM_NDS_SYSTEM_H
+
+/*
+ * Interrupt configuring macros.
+ */
+
+extern int irq_flags;
+
+#define local_irq_enable() \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.e\n\t" \
+ : \
+ : "r" (irq_flags) \
+ )
+
+#define local_irq_disable() \
+ do { \
+ int __tmp_dummy; \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.d\n\t" \
+ "dsb\n\t" \
+ : "=r" (__tmp_dummy) \
+ ); \
+ } while (0)
+
+#define local_irq_save(x) \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.d\n\t" \
+ "dsb\n\t" \
+ : "=&r" (x) \
+ )
+
+#define local_save_flags(x) \
+ __asm__ __volatile__ ( \
+ "mfsr %0, $psw\n\t" \
+ "andi %0, %0, 0x1\n\t" \
+ "setgie.e\n\t" \
+ "setgie.d\n\t" \
+ : "=r" (x) \
+ )
+
+#define irqs_enabled_from_flags(x) ((x) != 0x1f)
+
+#define local_irq_restore(x) \
+ do { \
+ if (irqs_enabled_from_flags(x)) \
+ local_irq_enable(); \
+ } while (0)
+
+/*
+ * Force strict CPU ordering.
+ */
+#define nop() asm volatile ("nop;\n\t" : : )
+#define mb() asm volatile ("" : : : "memory")
+#define rmb() asm volatile ("" : : : "memory")
+#define wmb() asm volatile ("" : : : "memory")
+
+#endif /* __ASM_NDS_SYSTEM_H */