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| author | fishsoupisgood <github@madingley.org> | 2019-04-29 01:17:54 +0100 |
|---|---|---|
| committer | fishsoupisgood <github@madingley.org> | 2019-05-27 03:43:43 +0100 |
| commit | 3f2546b2ef55b661fd8dd69682b38992225e86f6 (patch) | |
| tree | 65ca85f13617aee1dce474596800950f266a456c /roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c | |
| download | qemu-master.tar.gz qemu-master.tar.bz2 qemu-master.zip | |
Diffstat (limited to 'roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c')
| -rw-r--r-- | roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c b/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c new file mode 100644 index 00000000..bda5e438 --- /dev/null +++ b/roms/u-boot/arch/m68k/cpu/mcf547x_8x/interrupts.c @@ -0,0 +1,35 @@ +/* + * + * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* CPU specific interrupt routine */ +#include <common.h> +#include <asm/immap.h> +#include <asm/io.h> + +int interrupt_init(void) +{ + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + + /* Make sure all interrupts are disabled */ + setbits_be32(&intp->imrh0, 0xffffffff); + setbits_be32(&intp->imrl0, 0xffffffff); + + enable_interrupts(); + + return 0; +} + +#if defined(CONFIG_SLTTMR) +void dtimer_intr_setup(void) +{ + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + + out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); + clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK); +} +#endif |