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authorfishsoupisgood <github@madingley.org>2019-04-29 01:17:54 +0100
committerfishsoupisgood <github@madingley.org>2019-05-27 03:43:43 +0100
commit3f2546b2ef55b661fd8dd69682b38992225e86f6 (patch)
tree65ca85f13617aee1dce474596800950f266a456c /roms/u-boot/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
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Initial import of qemu-2.4.1HEADmaster
Diffstat (limited to 'roms/u-boot/arch/arm/cpu/armv7/omap-common/lowlevel_init.S')
-rw-r--r--roms/u-boot/arch/arm/cpu/armv7/omap-common/lowlevel_init.S32
1 files changed, 32 insertions, 0 deletions
diff --git a/roms/u-boot/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/roms/u-boot/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
new file mode 100644
index 00000000..86c0e421
--- /dev/null
+++ b/roms/u-boot/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
@@ -0,0 +1,32 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author :
+ * Aneesh V <aneesh@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/arch/omap.h>
+#include <asm/omap_common.h>
+#include <asm/arch/spl.h>
+#include <linux/linkage.h>
+
+ENTRY(save_boot_params)
+ ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS
+ str r0, [r1]
+ bx lr
+ENDPROC(save_boot_params)
+
+ENTRY(set_pl310_ctrl_reg)
+ PUSH {r4-r11, lr} @ save registers - ROM code may pollute
+ @ our registers
+ LDR r12, =0x102 @ Set PL310 control register - value in R0
+ .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5
+ @ call ROM Code API to set control register
+ POP {r4-r11, pc}
+ENDPROC(set_pl310_ctrl_reg)