new boardsnewboards

1 files changed, 47 insertions, 0 deletions

diff --git a/PCB/Main Boards/OSO-SWAT-B1/OSO-SWAT-B1.pretty/FH19C9S05SH10.kicad_mod b/PCB/Main Boards/OSO-SWAT-B1/OSO-SWAT-B1.pretty/FH19C9S05SH10.kicad_mod
new file mode 100644
index 00000000..69606357
--- /dev/null
+++ b/PCB/Main Boards/OSO-SWAT-B1/OSO-SWAT-B1.pretty/FH19C9S05SH10.kicad_mod
@@ -0,0 +1,47 @@
+(footprint "FH19C9S05SH10" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 0)
+  (descr "<b>FH19C-9S-0.5SH(10)-1</b><br>\n")
+  (fp_text reference "REF**" (at 0 -1.425) (layer "F.SilkS")
+    (effects (font (size 1.1684 1.1684) (thickness 0.1016)))
+    (tstamp f001c7f4-3bac-4901-bfec-55e6729b7a2d)
+  )
+  (fp_text value ">VALUE" (at 0 -1.425) (layer "F.Fab")
+    (effects (font (size 1.1684 1.1684) (thickness 0.1016)))
+    (tstamp 561aeca9-49f1-4f98-93e2-6788ec46bd30)
+  )
+  (fp_line (start -2.75 -2.25) (end -3.25 -2.25) (layer "F.SilkS") (width 0.1) (tstamp 1eac27e8-d706-4fd3-9d7e-f44c3bceecb7))
+  (fp_line (start -3.25 0.75) (end 3.25 0.75) (layer "F.SilkS") (width 0.1) (tstamp 2954b329-e121-4506-a75a-9fd0ad6fb160))
+  (fp_line (start -3.25 -2.25) (end -3.25 -0.75) (layer "F.SilkS") (width 0.1) (tstamp 707c871c-221c-430b-8a6b-9066bbe6a8b7))
+  (fp_line (start 3.25 -2.25) (end 3.25 -0.75) (layer "F.SilkS") (width 0.1) (tstamp c93c51a4-9fbb-472e-8b27-c730f1646c88))
+  (fp_line (start 2.75 -2.25) (end 3.25 -2.25) (layer "F.SilkS") (width 0.1) (tstamp f62c7b3a-070f-4127-95d5-3042f710b35c))
+  (fp_arc (start -2.457 -2.572) (mid -2.407 -2.622) (end -2.357 -2.572) (layer "F.SilkS") (width 0.2) (tstamp 99032ce3-83f4-4d78-bc12-cfc846be0db6))
+  (fp_arc (start -2.357 -2.572) (mid -2.407 -2.522) (end -2.457 -2.572) (layer "F.SilkS") (width 0.2) (tstamp cc85bc5e-d12e-4c30-b330-62e6d8cd831e))
+  (fp_arc (start -2.457 -2.572) (mid -2.407 -2.622) (end -2.357 -2.572) (layer "F.SilkS") (width 0.2) (tstamp e306135f-93e3-4c31-83e0-8c60a6608eec))
+  (fp_line (start 3.25 0.75) (end -3.25 0.75) (layer "F.Fab") (width 0.2) (tstamp 4524f199-9890-4fbd-90ec-2bd6babdbf89))
+  (fp_line (start 3.25 -2.25) (end 3.25 0.75) (layer "F.Fab") (width 0.2) (tstamp 855f1cc0-31ef-4190-b476-18e3b5158686))
+  (fp_line (start -3.25 0.75) (end -3.25 -2.25) (layer "F.Fab") (width 0.2) (tstamp a7aeadd1-064c-4dec-839a-d3cb8b0a8559))
+  (fp_line (start -3.25 -2.25) (end 3.25 -2.25) (layer "F.Fab") (width 0.2) (tstamp b29496a7-f051-4b0c-a792-56f5b1d5ae06))
+  (pad "1" smd rect (at -2 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp acda55bd-5be5-40b1-a960-d198db4ec672))
+  (pad "2" smd rect (at -1.5 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 45b21120-703c-4698-9c56-6564d6e1bf81))
+  (pad "3" smd rect (at -1 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 8b754c17-ed29-4271-a8ee-1331ac5995ef))
+  (pad "4" smd rect (at -0.5 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 9ccadf67-4eb3-4873-b5dd-5cc11b45344d))
+  (pad "5" smd rect (at 0 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp bda542d0-ecb7-417f-8c5a-7bba95d4eba5))
+  (pad "6" smd rect (at 0.5 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 8e3054c6-288a-41ce-abc0-f8e853b26354))
+  (pad "7" smd rect (at 1 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 1f1c1390-fe89-4a71-a866-c4e1f01372f9))
+  (pad "8" smd rect (at 1.5 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 83315760-4e59-4aea-8656-92a90fbb73b7))
+  (pad "9" smd rect (at 2 -2.5 90) (size 0.8 0.3) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp f1470e81-8bfa-4c7b-9a4f-907119981553))
+  (pad "MP1" smd rect (at -3 0 90) (size 0.8 0.4) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 5d56d96c-0e59-4d80-b122-61ae0456f87e))
+  (pad "MP2" smd rect (at 3 0 90) (size 0.8 0.4) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.0635) (tstamp 65badac9-bbc1-4323-b96e-20b366a5c013))
+)