1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
|
/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc";
model = "Planex MZK-750DHP";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
wps {
label = "mzk-750dhp:green:wps";
gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
};
led_power: power {
label = "mzk-750dhp:green:power";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "mzk-750dhp:green:wlan5g";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
s1 {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
s2 {
label = "wps";
gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2c", "spi refclk", "rgmii1", "nd_sd";
function = "gpio";
};
};
ðernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "llllw";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};
|